2 * Copyright (c) 2012-2016 Toradex, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 /* AS3722-PMIC-specific early init regs */
9 #define AS3722_I2C_ADDR 0x80
11 #define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */
12 #define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */
13 #define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */
14 #define AS3722_SDCONTROL_REG 0x4D
16 #define AS3722_LDO1VOLTAGE_REG 0x11 /* VDD_SDMMC1 */
17 #define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */
18 #define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC3 */
19 #define AS3722_LDCONTROL_REG 0x4E
21 #define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG)
22 #define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG)
24 #define AS3722_SD1VOLTAGE_DATA (0x3200 | AS3722_SD1VOLTAGE_REG)
25 #define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG)
27 #define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG)
28 #define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG)
30 #define AS3722_LDO1CONTROL_DATA (0x0200 | AS3722_LDCONTROL_REG)
31 #define AS3722_LDO1VOLTAGE_DATA (0x7F00 | AS3722_LDO1VOLTAGE_REG)
33 #define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG)
34 #define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG)
36 #define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG)
37 #define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG)
39 #define I2C_SEND_2_BYTES 0x0A02
41 void pmic_enable_cpu_vdd(void);