2 * Copyright (C) 2012 Lucas Stach
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/clock.h>
9 #include <asm/arch/funcmux.h>
10 #include <asm/arch/pinmux.h>
11 #include <asm/arch-tegra/ap.h>
12 #include <asm/arch-tegra/board.h>
13 #include <asm/arch-tegra/tegra.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 #define PMU_I2C_ADDRESS 0x34
22 #define MAX_I2C_RETRY 3
23 #define PMU_SUPPLYENE 0x14
24 #define PMU_SUPPLYENE_SYSINEN (1<<5)
25 #define PMU_SUPPLYENE_EXITSLREQ (1<<1)
27 int arch_misc_init(void)
29 /* Disable PMIC sleep mode on low supply voltage */
34 err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
36 debug("%s: Cannot find PMIC I2C chip\n", __func__);
42 err = dm_i2c_read(dev, addr, data, 1);
44 debug("failed to get PMU_SUPPLYENE\n");
48 data[0] &= ~PMU_SUPPLYENE_SYSINEN;
49 data[0] |= PMU_SUPPLYENE_EXITSLREQ;
51 err = dm_i2c_write(dev, addr, data, 1);
53 debug("failed to set PMU_SUPPLYENE\n");
57 /* make sure SODIMM pin 87 nRESET_OUT is released properly */
58 pinmux_set_func(PMUX_PINGRP_ATA, PMUX_FUNC_GMI);
60 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
62 printf("USB recovery mode\n");
69 printf("Model: Toradex Colibri T20 %dMB V%s\n",
70 (gd->ram_size == 0x10000000) ? 256 : 512,
71 (nand_info[0]->erasesize >> 10 == 512) ?
72 ((gd->ram_size == 0x10000000) ? "1.1B" : "1.1C") : "1.2A");
77 #ifdef CONFIG_TEGRA_MMC
79 * Routine: pin_mux_mmc
80 * Description: setup the pin muxes/tristate values for the SDMMC(s)
82 void pin_mux_mmc(void)
84 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT);
85 pinmux_tristate_disable(PMUX_PINGRP_GMB);
89 #ifdef CONFIG_TEGRA_NAND
90 void pin_mux_nand(void)
92 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT);
95 * configure pingroup ATC to something unrelated to
96 * avoid ATC overriding KBC
98 pinmux_set_func(PMUX_PINGRP_ATC, PMUX_FUNC_GMI);
102 #ifdef CONFIG_USB_EHCI_TEGRA
103 void pin_mux_usb(void)
105 /* module internal USB bus to connect ethernet chipset */
106 funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI);
108 /* ULPI reference clock output */
109 pinmux_set_func(PMUX_PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4);
110 pinmux_tristate_disable(PMUX_PINGRP_CDEV2);
113 pinmux_tristate_disable(PMUX_PINGRP_UAC);
116 pinmux_tristate_disable(PMUX_PINGRP_DTE);
118 /* Reset ASIX using LAN_RESET */
119 gpio_request(TEGRA_GPIO(V, 4), "LAN_RESET");
120 gpio_direction_output(TEGRA_GPIO(V, 4), 0);
121 pinmux_tristate_disable(PMUX_PINGRP_GPV);
123 gpio_set_value(TEGRA_GPIO(V, 4), 1);
125 /* USBH_PEN: USB 1 aka Tegra USB port 3 VBus */
126 pinmux_tristate_disable(PMUX_PINGRP_SPIG);
130 #ifdef CONFIG_VIDEO_TEGRA20
132 * Routine: pin_mux_display
133 * Description: setup the pin muxes/tristate values for the LCD interface)
135 void pin_mux_display(void)
138 * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through
141 pinmux_tristate_disable(PMUX_PINGRP_DTA);
143 pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM);
144 pinmux_tristate_disable(PMUX_PINGRP_SDC);