2 * Voipac PXA270 Support
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/hardware.h>
28 DECLARE_GLOBAL_DATA_PTR;
31 * Miscelaneous platform dependent initialisations
35 /* memory and cpu-speed are setup before relocation */
36 /* so we do _nothing_ here */
38 /* Arch number of vpac270 */
39 gd->bd->bi_arch_number = MACH_TYPE_VPAC270;
41 /* adress of boot parameters */
42 gd->bd->bi_boot_params = 0xa0000100;
47 struct serial_device *default_serial_console(void)
49 return &serial_ffuart_device;
55 gd->ram_size = PHYS_SDRAM_1_SIZE;
56 #ifdef CONFIG_256M_U_BOOT
57 gd->ram_size += PHYS_SDRAM_2_SIZE;
62 void dram_init_banksize(void)
64 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
65 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
67 #ifdef CONFIG_256M_U_BOOT
68 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
69 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
74 int usb_board_init(void)
76 writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
77 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
80 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
82 while (readl(UHCHR) & UHCHR_FSBIR)
85 writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
86 writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
88 /* Clear any OTG Pin Hold */
89 if (readl(PSSR) & PSSR_OTGPH)
90 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
92 writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
93 writel(readl(UHCRHDA) | 0x100, UHCRHDA);
95 /* Set port power control mask bits, only 3 ports. */
96 writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
99 writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
100 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
105 void usb_board_init_fail(void)
110 void usb_board_stop(void)
112 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
114 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
116 writel(readl(UHCCOMS) | 1, UHCCOMS);
119 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
125 #ifdef CONFIG_DRIVER_DM9000
126 int board_eth_init(bd_t *bis)
128 return dm9000_initialize(bis);