1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2008 Extreme Engineering Solutions, Inc.
4 * Copyright 2007-2008 Freescale Semiconductor, Inc.
9 #include <asm/fsl_pci.h>
10 #include <asm/fsl_serdes.h>
12 #include <linux/compiler.h>
13 #include <linux/libfdt.h>
14 #include <fdt_support.h>
18 static struct pci_controller pci1_hose;
21 void pci_init_board(void)
23 int first_free_busno = 0;
27 struct fsl_pci_info pci_info;
28 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
29 u32 devdisr = in_be32(&gur->devdisr);
30 uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
31 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
32 uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
33 uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1;
34 uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
36 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
37 SET_STD_PCI_INFO(pci_info, 1);
38 set_next_law(pci_info.mem_phys,
39 law_size_bits(pci_info.mem_size), pci_info.law);
40 set_next_law(pci_info.io_phys,
41 law_size_bits(pci_info.io_size), pci_info.law);
43 pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
44 printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
46 pcix ? "PCIX" : "PCI",
47 pci_spd_norm ? ">=" : "<=",
48 pcix ? freq * 2 : freq,
49 pcie_ep ? "agent" : "host",
50 pci_arb ? "arbiter" : "external-arbiter");
52 first_free_busno = fsl_pci_init_port(&pci_info,
53 &pci1_hose, first_free_busno);
55 printf("PCI1: disabled\n");
57 #elif defined CONFIG_ARCH_MPC8548
58 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
59 /* PCI1 not present on MPC8572 */
60 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
63 fsl_pcie_init_board(first_free_busno);
66 #if defined(CONFIG_OF_BOARD_SETUP)
67 void ft_board_pci_setup(void *blob, bd_t *bd)
71 #endif /* CONFIG_OF_BOARD_SETUP */