1 /******************************************************************************
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
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14 * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
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20 * WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
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22 * FITNESS FOR A PARTICULAR PURPOSE.
25 * Xilinx hardware products are not intended for use in life support
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27 * expressly prohibited.
30 * (c) Copyright 2002-2004 Xilinx Inc.
31 * All rights reserved.
34 * You should have received a copy of the GNU General Public License along
35 * with this program; if not, write to the Free Software Foundation, Inc.,
36 * 675 Mass Ave, Cambridge, MA 02139, USA.
38 ******************************************************************************/
39 /*****************************************************************************/
44 * This file contains Xilinx software status codes. Status codes have their
45 * own data type called XStatus. These codes are used throughout the Xilinx
48 ******************************************************************************/
50 #ifndef XSTATUS_H /* prevent circular inclusions */
51 #define XSTATUS_H /* by using protection macros */
53 /***************************** Include Files *********************************/
55 #include "xbasic_types.h"
57 /************************** Constant Definitions *****************************/
59 /*********************** Common statuses 0 - 500 *****************************/
61 #define XST_SUCCESS 0L
62 #define XST_FAILURE 1L
63 #define XST_DEVICE_NOT_FOUND 2L
64 #define XST_DEVICE_BLOCK_NOT_FOUND 3L
65 #define XST_INVALID_VERSION 4L
66 #define XST_DEVICE_IS_STARTED 5L
67 #define XST_DEVICE_IS_STOPPED 6L
68 #define XST_FIFO_ERROR 7L /* an error occurred during an
69 operation with a FIFO such as
70 an underrun or overrun, this
71 error requires the device to
73 #define XST_RESET_ERROR 8L /* an error occurred which requires
74 the device to be reset */
75 #define XST_DMA_ERROR 9L /* a DMA error occurred, this error
76 typically requires the device
77 using the DMA to be reset */
78 #define XST_NOT_POLLED 10L /* the device is not configured for
79 polled mode operation */
80 #define XST_FIFO_NO_ROOM 11L /* a FIFO did not have room to put
81 the specified data into */
82 #define XST_BUFFER_TOO_SMALL 12L /* the buffer is not large enough
83 to hold the expected data */
84 #define XST_NO_DATA 13L /* there was no data available */
85 #define XST_REGISTER_ERROR 14L /* a register did not contain the
87 #define XST_INVALID_PARAM 15L /* an invalid parameter was passed
89 #define XST_NOT_SGDMA 16L /* the device is not configured for
90 scatter-gather DMA operation */
91 #define XST_LOOPBACK_ERROR 17L /* a loopback test failed */
92 #define XST_NO_CALLBACK 18L /* a callback has not yet been
94 #define XST_NO_FEATURE 19L /* device is not configured with
95 * the requested feature */
96 #define XST_NOT_INTERRUPT 20L /* device is not configured for
97 * interrupt mode operation */
98 #define XST_DEVICE_BUSY 21L /* device is busy */
99 #define XST_ERROR_COUNT_MAX 22L /* the error counters of a device
101 #define XST_IS_STARTED 23L /* used when part of device is
102 * already started i.e.
104 #define XST_IS_STOPPED 24L /* used when part of device is
105 * already stopped i.e.
108 /***************** Utility Component statuses 401 - 500 *********************/
110 #define XST_MEMTEST_FAILED 401L /* memory test failed */
112 /***************** Common Components statuses 501 - 1000 *********************/
114 /********************* Packet Fifo statuses 501 - 510 ************************/
116 #define XST_PFIFO_LACK_OF_DATA 501L /* not enough data in FIFO */
117 #define XST_PFIFO_NO_ROOM 502L /* not enough room in FIFO */
118 #define XST_PFIFO_BAD_REG_VALUE 503L /* self test, a register value
119 was invalid after reset */
121 /************************** DMA statuses 511 - 530 ***************************/
123 #define XST_DMA_TRANSFER_ERROR 511L /* self test, DMA transfer
125 #define XST_DMA_RESET_REGISTER_ERROR 512L /* self test, a register value
126 was invalid after reset */
127 #define XST_DMA_SG_LIST_EMPTY 513L /* scatter gather list contains
128 no buffer descriptors ready
130 #define XST_DMA_SG_IS_STARTED 514L /* scatter gather not stopped */
131 #define XST_DMA_SG_IS_STOPPED 515L /* scatter gather not running */
132 #define XST_DMA_SG_LIST_FULL 517L /* all the buffer desciptors of
133 the scatter gather list are
135 #define XST_DMA_SG_BD_LOCKED 518L /* the scatter gather buffer
136 descriptor which is to be
137 copied over in the scatter
139 #define XST_DMA_SG_NOTHING_TO_COMMIT 519L /* no buffer descriptors have been
140 put into the scatter gather
141 list to be commited */
142 #define XST_DMA_SG_COUNT_EXCEEDED 521L /* the packet count threshold
143 specified was larger than the
144 total # of buffer descriptors
145 in the scatter gather list */
146 #define XST_DMA_SG_LIST_EXISTS 522L /* the scatter gather list has
147 already been created */
148 #define XST_DMA_SG_NO_LIST 523L /* no scatter gather list has
150 #define XST_DMA_SG_BD_NOT_COMMITTED 524L /* the buffer descriptor which was
151 being started was not committed
153 #define XST_DMA_SG_NO_DATA 525L /* the buffer descriptor to start
154 has already been used by the
155 hardware so it can't be reused
158 /************************** IPIF statuses 531 - 550 ***************************/
160 #define XST_IPIF_REG_WIDTH_ERROR 531L /* an invalid register width
161 was passed into the function */
162 #define XST_IPIF_RESET_REGISTER_ERROR 532L /* the value of a register at
163 reset was not valid */
164 #define XST_IPIF_DEVICE_STATUS_ERROR 533L /* a write to the device interrupt
165 status register did not read
167 #define XST_IPIF_DEVICE_ACK_ERROR 534L /* the device interrupt status
168 register did not reset when
170 #define XST_IPIF_DEVICE_ENABLE_ERROR 535L /* the device interrupt enable
171 register was not updated when
172 other registers changed */
173 #define XST_IPIF_IP_STATUS_ERROR 536L /* a write to the IP interrupt
174 status register did not read
176 #define XST_IPIF_IP_ACK_ERROR 537L /* the IP interrupt status register
177 did not reset when acked */
178 #define XST_IPIF_IP_ENABLE_ERROR 538L /* IP interrupt enable register was
179 not updated correctly when other
181 #define XST_IPIF_DEVICE_PENDING_ERROR 539L /* The device interrupt pending
182 register did not indicate the
184 #define XST_IPIF_DEVICE_ID_ERROR 540L /* The device interrupt ID register
185 did not indicate the expected
188 /****************** Device specific statuses 1001 - 4095 *********************/
190 /********************* Ethernet statuses 1001 - 1050 *************************/
192 #define XST_EMAC_MEMORY_SIZE_ERROR 1001L /* Memory space is not big enough
193 * to hold the minimum number of
194 * buffers or descriptors */
195 #define XST_EMAC_MEMORY_ALLOC_ERROR 1002L /* Memory allocation failed */
196 #define XST_EMAC_MII_READ_ERROR 1003L /* MII read error */
197 #define XST_EMAC_MII_BUSY 1004L /* An MII operation is in progress */
198 #define XST_EMAC_OUT_OF_BUFFERS 1005L /* Adapter is out of buffers */
199 #define XST_EMAC_PARSE_ERROR 1006L /* Invalid adapter init string */
200 #define XST_EMAC_COLLISION_ERROR 1007L /* Excess deferral or late
201 * collision on polled send */
203 /*********************** UART statuses 1051 - 1075 ***************************/
206 #define XST_UART_INIT_ERROR 1051L
207 #define XST_UART_START_ERROR 1052L
208 #define XST_UART_CONFIG_ERROR 1053L
209 #define XST_UART_TEST_FAIL 1054L
210 #define XST_UART_BAUD_ERROR 1055L
211 #define XST_UART_BAUD_RANGE 1056L
213 /************************ IIC statuses 1076 - 1100 ***************************/
215 #define XST_IIC_SELFTEST_FAILED 1076 /* self test failed */
216 #define XST_IIC_BUS_BUSY 1077 /* bus found busy */
217 #define XST_IIC_GENERAL_CALL_ADDRESS 1078 /* mastersend attempted with */
218 /* general call address */
219 #define XST_IIC_STAND_REG_RESET_ERROR 1079 /* A non parameterizable reg */
220 /* value after reset not valid */
221 #define XST_IIC_TX_FIFO_REG_RESET_ERROR 1080 /* Tx fifo included in design */
222 /* value after reset not valid */
223 #define XST_IIC_RX_FIFO_REG_RESET_ERROR 1081 /* Rx fifo included in design */
224 /* value after reset not valid */
225 #define XST_IIC_TBA_REG_RESET_ERROR 1082 /* 10 bit addr incl in design */
226 /* value after reset not valid */
227 #define XST_IIC_CR_READBACK_ERROR 1083 /* Read of the control register */
228 /* didn't return value written */
229 #define XST_IIC_DTR_READBACK_ERROR 1084 /* Read of the data Tx reg */
230 /* didn't return value written */
231 #define XST_IIC_DRR_READBACK_ERROR 1085 /* Read of the data Receive reg */
232 /* didn't return value written */
233 #define XST_IIC_ADR_READBACK_ERROR 1086 /* Read of the data Tx reg */
234 /* didn't return value written */
235 #define XST_IIC_TBA_READBACK_ERROR 1087 /* Read of the 10 bit addr reg */
236 /* didn't return written value */
237 #define XST_IIC_NOT_SLAVE 1088 /* The device isn't a slave */
239 /*********************** ATMC statuses 1101 - 1125 ***************************/
241 #define XST_ATMC_ERROR_COUNT_MAX 1101L /* the error counters in the ATM
242 controller hit the max value
243 which requires the statistics
246 /*********************** Flash statuses 1126 - 1150 **************************/
248 #define XST_FLASH_BUSY 1126L /* Flash is erasing or programming */
249 #define XST_FLASH_READY 1127L /* Flash is ready for commands */
250 #define XST_FLASH_ERROR 1128L /* Flash had detected an internal
251 error. Use XFlash_DeviceControl
252 to retrieve device specific codes */
253 #define XST_FLASH_ERASE_SUSPENDED 1129L /* Flash is in suspended erase state */
254 #define XST_FLASH_WRITE_SUSPENDED 1130L /* Flash is in suspended write state */
255 #define XST_FLASH_PART_NOT_SUPPORTED 1131L /* Flash type not supported by
257 #define XST_FLASH_NOT_SUPPORTED 1132L /* Operation not supported */
258 #define XST_FLASH_TOO_MANY_REGIONS 1133L /* Too many erase regions */
259 #define XST_FLASH_TIMEOUT_ERROR 1134L /* Programming or erase operation
260 aborted due to a timeout */
261 #define XST_FLASH_ADDRESS_ERROR 1135L /* Accessed flash outside its
263 #define XST_FLASH_ALIGNMENT_ERROR 1136L /* Write alignment error */
264 #define XST_FLASH_BLOCKING_CALL_ERROR 1137L /* Couldn't return immediately from
265 write/erase function with
266 XFL_NON_BLOCKING_WRITE/ERASE
268 #define XST_FLASH_CFI_QUERY_ERROR 1138L /* Failed to query the device */
270 /*********************** SPI statuses 1151 - 1175 ****************************/
272 #define XST_SPI_MODE_FAULT 1151 /* master was selected as slave */
273 #define XST_SPI_TRANSFER_DONE 1152 /* data transfer is complete */
274 #define XST_SPI_TRANSMIT_UNDERRUN 1153 /* slave underruns transmit register */
275 #define XST_SPI_RECEIVE_OVERRUN 1154 /* device overruns receive register */
276 #define XST_SPI_NO_SLAVE 1155 /* no slave has been selected yet */
277 #define XST_SPI_TOO_MANY_SLAVES 1156 /* more than one slave is being
279 #define XST_SPI_NOT_MASTER 1157 /* operation is valid only as master */
280 #define XST_SPI_SLAVE_ONLY 1158 /* device is configured as slave-only */
281 #define XST_SPI_SLAVE_MODE_FAULT 1159 /* slave was selected while disabled */
283 /********************** OPB Arbiter statuses 1176 - 1200 *********************/
285 #define XST_OPBARB_INVALID_PRIORITY 1176 /* the priority registers have either
286 * one master assigned to two or more
287 * priorities, or one master not
288 * assigned to any priority
290 #define XST_OPBARB_NOT_SUSPENDED 1177 /* an attempt was made to modify the
291 * priority levels without first
292 * suspending the use of priority
295 #define XST_OPBARB_PARK_NOT_ENABLED 1178 /* bus parking by id was enabled but
296 * bus parking was not enabled
298 #define XST_OPBARB_NOT_FIXED_PRIORITY 1179 /* the arbiter must be in fixed
299 * priority mode to allow the
300 * priorities to be changed
303 /************************ Intc statuses 1201 - 1225 **************************/
305 #define XST_INTC_FAIL_SELFTEST 1201 /* self test failed */
306 #define XST_INTC_CONNECT_ERROR 1202 /* interrupt already in use */
308 /********************** TmrCtr statuses 1226 - 1250 **************************/
310 #define XST_TMRCTR_TIMER_FAILED 1226 /* self test failed */
312 /********************** WdtTb statuses 1251 - 1275 ***************************/
314 #define XST_WDTTB_TIMER_FAILED 1251L
316 /********************** PlbArb statuses 1276 - 1300 **************************/
318 #define XST_PLBARB_FAIL_SELFTEST 1276L
320 /********************** Plb2Opb statuses 1301 - 1325 *************************/
322 #define XST_PLB2OPB_FAIL_SELFTEST 1301L
324 /********************** Opb2Plb statuses 1326 - 1350 *************************/
326 #define XST_OPB2PLB_FAIL_SELFTEST 1326L
328 /********************** SysAce statuses 1351 - 1360 **************************/
330 #define XST_SYSACE_NO_LOCK 1351L /* No MPU lock has been granted */
332 /********************** PCI Bridge statuses 1361 - 1375 **********************/
334 #define XST_PCI_INVALID_ADDRESS 1361L
336 /**************************** Type Definitions *******************************/
339 * The status typedef.
343 /***************** Macros (Inline Functions) Definitions *********************/
345 /************************** Function Prototypes ******************************/
347 #endif /* end of protection macro */