2 * (C) Copyright 2007 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* This is a board specific file. It's OK to include board specific
16 #include <asm/processor.h>
17 #include <asm/microblaze_intc.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 #ifdef CONFIG_XILINX_GPIO
24 static int reset_pin = -1;
27 #if CONFIG_IS_ENABLED(OF_CONTROL)
30 void dram_init_banksize(void)
32 gd->bd->bi_dram[0].start = ram_base;
33 gd->bd->bi_dram[0].size = get_effective_memsize();
41 const void *blob = gd->fdt_blob;
43 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
45 if (node == -FDT_ERR_NOTFOUND) {
46 debug("DRAM: Can't get memory node\n");
49 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
50 if (addr == FDT_ADDR_T_NONE || size == 0) {
51 debug("DRAM: Can't get base address or size\n");
56 gd->ram_top = addr; /* In setup_dest_addr() is done +ram_size */
64 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
70 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
72 #ifdef CONFIG_XILINX_GPIO
74 gpio_direction_output(reset_pin, 1);
77 #ifdef CONFIG_XILINX_TB_WATCHDOG
78 hw_watchdog_disable();
81 puts ("Reseting board\n");
82 __asm__ __volatile__ (" mts rmsr, r0;" \
90 #ifdef CONFIG_XILINX_GPIO
91 reset_pin = gpio_alloc(CONFIG_SYS_GPIO_0_ADDR, "reset", 1);
93 gpio_request(reset_pin, "reset_pin");
103 int board_eth_init(bd_t *bis)
107 #ifdef CONFIG_XILINX_AXIEMAC
108 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
109 XILINX_AXIDMA_BASEADDR);
112 #if defined(CONFIG_XILINX_EMACLITE) && defined(XILINX_EMACLITE_BASEADDR)
115 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
118 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
121 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
125 #ifdef CONFIG_XILINX_LL_TEMAC
126 # ifdef XILINX_LLTEMAC_BASEADDR
127 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR
128 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
129 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
130 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
131 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
132 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
133 XILINX_LL_TEMAC_M_SDMA_DCR,
134 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
136 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
137 XILINX_LL_TEMAC_M_SDMA_PLB,
138 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
142 # ifdef XILINX_LLTEMAC_BASEADDR1
143 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
144 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
145 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
146 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
147 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
148 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
149 XILINX_LL_TEMAC_M_SDMA_DCR,
150 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
152 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
153 XILINX_LL_TEMAC_M_SDMA_PLB,
154 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);