2 * (C) Copyright 2007 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* This is a board specific file. It's OK to include board specific
31 #include <asm/microblaze_intc.h>
34 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
36 #ifdef CONFIG_SYS_GPIO_0
37 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
38 ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
40 #ifdef CONFIG_SYS_RESET_ADDRESS
41 puts ("Reseting board\n");
49 #ifdef CONFIG_SYS_GPIO_0
50 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
55 #ifdef CONFIG_SYS_FSL_2
56 void fsl_isr2 (void *arg) {
58 *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) =
59 ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)));
65 int fsl_init2 (void) {
67 install_interrupt_handler (FSL_INTR_2, fsl_isr2, NULL);
72 int board_eth_init(bd_t *bis)
76 #ifdef CONFIG_XILINX_AXIEMAC
77 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
78 XILINX_AXIDMA_BASEADDR);
81 #ifdef CONFIG_XILINX_EMACLITE
84 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
87 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
90 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
94 #ifdef CONFIG_XILINX_LL_TEMAC
95 # ifdef XILINX_LLTEMAC_BASEADDR
96 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR
97 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
98 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
99 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
100 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
101 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
102 XILINX_LL_TEMAC_M_SDMA_DCR,
103 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
105 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
106 XILINX_LL_TEMAC_M_SDMA_PLB,
107 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
111 # ifdef XILINX_LLTEMAC_BASEADDR1
112 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
113 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
114 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
115 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
116 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
117 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
118 XILINX_LL_TEMAC_M_SDMA_DCR,
119 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
121 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
122 XILINX_LL_TEMAC_M_SDMA_PLB,
123 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);