2 * (C) Copyright 2007 Michal Simek
4 * Michal SIMEK <monstr@monstr.eu>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 /* This is a board specific file. It's OK to include board specific
31 #include <asm/processor.h>
32 #include <asm/microblaze_intc.h>
35 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
37 #ifdef CONFIG_SYS_GPIO_0
38 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) =
39 ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
41 #ifdef CONFIG_SYS_RESET_ADDRESS
42 puts ("Reseting board\n");
50 #ifdef CONFIG_SYS_GPIO_0
51 *((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)) = 0xFFFFFFFF;
56 #ifdef CONFIG_SYS_FSL_2
57 void fsl_isr2 (void *arg) {
59 *((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)) =
60 ++(*((unsigned int *)(CONFIG_SYS_GPIO_0_ADDR + 0x4)));
66 int fsl_init2 (void) {
68 install_interrupt_handler (FSL_INTR_2, fsl_isr2, NULL);
76 #ifdef CONFIG_SYS_FSL_2
81 int board_eth_init(bd_t *bis)
85 #ifdef CONFIG_XILINX_AXIEMAC
86 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
87 XILINX_AXIDMA_BASEADDR);
90 #ifdef CONFIG_XILINX_EMACLITE
93 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
96 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
99 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
103 #ifdef CONFIG_XILINX_LL_TEMAC
104 # ifdef XILINX_LLTEMAC_BASEADDR
105 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR
106 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
107 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR);
108 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR
109 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
110 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
111 XILINX_LL_TEMAC_M_SDMA_DCR,
112 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
114 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR,
115 XILINX_LL_TEMAC_M_SDMA_PLB,
116 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR);
120 # ifdef XILINX_LLTEMAC_BASEADDR1
121 # ifdef XILINX_LLTEMAC_FIFO_BASEADDR1
122 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
123 XILINX_LL_TEMAC_M_FIFO, XILINX_LLTEMAC_FIFO_BASEADDR1);
124 # elif XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1
125 # if XILINX_LLTEMAC_SDMA_USE_DCR == 1
126 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
127 XILINX_LL_TEMAC_M_SDMA_DCR,
128 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);
130 ret |= xilinx_ll_temac_eth_init(bis, XILINX_LLTEMAC_BASEADDR1,
131 XILINX_LL_TEMAC_M_SDMA_PLB,
132 XILINX_LLTEMAC_SDMA_CTRL_BASEADDR1);