2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/hardware.h>
11 #include <asm/arch/sys_proto.h>
13 DECLARE_GLOBAL_DATA_PTR;
18 /* It can be done differently */
19 Xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
20 Xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
21 Xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
22 Xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
23 Xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
24 Xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
32 idcode = zynq_slcr_get_idcode();
35 case XILINX_ZYNQ_7010:
38 case XILINX_ZYNQ_7015:
41 case XILINX_ZYNQ_7020:
44 case XILINX_ZYNQ_7030:
47 case XILINX_ZYNQ_7045:
50 case XILINX_ZYNQ_7100:
58 fpga_add(fpga_xilinx, &fpga);
64 int board_late_init(void)
66 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
68 setenv("modeboot", "norboot");
71 setenv("modeboot", "sdboot");
74 setenv("modeboot", "jtagboot");
77 setenv("modeboot", "");
84 int board_eth_init(bd_t *bis)
88 #ifdef CONFIG_XILINX_AXIEMAC
89 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
90 XILINX_AXIDMA_BASEADDR);
92 #ifdef CONFIG_XILINX_EMACLITE
95 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
98 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
101 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
105 #if defined(CONFIG_ZYNQ_GEM)
106 # if defined(CONFIG_ZYNQ_GEM0)
107 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
108 CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
110 # if defined(CONFIG_ZYNQ_GEM1)
111 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
112 CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
118 #ifdef CONFIG_CMD_MMC
119 int board_mmc_init(bd_t *bd)
123 #if defined(CONFIG_ZYNQ_SDHCI)
124 # if defined(CONFIG_ZYNQ_SDHCI0)
125 ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
127 # if defined(CONFIG_ZYNQ_SDHCI1)
128 ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
137 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;