2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/hardware.h>
12 #include <asm/arch/sys_proto.h>
14 DECLARE_GLOBAL_DATA_PTR;
19 /* It can be done differently */
20 xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
21 xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
22 xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
23 xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
24 xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
25 xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
33 idcode = zynq_slcr_get_idcode();
36 case XILINX_ZYNQ_7010:
39 case XILINX_ZYNQ_7015:
42 case XILINX_ZYNQ_7020:
45 case XILINX_ZYNQ_7030:
48 case XILINX_ZYNQ_7045:
51 case XILINX_ZYNQ_7100:
59 fpga_add(fpga_xilinx, &fpga);
65 int board_late_init(void)
67 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
69 setenv("modeboot", "norboot");
72 setenv("modeboot", "sdboot");
75 setenv("modeboot", "jtagboot");
78 setenv("modeboot", "");
85 int board_eth_init(bd_t *bis)
89 #ifdef CONFIG_XILINX_AXIEMAC
90 ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
91 XILINX_AXIDMA_BASEADDR);
93 #ifdef CONFIG_XILINX_EMACLITE
96 # ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
99 # ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
102 ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
106 #if defined(CONFIG_ZYNQ_GEM)
107 # if defined(CONFIG_ZYNQ_GEM0)
108 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
109 CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);
111 # if defined(CONFIG_ZYNQ_GEM1)
112 ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,
113 CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);
119 #ifdef CONFIG_CMD_MMC
120 int board_mmc_init(bd_t *bd)
124 #if defined(CONFIG_ZYNQ_SDHCI)
125 # if defined(CONFIG_ZYNQ_SDHCI0)
126 ret = zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR0);
128 # if defined(CONFIG_ZYNQ_SDHCI1)
129 ret |= zynq_sdhci_init(ZYNQ_SDHCI_BASEADDR1);
138 #ifdef CONFIG_OF_CONTROL
142 const void *blob = gd->fdt_blob;
144 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
146 if (node == -FDT_ERR_NOTFOUND) {
147 debug("ZYNQ DRAM: Can't get memory node\n");
150 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
151 if (addr == FDT_ADDR_T_NONE || size == 0) {
152 debug("ZYNQ DRAM: Can't get base address or size\n");
157 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;