2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
5 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/clk.h>
14 #include <asm/arch/hardware.h>
15 #include <asm/arch/sys_proto.h>
16 #include <asm/arch/psu_init_gpl.h>
19 #include <dwc3-uboot.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
27 !defined(CONFIG_SPL_BUILD)
28 static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC;
35 } zynqmp_devices[] = {
124 { /* For testing purpose only */
168 int chip_id(unsigned char id)
173 if (current_el() != 3) {
174 regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID;
183 * regs[0][31:0] = status of the operation
184 * regs[0][63:32] = CSU.IDCODE register
185 * regs[1][31:0] = CSU.version register
186 * regs[1][63:32] = CSU.IDCODE2 register
190 regs.regs[0] = upper_32_bits(regs.regs[0]);
191 regs.regs[0] &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
192 ZYNQMP_CSU_IDCODE_SVD_MASK;
193 regs.regs[0] >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
197 regs.regs[1] = lower_32_bits(regs.regs[1]);
198 regs.regs[1] &= ZYNQMP_CSU_SILICON_VER_MASK;
202 regs.regs[1] = lower_32_bits(regs.regs[1]);
203 regs.regs[1] >>= ZYNQMP_CSU_VERSION_EMPTY_SHIFT;
207 printf("%s, Invalid Req:0x%x\n", __func__, id);
212 val = readl(ZYNQMP_CSU_IDCODE_ADDR);
213 val &= ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK |
214 ZYNQMP_CSU_IDCODE_SVD_MASK;
215 val >>= ZYNQMP_CSU_IDCODE_SVD_SHIFT;
218 val = readl(ZYNQMP_CSU_VER_ADDR);
219 val &= ZYNQMP_CSU_SILICON_VER_MASK;
222 printf("%s, Invalid Req:0x%x\n", __func__, id);
229 #define ZYNQMP_VERSION_SIZE 9
230 #define ZYNQMP_PL_STATUS_BIT 9
231 #define ZYNQMP_PL_STATUS_MASK BIT(ZYNQMP_PL_STATUS_BIT)
232 #define ZYNQMP_CSU_VERSION_MASK ~(ZYNQMP_PL_STATUS_MASK)
234 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
235 !defined(CONFIG_SPL_BUILD)
236 static char *zynqmp_get_silicon_idcode_name(void)
240 static char name[ZYNQMP_VERSION_SIZE];
242 id = chip_id(IDCODE);
243 ver = chip_id(IDCODE2);
245 for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) {
246 if ((zynqmp_devices[i].id == id) &&
247 (zynqmp_devices[i].ver == (ver &
248 ZYNQMP_CSU_VERSION_MASK))) {
249 strncat(name, "zu", 2);
250 strncat(name, zynqmp_devices[i].name,
251 ZYNQMP_VERSION_SIZE - 3);
256 if (i >= ARRAY_SIZE(zynqmp_devices))
259 if (!zynqmp_devices[i].evexists)
262 if (ver & ZYNQMP_PL_STATUS_MASK)
265 if (strstr(name, "eg") || strstr(name, "ev")) {
266 buf = strstr(name, "e");
274 int board_early_init_f(void)
277 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CLK_ZYNQMP)
278 zynqmp_pmufw_version();
281 #if defined(CONFIG_ZYNQMP_PSU_INIT_ENABLED)
290 printf("EL Level:\tEL%d\n", current_el());
292 #if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
293 !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \
294 defined(CONFIG_SPL_BUILD))
295 if (current_el() != 3) {
296 zynqmppl.name = zynqmp_get_silicon_idcode_name();
297 printf("Chip ID:\t%s\n", zynqmppl.name);
299 fpga_add(fpga_xilinx, &zynqmppl);
306 int board_early_init_r(void)
310 if (current_el() != 3)
313 val = readl(&crlapb_base->timestamp_ref_ctrl);
314 val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
317 val = readl(&crlapb_base->timestamp_ref_ctrl);
318 val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
319 writel(val, &crlapb_base->timestamp_ref_ctrl);
321 /* Program freq register in System counter */
322 writel(zynqmp_get_system_timer_freq(),
323 &iou_scntr_secure->base_frequency_id_register);
324 /* And enable system counter */
325 writel(ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN,
326 &iou_scntr_secure->counter_control_register);
331 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
333 #if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
334 defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
335 defined(CONFIG_ZYNQ_EEPROM_BUS)
336 i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
338 if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
339 CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
341 printf("I2C EEPROM MAC address read failed\n");
347 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
352 if (current_el() > 1) {
355 armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
358 printf("FAIL: current EL is not above EL1\n");
364 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
365 int dram_init_banksize(void)
367 return fdtdec_setup_memory_banksize();
372 if (fdtdec_setup_memory_size() != 0)
380 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
386 void reset_cpu(ulong addr)
390 int board_late_init(void)
399 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
400 debug("Saved variables - Skipping\n");
404 ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, ®);
408 if (reg >> BOOT_MODE_ALT_SHIFT)
409 reg >>= BOOT_MODE_ALT_SHIFT;
411 bootmode = reg & BOOT_MODES_MASK;
418 env_set("modeboot", "usb_dfu_spl");
423 env_set("modeboot", "jtagboot");
425 case QSPI_MODE_24BIT:
426 case QSPI_MODE_32BIT:
429 env_set("modeboot", "qspiboot");
434 env_set("modeboot", "emmcboot");
439 env_set("modeboot", "sdboot");
446 #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
448 env_set("sdbootdev", "1");
452 env_set("modeboot", "sdboot");
457 env_set("modeboot", "nandboot");
461 printf("Invalid Boot Mode:0x%x\n", bootmode);
466 * One terminating char + one byte for space between mode
467 * and default boot_targets
469 env_targets = env_get("boot_targets");
471 new_targets = calloc(1, strlen(mode) +
472 strlen(env_targets) + 2);
473 sprintf(new_targets, "%s %s", mode, env_targets);
475 new_targets = calloc(1, strlen(mode) + 2);
476 sprintf(new_targets, "%s", mode);
479 env_set("boot_targets", new_targets);
486 puts("Board: Xilinx ZynqMP\n");
490 #ifdef CONFIG_USB_DWC3
491 static struct dwc3_device dwc3_device_data0 = {
492 .maximum_speed = USB_SPEED_HIGH,
493 .base = ZYNQMP_USB0_XHCI_BASEADDR,
494 .dr_mode = USB_DR_MODE_PERIPHERAL,
498 static struct dwc3_device dwc3_device_data1 = {
499 .maximum_speed = USB_SPEED_HIGH,
500 .base = ZYNQMP_USB1_XHCI_BASEADDR,
501 .dr_mode = USB_DR_MODE_PERIPHERAL,
505 int usb_gadget_handle_interrupts(int index)
507 dwc3_uboot_handle_interrupt(index);
511 int board_usb_init(int index, enum usb_init_type init)
513 debug("%s: index %x\n", __func__, index);
515 #if defined(CONFIG_USB_GADGET_DOWNLOAD)
516 g_dnl_set_serialnumber(CONFIG_SYS_CONFIG_NAME);
521 return dwc3_uboot_init(&dwc3_device_data0);
523 return dwc3_uboot_init(&dwc3_device_data1);
529 int board_usb_cleanup(int index, enum usb_init_type init)
531 dwc3_uboot_exit(index);