2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
17 #include <environment.h>
21 #if defined(CONFIG_CMD_IDE)
30 /* TODO: Can we move these into arch/ headers? */
40 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
47 #include <status_led.h>
52 #include <asm/errno.h>
54 #include <asm/sections.h>
55 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
56 #include <asm/init_helpers.h>
57 #include <asm/relocate.h>
60 #include <asm/state.h>
63 #include <linux/compiler.h>
66 * Pointer to initial global data area
68 * Here we initialize it if needed.
70 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
71 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
72 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
73 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
75 DECLARE_GLOBAL_DATA_PTR;
79 * TODO(sjg@chromium.org): IMO this code should be
80 * refactored to a single function, something like:
82 * void led_set_state(enum led_colour_t colour, int on);
84 /************************************************************************
85 * Coloured LED functionality
86 ************************************************************************
87 * May be supplied by boards if desired
89 __weak void coloured_LED_init(void) {}
90 __weak void red_led_on(void) {}
91 __weak void red_led_off(void) {}
92 __weak void green_led_on(void) {}
93 __weak void green_led_off(void) {}
94 __weak void yellow_led_on(void) {}
95 __weak void yellow_led_off(void) {}
96 __weak void blue_led_on(void) {}
97 __weak void blue_led_off(void) {}
100 * Why is gd allocated a register? Prior to reloc it might be better to
101 * just pass it around to each function in this file?
103 * After reloc one could argue that it is hardly used and doesn't need
104 * to be in a register. Or if it is it should perhaps hold pointers to all
105 * global data for all modules, so that post-reloc we can avoid the massive
106 * literal pool we get on ARM. Or perhaps just encourage each module to use
111 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
114 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
115 static int init_func_watchdog_init(void)
117 # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \
118 defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
119 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
120 defined(CONFIG_IMX_WATCHDOG))
123 puts(" Watchdog enabled\n");
129 int init_func_watchdog_reset(void)
135 #endif /* CONFIG_WATCHDOG */
137 __weak void board_add_ram_info(int use_default)
139 /* please define platform specific board_add_ram_info() */
142 static int init_baud_rate(void)
144 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
148 static int display_text_info(void)
150 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
151 ulong bss_start, bss_end, text_base;
153 bss_start = (ulong)&__bss_start;
154 bss_end = (ulong)&__bss_end;
156 #ifdef CONFIG_SYS_TEXT_BASE
157 text_base = CONFIG_SYS_TEXT_BASE;
159 text_base = CONFIG_SYS_MONITOR_BASE;
162 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
163 text_base, bss_start, bss_end);
166 #ifdef CONFIG_USE_IRQ
167 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
168 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
174 static int announce_dram_init(void)
180 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
181 static int init_func_ram(void)
183 #ifdef CONFIG_BOARD_TYPES
184 int board_type = gd->board_type;
186 int board_type = 0; /* use dummy arg */
189 gd->ram_size = initdram(board_type);
191 if (gd->ram_size > 0)
194 puts("*** failed ***\n");
199 static int show_dram_config(void)
201 unsigned long long size;
203 #ifdef CONFIG_NR_DRAM_BANKS
206 debug("\nRAM Configuration:\n");
207 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
208 size += gd->bd->bi_dram[i].size;
209 debug("Bank #%d: %llx ", i,
210 (unsigned long long)(gd->bd->bi_dram[i].start));
212 print_size(gd->bd->bi_dram[i].size, "\n");
220 print_size(size, "");
221 board_add_ram_info(0);
227 __weak void dram_init_banksize(void)
229 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
230 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
231 gd->bd->bi_dram[0].size = get_effective_memsize();
235 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
236 static int init_func_i2c(void)
239 #ifdef CONFIG_SYS_I2C
242 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
249 #if defined(CONFIG_HARD_SPI)
250 static int init_func_spi(void)
260 static int zero_global_data(void)
262 memset((void *)gd, '\0', sizeof(gd_t));
267 static int setup_mon_len(void)
269 #if defined(__ARM__) || defined(__MICROBLAZE__)
270 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
271 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
272 gd->mon_len = (ulong)&_end - (ulong)_init;
273 #elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
274 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
275 #elif defined(CONFIG_NDS32)
276 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
278 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
279 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
284 __weak int arch_cpu_init(void)
289 #ifdef CONFIG_SANDBOX
290 static int setup_ram_buf(void)
292 struct sandbox_state *state = state_get_current();
294 gd->arch.ram_buf = state->ram_buf;
295 gd->ram_size = state->ram_size;
301 /* Get the top of usable RAM */
302 __weak ulong board_get_usable_ram_top(ulong total_size)
304 #ifdef CONFIG_SYS_SDRAM_BASE
306 * Detect whether we have so much RAM that it goes past the end of our
307 * 32-bit address space. If so, clip the usable RAM so it doesn't.
309 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
311 * Will wrap back to top of 32-bit space when reservations
319 __weak phys_size_t board_reserve_ram_top(phys_size_t ram_size)
321 #ifdef CONFIG_SYS_MEM_TOP_HIDE
322 return ram_size - CONFIG_SYS_MEM_TOP_HIDE;
328 static int setup_dest_addr(void)
330 debug("Monitor len: %08lX\n", gd->mon_len);
332 * Ram is setup, size stored in gd !!
334 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
335 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
336 /* Reserve memory for secure MMU tables, and/or security monitor */
337 gd->ram_size -= CONFIG_SYS_MEM_RESERVE_SECURE;
339 * Record secure memory location. Need recalcuate if memory splits
340 * into banks, or the ram base is not zero.
342 gd->secure_ram = gd->ram_size;
345 * Subtract specified amount of memory to hide so that it won't
346 * get "touched" at all by U-Boot. By fixing up gd->ram_size
347 * the Linux kernel should now get passed the now "corrected"
348 * memory size and won't touch it either. This has been used
349 * by arch/powerpc exclusively. Now ARMv8 takes advantage of
350 * thie mechanism. If memory is split into banks, addresses
351 * need to be calculated.
353 gd->ram_size = board_reserve_ram_top(gd->ram_size);
355 #ifdef CONFIG_SYS_SDRAM_BASE
356 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
358 gd->ram_top += get_effective_memsize();
359 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
360 gd->relocaddr = gd->ram_top;
361 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
362 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
364 * We need to make sure the location we intend to put secondary core
365 * boot code is reserved and not used by any part of u-boot
367 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
368 gd->relocaddr = determine_mp_bootpg(NULL);
369 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
375 #if defined(CONFIG_SPARC)
376 static int reserve_prom(void)
378 /* defined in arch/sparc/cpu/leon?/prom.c */
379 extern void *__prom_start_reloc;
380 int size = 8192; /* page table = 2k, prom = 6k */
381 gd->relocaddr -= size;
382 __prom_start_reloc = map_sysmem(gd->relocaddr + 2048, size - 2048);
383 debug("Reserving %dk for PROM and page table at %08lx\n", size,
389 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
390 static int reserve_logbuffer(void)
392 /* reserve kernel log buffer */
393 gd->relocaddr -= LOGBUFF_RESERVE;
394 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
401 /* reserve protected RAM */
402 static int reserve_pram(void)
406 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
407 gd->relocaddr -= (reg << 10); /* size is in kB */
408 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
412 #endif /* CONFIG_PRAM */
414 /* Round memory pointer down to next 4 kB limit */
415 static int reserve_round_4k(void)
417 gd->relocaddr &= ~(4096 - 1);
421 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
423 static int reserve_mmu(void)
425 /* reserve TLB table */
426 gd->arch.tlb_size = PGTABLE_SIZE;
427 gd->relocaddr -= gd->arch.tlb_size;
429 /* round down to next 64 kB limit */
430 gd->relocaddr &= ~(0x10000 - 1);
432 gd->arch.tlb_addr = gd->relocaddr;
433 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
434 gd->arch.tlb_addr + gd->arch.tlb_size);
439 #ifdef CONFIG_DM_VIDEO
440 static int reserve_video(void)
445 addr = gd->relocaddr;
446 ret = video_reserve(&addr);
449 gd->relocaddr = addr;
456 static int reserve_lcd(void)
458 # ifdef CONFIG_FB_ADDR
459 gd->fb_base = CONFIG_FB_ADDR;
461 /* reserve memory for LCD display (always full pages) */
462 gd->relocaddr = lcd_setmem(gd->relocaddr);
463 gd->fb_base = gd->relocaddr;
464 # endif /* CONFIG_FB_ADDR */
468 # endif /* CONFIG_LCD */
470 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
471 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
472 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
473 static int reserve_legacy_video(void)
475 /* reserve memory for video display (always full pages) */
476 gd->relocaddr = video_setmem(gd->relocaddr);
477 gd->fb_base = gd->relocaddr;
482 #endif /* !CONFIG_DM_VIDEO */
484 static int reserve_trace(void)
487 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
488 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
489 debug("Reserving %dk for trace data at: %08lx\n",
490 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
496 static int reserve_uboot(void)
499 * reserve memory for U-Boot code, data & bss
500 * round down to next 4 kB limit
502 gd->relocaddr -= gd->mon_len;
503 gd->relocaddr &= ~(4096 - 1);
505 /* round down to next 64 kB limit so that IVPR stays aligned */
506 gd->relocaddr &= ~(65536 - 1);
509 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
512 gd->start_addr_sp = gd->relocaddr;
517 #ifndef CONFIG_SPL_BUILD
518 /* reserve memory for malloc() area */
519 static int reserve_malloc(void)
521 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
522 debug("Reserving %dk for malloc() at: %08lx\n",
523 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
527 /* (permanently) allocate a Board Info struct */
528 static int reserve_board(void)
531 gd->start_addr_sp -= sizeof(bd_t);
532 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
533 memset(gd->bd, '\0', sizeof(bd_t));
534 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
535 sizeof(bd_t), gd->start_addr_sp);
541 static int setup_machine(void)
543 #ifdef CONFIG_MACH_TYPE
544 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
549 static int reserve_global_data(void)
551 gd->start_addr_sp -= sizeof(gd_t);
552 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
553 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
554 sizeof(gd_t), gd->start_addr_sp);
558 static int reserve_fdt(void)
560 #ifndef CONFIG_OF_EMBED
562 * If the device tree is sitting immediately above our image then we
563 * must relocate it. If it is embedded in the data section, then it
564 * will be relocated with other data.
567 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
569 gd->start_addr_sp -= gd->fdt_size;
570 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
571 debug("Reserving %lu Bytes for FDT at: %08lx\n",
572 gd->fdt_size, gd->start_addr_sp);
579 int arch_reserve_stacks(void)
584 static int reserve_stacks(void)
586 /* make stack pointer 16-byte aligned */
587 gd->start_addr_sp -= 16;
588 gd->start_addr_sp &= ~0xf;
591 * let the architecture-specific code tailor gd->start_addr_sp and
594 return arch_reserve_stacks();
597 static int display_new_sp(void)
599 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
604 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
605 static int setup_board_part1(void)
610 * Save local variables to board info struct
612 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
613 bd->bi_memsize = gd->ram_size; /* size in bytes */
615 #ifdef CONFIG_SYS_SRAM_BASE
616 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
617 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
620 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
621 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
622 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
624 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
625 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
627 #if defined(CONFIG_MPC83xx)
628 bd->bi_immrbar = CONFIG_SYS_IMMR;
635 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
636 static int setup_board_part2(void)
640 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
641 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
642 #if defined(CONFIG_CPM2)
643 bd->bi_cpmfreq = gd->arch.cpm_clk;
644 bd->bi_brgfreq = gd->arch.brg_clk;
645 bd->bi_sccfreq = gd->arch.scc_clk;
646 bd->bi_vco = gd->arch.vco_out;
647 #endif /* CONFIG_CPM2 */
648 #if defined(CONFIG_MPC512X)
649 bd->bi_ipsfreq = gd->arch.ips_clk;
650 #endif /* CONFIG_MPC512X */
651 #if defined(CONFIG_MPC5xxx)
652 bd->bi_ipbfreq = gd->arch.ipb_clk;
653 bd->bi_pcifreq = gd->pci_clk;
654 #endif /* CONFIG_MPC5xxx */
655 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
656 bd->bi_pcifreq = gd->pci_clk;
658 #if defined(CONFIG_EXTRA_CLOCK)
659 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
660 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
661 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
668 #ifdef CONFIG_SYS_EXTBDINFO
669 static int setup_board_extra(void)
673 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
674 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
675 sizeof(bd->bi_r_version));
677 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
678 bd->bi_plb_busfreq = gd->bus_clk;
679 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
680 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
681 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
682 bd->bi_pci_busfreq = get_PCI_freq();
683 bd->bi_opbfreq = get_OPB_freq();
684 #elif defined(CONFIG_XILINX_405)
685 bd->bi_pci_busfreq = get_PCI_freq();
693 static int init_post(void)
695 post_bootmode_init();
696 post_run(NULL, POST_ROM | post_bootmode_get(0));
702 static int setup_dram_config(void)
704 /* Ram is board specific, so move it to board code ... */
705 dram_init_banksize();
710 static int reloc_fdt(void)
712 #ifndef CONFIG_OF_EMBED
713 if (gd->flags & GD_FLG_SKIP_RELOC)
716 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
717 gd->fdt_blob = gd->new_fdt;
724 static int setup_reloc(void)
726 if (gd->flags & GD_FLG_SKIP_RELOC) {
727 debug("Skipping relocation due to flag\n");
731 #ifdef CONFIG_SYS_TEXT_BASE
732 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
735 * On all ColdFire arch cpu, monitor code starts always
736 * just after the default vector table location, so at 0x400
738 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
741 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
743 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
744 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
745 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
751 /* ARM calls relocate_code from its crt0.S */
752 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
754 static int jump_to_copy(void)
756 if (gd->flags & GD_FLG_SKIP_RELOC)
759 * x86 is special, but in a nice way. It uses a trampoline which
760 * enables the dcache if possible.
762 * For now, other archs use relocate_code(), which is implemented
763 * similarly for all archs. When we do generic relocation, hopefully
764 * we can make all archs enable the dcache prior to relocation.
766 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
768 * SDRAM and console are now initialised. The final stack can now
769 * be setup in SDRAM. Code execution will continue in Flash, but
770 * with the stack in SDRAM and Global Data in temporary memory
773 arch_setup_gd(gd->new_gd);
774 board_init_f_r_trampoline(gd->start_addr_sp);
776 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
783 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
784 static int mark_bootstage(void)
786 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
791 static int initf_console_record(void)
793 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
794 return console_record_init();
800 static int initf_dm(void)
802 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
805 ret = dm_init_and_scan(true);
809 #ifdef CONFIG_TIMER_EARLY
810 ret = dm_timer_init();
818 /* Architecture-specific memory reservation */
819 __weak int reserve_arch(void)
824 __weak int arch_cpu_init_dm(void)
829 static init_fnc_t init_sequence_f[] = {
830 #ifdef CONFIG_SANDBOX
834 #ifdef CONFIG_OF_CONTROL
841 initf_console_record,
842 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
843 /* TODO: can this go into arch_cpu_init()? */
846 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
849 arch_cpu_init, /* basic arch cpu dependent setup */
852 mark_bootstage, /* need timer, go after init dm */
853 #if defined(CONFIG_BOARD_EARLY_INIT_F)
856 /* TODO: can any of this go into arch_cpu_init()? */
857 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
858 get_clocks, /* get CPU and bus clocks (etc.) */
859 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
860 && !defined(CONFIG_TQM885D)
861 adjust_sdram_tbs_8xx,
863 /* TODO: can we rename this to timer_init()? */
866 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS) || \
867 defined(CONFIG_BLACKFIN) || defined(CONFIG_NDS32) || \
868 defined(CONFIG_SPARC)
869 timer_init, /* initialize timer */
871 #ifdef CONFIG_SYS_ALLOC_DPRAM
872 #if !defined(CONFIG_CPM2)
876 #if defined(CONFIG_BOARD_POSTCLK_INIT)
879 #if defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
882 env_init, /* initialize environment */
883 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
884 /* get CPU and bus clocks according to the environment variable */
886 /* adjust sdram refresh rate according to the new clock */
890 init_baud_rate, /* initialze baudrate settings */
891 serial_init, /* serial communications setup */
892 console_init_f, /* stage 1 init of console */
893 #ifdef CONFIG_SANDBOX
894 sandbox_early_getopt_check,
896 #ifdef CONFIG_OF_CONTROL
899 display_options, /* say that we are here */
900 display_text_info, /* show debugging info if required */
901 #if defined(CONFIG_MPC8260)
904 #endif /* CONFIG_MPC8260 */
905 #if defined(CONFIG_MPC83xx)
908 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
911 print_cpuinfo, /* display cpu info (and speed) */
912 #if defined(CONFIG_MPC5xxx)
914 #endif /* CONFIG_MPC5xxx */
915 #if defined(CONFIG_DISPLAY_BOARDINFO)
918 INIT_FUNC_WATCHDOG_INIT
919 #if defined(CONFIG_MISC_INIT_F)
922 INIT_FUNC_WATCHDOG_RESET
923 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
926 #if defined(CONFIG_HARD_SPI)
930 /* TODO: unify all these dram functions? */
931 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
932 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32)
933 dram_init, /* configure available RAM banks */
935 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
941 INIT_FUNC_WATCHDOG_RESET
942 #if defined(CONFIG_SYS_DRAM_TEST)
944 #endif /* CONFIG_SYS_DRAM_TEST */
945 INIT_FUNC_WATCHDOG_RESET
950 INIT_FUNC_WATCHDOG_RESET
952 * Now that we have DRAM mapped and working, we can
953 * relocate the code and continue running from DRAM.
955 * Reserve memory at end of RAM for (top down in that order):
956 * - area that won't get touched by U-Boot and Linux (optional)
957 * - kernel log buffer
961 * - board info struct
964 #if defined(CONFIG_BLACKFIN)
965 /* Blackfin u-boot monitor should be on top of the ram */
968 #if defined(CONFIG_SPARC)
971 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
978 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
982 #ifdef CONFIG_DM_VIDEO
988 /* TODO: Why the dependency on CONFIG_8xx? */
989 # if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
990 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
991 !defined(CONFIG_BLACKFIN) && !defined(CONFIG_M68K)
992 reserve_legacy_video,
994 #endif /* CONFIG_DM_VIDEO */
996 #if !defined(CONFIG_BLACKFIN)
999 #ifndef CONFIG_SPL_BUILD
1004 reserve_global_data,
1010 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
1013 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
1014 INIT_FUNC_WATCHDOG_RESET
1018 #ifdef CONFIG_SYS_EXTBDINFO
1021 INIT_FUNC_WATCHDOG_RESET
1024 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1027 do_elf_reloc_fixups,
1029 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
1035 void board_init_f(ulong boot_flags)
1037 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
1039 * For some archtectures, global data is initialized and used before
1040 * calling this function. The data should be preserved. For others,
1041 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
1042 * here to host global data until relocation.
1049 * Clear global data before it is accessed at debug print
1050 * in initcall_run_list. Otherwise the debug print probably
1051 * get the wrong vaule of gd->have_console.
1056 gd->flags = boot_flags;
1057 gd->have_console = 0;
1059 if (initcall_run_list(init_sequence_f))
1062 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
1063 !defined(CONFIG_EFI_APP)
1064 /* NOTREACHED - jump_to_copy() does not return */
1069 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1071 * For now this code is only used on x86.
1073 * init_sequence_f_r is the list of init functions which are run when
1074 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1075 * The following limitations must be considered when implementing an
1077 * - 'static' variables are read-only
1078 * - Global Data (gd->xxx) is read/write
1080 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1081 * supported). It _should_, if possible, copy global data to RAM and
1082 * initialise the CPU caches (to speed up the relocation process)
1084 * NOTE: At present only x86 uses this route, but it is intended that
1085 * all archs will move to this when generic relocation is implemented.
1087 static init_fnc_t init_sequence_f_r[] = {
1093 void board_init_f_r(void)
1095 if (initcall_run_list(init_sequence_f_r))
1099 * The pre-relocation drivers may be using memory that has now gone
1100 * away. Mark serial as unavailable - this will fall back to the debug
1101 * UART if available.
1103 gd->flags &= ~GD_FLG_SERIAL_READY;
1106 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1107 * Transfer execution from Flash to RAM by calculating the address
1108 * of the in-RAM copy of board_init_r() and calling it
1110 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1112 /* NOTREACHED - board_init_r() does not return */
1115 #endif /* CONFIG_X86 */