2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <linux/compiler.h>
16 #include <environment.h>
19 #if defined(CONFIG_CMD_IDE)
26 /* TODO: Can we move these into arch/ headers? */
40 #include <status_led.h>
43 #include <asm/errno.h>
48 #include <asm/sections.h>
50 #include <asm/init_helpers.h>
51 #include <asm/relocate.h>
54 #include <asm/state.h>
56 #include <linux/compiler.h>
59 * Pointer to initial global data area
61 * Here we initialize it if needed.
63 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
64 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
65 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
66 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
68 DECLARE_GLOBAL_DATA_PTR;
72 * sjg: IMO this code should be
73 * refactored to a single function, something like:
75 * void led_set_state(enum led_colour_t colour, int on);
77 /************************************************************************
78 * Coloured LED functionality
79 ************************************************************************
80 * May be supplied by boards if desired
82 __weak void coloured_LED_init(void) {}
83 __weak void red_led_on(void) {}
84 __weak void red_led_off(void) {}
85 __weak void green_led_on(void) {}
86 __weak void green_led_off(void) {}
87 __weak void yellow_led_on(void) {}
88 __weak void yellow_led_off(void) {}
89 __weak void blue_led_on(void) {}
90 __weak void blue_led_off(void) {}
93 * Why is gd allocated a register? Prior to reloc it might be better to
94 * just pass it around to each function in this file?
96 * After reloc one could argue that it is hardly used and doesn't need
97 * to be in a register. Or if it is it should perhaps hold pointers to all
98 * global data for all modules, so that post-reloc we can avoid the massive
99 * literal pool we get on ARM. Or perhaps just encourage each module to use
104 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
107 #if defined(CONFIG_WATCHDOG)
108 static int init_func_watchdog_init(void)
110 puts(" Watchdog enabled\n");
116 int init_func_watchdog_reset(void)
122 #endif /* CONFIG_WATCHDOG */
124 void __board_add_ram_info(int use_default)
126 /* please define platform specific board_add_ram_info() */
129 void board_add_ram_info(int)
130 __attribute__ ((weak, alias("__board_add_ram_info")));
132 static int init_baud_rate(void)
134 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
138 static int display_text_info(void)
140 #ifndef CONFIG_SANDBOX
141 ulong bss_start, bss_end;
143 bss_start = (ulong)&__bss_start;
144 bss_end = (ulong)&__bss_end;
146 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
147 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
150 #ifdef CONFIG_MODEM_SUPPORT
151 debug("Modem Support enabled\n");
153 #ifdef CONFIG_USE_IRQ
154 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
155 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
161 static int announce_dram_init(void)
167 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
168 static int init_func_ram(void)
170 #ifdef CONFIG_BOARD_TYPES
171 int board_type = gd->board_type;
173 int board_type = 0; /* use dummy arg */
176 gd->ram_size = initdram(board_type);
178 if (gd->ram_size > 0)
181 puts("*** failed ***\n");
186 static int show_dram_config(void)
188 unsigned long long size;
190 #ifdef CONFIG_NR_DRAM_BANKS
193 debug("\nRAM Configuration:\n");
194 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
195 size += gd->bd->bi_dram[i].size;
196 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
198 print_size(gd->bd->bi_dram[i].size, "\n");
206 print_size(size, "");
207 board_add_ram_info(0);
213 void __dram_init_banksize(void)
215 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
216 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
217 gd->bd->bi_dram[0].size = get_effective_memsize();
221 void dram_init_banksize(void)
222 __attribute__((weak, alias("__dram_init_banksize")));
224 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
225 static int init_func_i2c(void)
228 #ifdef CONFIG_SYS_I2C
231 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
238 #if defined(CONFIG_HARD_SPI)
239 static int init_func_spi(void)
249 static int zero_global_data(void)
251 memset((void *)gd, '\0', sizeof(gd_t));
256 static int setup_mon_len(void)
259 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
260 #elif defined(CONFIG_SANDBOX)
261 gd->mon_len = (ulong)&_end - (ulong)_init;
263 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
264 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
269 __weak int arch_cpu_init(void)
274 #ifdef CONFIG_OF_HOSTFILE
276 static int read_fdt_from_file(void)
278 struct sandbox_state *state = state_get_current();
279 const char *fname = state->fdt_fname;
285 blob = map_sysmem(CONFIG_SYS_FDT_LOAD_ADDR, 0);
286 if (!state->fdt_fname) {
287 err = fdt_create_empty_tree(blob, 256);
290 printf("Unable to create empty FDT: %s\n", fdt_strerror(err));
294 size = os_get_filesize(fname);
296 printf("Failed to file FDT file '%s'\n", fname);
299 fd = os_open(fname, OS_O_RDONLY);
301 printf("Failed to open FDT file '%s'\n", fname);
304 if (os_read(fd, blob, size) != size) {
317 #ifdef CONFIG_SANDBOX
318 static int setup_ram_buf(void)
320 struct sandbox_state *state = state_get_current();
322 gd->arch.ram_buf = state->ram_buf;
323 gd->ram_size = state->ram_size;
329 static int setup_fdt(void)
331 #ifdef CONFIG_OF_EMBED
332 /* Get a pointer to the FDT */
333 gd->fdt_blob = __dtb_dt_begin;
334 #elif defined CONFIG_OF_SEPARATE
335 /* FDT is at end of image */
336 gd->fdt_blob = (ulong *)&_end;
337 #elif defined(CONFIG_OF_HOSTFILE)
338 if (read_fdt_from_file()) {
339 puts("Failed to read control FDT\n");
343 /* Allow the early environment to override the fdt address */
344 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
345 (uintptr_t)gd->fdt_blob);
349 /* Get the top of usable RAM */
350 __weak ulong board_get_usable_ram_top(ulong total_size)
355 static int setup_dest_addr(void)
357 debug("Monitor len: %08lX\n", gd->mon_len);
359 * Ram is setup, size stored in gd !!
361 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
362 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
364 * Subtract specified amount of memory to hide so that it won't
365 * get "touched" at all by U-Boot. By fixing up gd->ram_size
366 * the Linux kernel should now get passed the now "corrected"
367 * memory size and won't touch it either. This should work
368 * for arch/ppc and arch/powerpc. Only Linux board ports in
369 * arch/powerpc with bootwrapper support, that recalculate the
370 * memory size from the SDRAM controller setup will have to
373 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
375 #ifdef CONFIG_SYS_SDRAM_BASE
376 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
378 gd->ram_top += get_effective_memsize();
379 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
380 gd->relocaddr = gd->ram_top;
381 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
382 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
384 * We need to make sure the location we intend to put secondary core
385 * boot code is reserved and not used by any part of u-boot
387 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
388 gd->relocaddr = determine_mp_bootpg(NULL);
389 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
395 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
396 static int reserve_logbuffer(void)
398 /* reserve kernel log buffer */
399 gd->relocaddr -= LOGBUFF_RESERVE;
400 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
407 /* reserve protected RAM */
408 static int reserve_pram(void)
412 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
413 gd->relocaddr -= (reg << 10); /* size is in kB */
414 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
418 #endif /* CONFIG_PRAM */
420 /* Round memory pointer down to next 4 kB limit */
421 static int reserve_round_4k(void)
423 gd->relocaddr &= ~(4096 - 1);
427 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
429 static int reserve_mmu(void)
431 /* reserve TLB table */
432 gd->arch.tlb_size = PGTABLE_SIZE;
433 gd->relocaddr -= gd->arch.tlb_size;
435 /* round down to next 64 kB limit */
436 gd->relocaddr &= ~(0x10000 - 1);
438 gd->arch.tlb_addr = gd->relocaddr;
439 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
440 gd->arch.tlb_addr + gd->arch.tlb_size);
446 static int reserve_lcd(void)
448 #ifdef CONFIG_FB_ADDR
449 gd->fb_base = CONFIG_FB_ADDR;
451 /* reserve memory for LCD display (always full pages) */
452 gd->relocaddr = lcd_setmem(gd->relocaddr);
453 gd->fb_base = gd->relocaddr;
454 #endif /* CONFIG_FB_ADDR */
457 #endif /* CONFIG_LCD */
459 static int reserve_trace(void)
462 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
463 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
464 debug("Reserving %dk for trace data at: %08lx\n",
465 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
471 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
472 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
473 static int reserve_video(void)
475 /* reserve memory for video display (always full pages) */
476 gd->relocaddr = video_setmem(gd->relocaddr);
477 gd->fb_base = gd->relocaddr;
483 static int reserve_uboot(void)
486 * reserve memory for U-Boot code, data & bss
487 * round down to next 4 kB limit
489 gd->relocaddr -= gd->mon_len;
490 gd->relocaddr &= ~(4096 - 1);
492 /* round down to next 64 kB limit so that IVPR stays aligned */
493 gd->relocaddr &= ~(65536 - 1);
496 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
499 gd->start_addr_sp = gd->relocaddr;
504 #ifndef CONFIG_SPL_BUILD
505 /* reserve memory for malloc() area */
506 static int reserve_malloc(void)
508 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
509 debug("Reserving %dk for malloc() at: %08lx\n",
510 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
514 /* (permanently) allocate a Board Info struct */
515 static int reserve_board(void)
517 gd->start_addr_sp -= sizeof(bd_t);
518 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
519 memset(gd->bd, '\0', sizeof(bd_t));
520 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
521 sizeof(bd_t), gd->start_addr_sp);
526 static int setup_machine(void)
528 #ifdef CONFIG_MACH_TYPE
529 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
534 static int reserve_global_data(void)
536 gd->start_addr_sp -= sizeof(gd_t);
537 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
538 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
539 sizeof(gd_t), gd->start_addr_sp);
543 static int reserve_fdt(void)
546 * If the device tree is sitting immediate above our image then we
547 * must relocate it. If it is embedded in the data section, then it
548 * will be relocated with other data.
551 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
553 gd->start_addr_sp -= gd->fdt_size;
554 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
555 debug("Reserving %lu Bytes for FDT at: %08lx\n",
556 gd->fdt_size, gd->start_addr_sp);
562 static int reserve_stacks(void)
564 #ifdef CONFIG_SPL_BUILD
566 gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */
567 gd->irq_sp = gd->start_addr_sp;
574 /* setup stack pointer for exceptions */
575 gd->start_addr_sp -= 16;
576 gd->start_addr_sp &= ~0xf;
577 gd->irq_sp = gd->start_addr_sp;
580 * Handle architecture-specific things here
581 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
582 * to handle this and put in arch/xxx/lib/stack.c
584 # if defined(CONFIG_ARM) && !defined(CONFIG_ARM64)
585 # ifdef CONFIG_USE_IRQ
586 gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
587 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
588 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp);
590 /* 8-byte alignment for ARM ABI compliance */
591 gd->start_addr_sp &= ~0x07;
593 /* leave 3 words for abort-stack, plus 1 for alignment */
594 gd->start_addr_sp -= 16;
595 # elif defined(CONFIG_PPC)
596 /* Clear initial stack frame */
597 s = (ulong *) gd->start_addr_sp;
598 *s = 0; /* Terminate back chain */
599 *++s = 0; /* NULL return address */
600 # endif /* Architecture specific code */
606 static int display_new_sp(void)
608 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
614 static int setup_board_part1(void)
619 * Save local variables to board info struct
622 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
623 bd->bi_memsize = gd->ram_size; /* size in bytes */
625 #ifdef CONFIG_SYS_SRAM_BASE
626 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
627 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
630 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
631 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
632 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
634 #if defined(CONFIG_MPC5xxx)
635 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
637 #if defined(CONFIG_MPC83xx)
638 bd->bi_immrbar = CONFIG_SYS_IMMR;
644 static int setup_board_part2(void)
648 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
649 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
650 #if defined(CONFIG_CPM2)
651 bd->bi_cpmfreq = gd->arch.cpm_clk;
652 bd->bi_brgfreq = gd->arch.brg_clk;
653 bd->bi_sccfreq = gd->arch.scc_clk;
654 bd->bi_vco = gd->arch.vco_out;
655 #endif /* CONFIG_CPM2 */
656 #if defined(CONFIG_MPC512X)
657 bd->bi_ipsfreq = gd->arch.ips_clk;
658 #endif /* CONFIG_MPC512X */
659 #if defined(CONFIG_MPC5xxx)
660 bd->bi_ipbfreq = gd->arch.ipb_clk;
661 bd->bi_pcifreq = gd->pci_clk;
662 #endif /* CONFIG_MPC5xxx */
668 #ifdef CONFIG_SYS_EXTBDINFO
669 static int setup_board_extra(void)
673 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
674 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
675 sizeof(bd->bi_r_version));
677 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
678 bd->bi_plb_busfreq = gd->bus_clk;
679 #if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
680 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
681 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
682 bd->bi_pci_busfreq = get_PCI_freq();
683 bd->bi_opbfreq = get_OPB_freq();
684 #elif defined(CONFIG_XILINX_405)
685 bd->bi_pci_busfreq = get_PCI_freq();
693 static int init_post(void)
695 post_bootmode_init();
696 post_run(NULL, POST_ROM | post_bootmode_get(0));
702 static int setup_dram_config(void)
704 /* Ram is board specific, so move it to board code ... */
705 dram_init_banksize();
710 static int reloc_fdt(void)
713 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
714 gd->fdt_blob = gd->new_fdt;
720 static int setup_reloc(void)
722 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
723 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
725 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
726 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
727 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
733 /* ARM calls relocate_code from its crt0.S */
734 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
736 static int jump_to_copy(void)
739 * x86 is special, but in a nice way. It uses a trampoline which
740 * enables the dcache if possible.
742 * For now, other archs use relocate_code(), which is implemented
743 * similarly for all archs. When we do generic relocation, hopefully
744 * we can make all archs enable the dcache prior to relocation.
748 * SDRAM and console are now initialised. The final stack can now
749 * be setup in SDRAM. Code execution will continue in Flash, but
750 * with the stack in SDRAM and Global Data in temporary memory
753 board_init_f_r_trampoline(gd->start_addr_sp);
755 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
762 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
763 static int mark_bootstage(void)
765 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
770 static init_fnc_t init_sequence_f[] = {
771 #ifdef CONFIG_SANDBOX
777 #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
778 /* TODO: can this go into arch_cpu_init()? */
781 arch_cpu_init, /* basic arch cpu dependent setup */
783 cpu_init_f, /* TODO(sjg@chromium.org): remove */
784 # ifdef CONFIG_OF_CONTROL
785 find_fdt, /* TODO(sjg@chromium.org): remove */
789 #ifdef CONFIG_OF_CONTROL
792 #if defined(CONFIG_BOARD_EARLY_INIT_F)
795 /* TODO: can any of this go into arch_cpu_init()? */
796 #if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
797 get_clocks, /* get CPU and bus clocks (etc.) */
798 #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
799 && !defined(CONFIG_TQM885D)
800 adjust_sdram_tbs_8xx,
802 /* TODO: can we rename this to timer_init()? */
805 #if defined(CONFIG_ARM) || defined(CONFIG_MIPS)
806 timer_init, /* initialize timer */
808 #ifdef CONFIG_SYS_ALLOC_DPRAM
809 #if !defined(CONFIG_CPM2)
813 #if defined(CONFIG_BOARD_POSTCLK_INIT)
816 #ifdef CONFIG_FSL_ESDHC
819 env_init, /* initialize environment */
820 #if defined(CONFIG_8xx_CPUCLK_DEFAULT)
821 /* get CPU and bus clocks according to the environment variable */
823 /* adjust sdram refresh rate according to the new clock */
827 init_baud_rate, /* initialze baudrate settings */
828 serial_init, /* serial communications setup */
829 console_init_f, /* stage 1 init of console */
830 #ifdef CONFIG_SANDBOX
831 sandbox_early_getopt_check,
833 #ifdef CONFIG_OF_CONTROL
836 display_options, /* say that we are here */
837 display_text_info, /* show debugging info if required */
838 #if defined(CONFIG_MPC8260)
841 #endif /* CONFIG_MPC8260 */
842 #if defined(CONFIG_MPC83xx)
848 print_cpuinfo, /* display cpu info (and speed) */
849 #if defined(CONFIG_MPC5xxx)
851 #endif /* CONFIG_MPC5xxx */
852 #if defined(CONFIG_DISPLAY_BOARDINFO)
853 checkboard, /* display board info */
855 INIT_FUNC_WATCHDOG_INIT
856 #if defined(CONFIG_MISC_INIT_F)
859 INIT_FUNC_WATCHDOG_RESET
860 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
863 #if defined(CONFIG_HARD_SPI)
867 dram_init_f, /* configure available RAM banks */
868 calculate_relocation_address,
871 /* TODO: unify all these dram functions? */
873 dram_init, /* configure available RAM banks */
875 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC)
881 INIT_FUNC_WATCHDOG_RESET
882 #if defined(CONFIG_SYS_DRAM_TEST)
884 #endif /* CONFIG_SYS_DRAM_TEST */
885 INIT_FUNC_WATCHDOG_RESET
890 INIT_FUNC_WATCHDOG_RESET
892 * Now that we have DRAM mapped and working, we can
893 * relocate the code and continue running from DRAM.
895 * Reserve memory at end of RAM for (top down in that order):
896 * - area that won't get touched by U-Boot and Linux (optional)
897 * - kernel log buffer
901 * - board info struct
904 #if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
911 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
919 /* TODO: Why the dependency on CONFIG_8xx? */
920 #if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
921 && !defined(CONFIG_ARM) && !defined(CONFIG_X86)
925 #ifndef CONFIG_SPL_BUILD
937 INIT_FUNC_WATCHDOG_RESET
941 #ifdef CONFIG_SYS_EXTBDINFO
944 INIT_FUNC_WATCHDOG_RESET
947 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
953 void board_init_f(ulong boot_flags)
955 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
957 * For some archtectures, global data is initialized and used before
958 * calling this function. The data should be preserved. For others,
959 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
960 * here to host global data until relocation.
967 * Clear global data before it is accessed at debug print
968 * in initcall_run_list. Otherwise the debug print probably
969 * get the wrong vaule of gd->have_console.
974 gd->flags = boot_flags;
975 gd->have_console = 0;
977 if (initcall_run_list(init_sequence_f))
980 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
981 /* NOTREACHED - jump_to_copy() does not return */
988 * For now this code is only used on x86.
990 * init_sequence_f_r is the list of init functions which are run when
991 * U-Boot is executing from Flash with a semi-limited 'C' environment.
992 * The following limitations must be considered when implementing an
994 * - 'static' variables are read-only
995 * - Global Data (gd->xxx) is read/write
997 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
998 * supported). It _should_, if possible, copy global data to RAM and
999 * initialise the CPU caches (to speed up the relocation process)
1001 * NOTE: At present only x86 uses this route, but it is intended that
1002 * all archs will move to this when generic relocation is implemented.
1004 static init_fnc_t init_sequence_f_r[] = {
1008 do_elf_reloc_fixups,
1013 void board_init_f_r(void)
1015 if (initcall_run_list(init_sequence_f_r))
1019 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1020 * Transfer execution from Flash to RAM by calculating the address
1021 * of the in-RAM copy of board_init_r() and calling it
1023 (board_init_r + gd->reloc_off)(gd, gd->relocaddr);
1025 /* NOTREACHED - board_init_r() does not return */
1028 #endif /* CONFIG_X86 */