2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <environment.h>
21 #include <init_helpers.h>
26 /* TODO: Can we move these into arch/ headers? */
36 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
43 #include <status_led.h>
49 #include <asm/sections.h>
50 #if defined(CONFIG_X86) || defined(CONFIG_ARC) || defined(CONFIG_XTENSA)
51 #include <asm/relocate.h>
54 #include <linux/errno.h>
57 * Pointer to initial global data area
59 * Here we initialize it if needed.
61 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
62 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
63 #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
64 DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
66 DECLARE_GLOBAL_DATA_PTR;
70 * TODO(sjg@chromium.org): IMO this code should be
71 * refactored to a single function, something like:
73 * void led_set_state(enum led_colour_t colour, int on);
75 /************************************************************************
76 * Coloured LED functionality
77 ************************************************************************
78 * May be supplied by boards if desired
80 __weak void coloured_LED_init(void) {}
81 __weak void red_led_on(void) {}
82 __weak void red_led_off(void) {}
83 __weak void green_led_on(void) {}
84 __weak void green_led_off(void) {}
85 __weak void yellow_led_on(void) {}
86 __weak void yellow_led_off(void) {}
87 __weak void blue_led_on(void) {}
88 __weak void blue_led_off(void) {}
91 * Why is gd allocated a register? Prior to reloc it might be better to
92 * just pass it around to each function in this file?
94 * After reloc one could argue that it is hardly used and doesn't need
95 * to be in a register. Or if it is it should perhaps hold pointers to all
96 * global data for all modules, so that post-reloc we can avoid the massive
97 * literal pool we get on ARM. Or perhaps just encourage each module to use
101 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
102 static int init_func_watchdog_init(void)
104 # if defined(CONFIG_HW_WATCHDOG) && \
105 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
106 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
107 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
108 defined(CONFIG_IMX_WATCHDOG))
110 puts(" Watchdog enabled\n");
117 int init_func_watchdog_reset(void)
123 #endif /* CONFIG_WATCHDOG */
125 __weak void board_add_ram_info(int use_default)
127 /* please define platform specific board_add_ram_info() */
130 static int init_baud_rate(void)
132 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
136 static int display_text_info(void)
138 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
139 ulong bss_start, bss_end, text_base;
141 bss_start = (ulong)&__bss_start;
142 bss_end = (ulong)&__bss_end;
144 #ifdef CONFIG_SYS_TEXT_BASE
145 text_base = CONFIG_SYS_TEXT_BASE;
147 text_base = CONFIG_SYS_MONITOR_BASE;
150 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
151 text_base, bss_start, bss_end);
154 #ifdef CONFIG_USE_IRQ
155 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
156 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
162 static int announce_dram_init(void)
168 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
169 static int init_func_ram(void)
175 static int show_dram_config(void)
177 unsigned long long size;
179 #ifdef CONFIG_NR_DRAM_BANKS
182 debug("\nRAM Configuration:\n");
183 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
184 size += gd->bd->bi_dram[i].size;
185 debug("Bank #%d: %llx ", i,
186 (unsigned long long)(gd->bd->bi_dram[i].start));
188 print_size(gd->bd->bi_dram[i].size, "\n");
196 print_size(size, "");
197 board_add_ram_info(0);
203 __weak int dram_init_banksize(void)
205 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
206 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
207 gd->bd->bi_dram[0].size = get_effective_memsize();
213 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
214 static int init_func_i2c(void)
217 #ifdef CONFIG_SYS_I2C
220 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
227 #if defined(CONFIG_HARD_SPI)
228 static int init_func_spi(void)
238 static int zero_global_data(void)
240 memset((void *)gd, '\0', sizeof(gd_t));
245 static int setup_mon_len(void)
247 #if defined(__ARM__) || defined(__MICROBLAZE__)
248 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
249 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
250 gd->mon_len = (ulong)&_end - (ulong)_init;
251 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
252 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
253 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
254 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
255 #elif defined(CONFIG_SYS_MONITOR_BASE)
256 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
257 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
262 __weak int arch_cpu_init(void)
267 __weak int mach_cpu_init(void)
272 /* Get the top of usable RAM */
273 __weak ulong board_get_usable_ram_top(ulong total_size)
275 #ifdef CONFIG_SYS_SDRAM_BASE
277 * Detect whether we have so much RAM that it goes past the end of our
278 * 32-bit address space. If so, clip the usable RAM so it doesn't.
280 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
282 * Will wrap back to top of 32-bit space when reservations
290 static int setup_dest_addr(void)
292 debug("Monitor len: %08lX\n", gd->mon_len);
294 * Ram is setup, size stored in gd !!
296 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
297 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
299 * Subtract specified amount of memory to hide so that it won't
300 * get "touched" at all by U-Boot. By fixing up gd->ram_size
301 * the Linux kernel should now get passed the now "corrected"
302 * memory size and won't touch it either. This should work
303 * for arch/ppc and arch/powerpc. Only Linux board ports in
304 * arch/powerpc with bootwrapper support, that recalculate the
305 * memory size from the SDRAM controller setup will have to
308 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
310 #ifdef CONFIG_SYS_SDRAM_BASE
311 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
313 gd->ram_top += get_effective_memsize();
314 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
315 gd->relocaddr = gd->ram_top;
316 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
317 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
319 * We need to make sure the location we intend to put secondary core
320 * boot code is reserved and not used by any part of u-boot
322 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
323 gd->relocaddr = determine_mp_bootpg(NULL);
324 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
330 #if defined(CONFIG_LOGBUFFER)
331 static int reserve_logbuffer(void)
333 #ifndef CONFIG_ALT_LB_ADDR
334 /* reserve kernel log buffer */
335 gd->relocaddr -= LOGBUFF_RESERVE;
336 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
345 /* reserve protected RAM */
346 static int reserve_pram(void)
350 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
351 gd->relocaddr -= (reg << 10); /* size is in kB */
352 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
356 #endif /* CONFIG_PRAM */
358 /* Round memory pointer down to next 4 kB limit */
359 static int reserve_round_4k(void)
361 gd->relocaddr &= ~(4096 - 1);
366 static int reserve_mmu(void)
368 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
369 /* reserve TLB table */
370 gd->arch.tlb_size = PGTABLE_SIZE;
371 gd->relocaddr -= gd->arch.tlb_size;
373 /* round down to next 64 kB limit */
374 gd->relocaddr &= ~(0x10000 - 1);
376 gd->arch.tlb_addr = gd->relocaddr;
377 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
378 gd->arch.tlb_addr + gd->arch.tlb_size);
380 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
382 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
383 * with location within secure ram.
385 gd->arch.tlb_allocated = gd->arch.tlb_addr;
393 static int reserve_video(void)
395 #ifdef CONFIG_DM_VIDEO
399 addr = gd->relocaddr;
400 ret = video_reserve(&addr);
403 gd->relocaddr = addr;
404 #elif defined(CONFIG_LCD)
405 # ifdef CONFIG_FB_ADDR
406 gd->fb_base = CONFIG_FB_ADDR;
408 /* reserve memory for LCD display (always full pages) */
409 gd->relocaddr = lcd_setmem(gd->relocaddr);
410 gd->fb_base = gd->relocaddr;
411 # endif /* CONFIG_FB_ADDR */
412 #elif defined(CONFIG_VIDEO) && \
413 (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) && \
414 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
415 !defined(CONFIG_M68K)
416 /* reserve memory for video display (always full pages) */
417 gd->relocaddr = video_setmem(gd->relocaddr);
418 gd->fb_base = gd->relocaddr;
424 static int reserve_trace(void)
427 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
428 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
429 debug("Reserving %dk for trace data at: %08lx\n",
430 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
436 static int reserve_uboot(void)
439 * reserve memory for U-Boot code, data & bss
440 * round down to next 4 kB limit
442 gd->relocaddr -= gd->mon_len;
443 gd->relocaddr &= ~(4096 - 1);
445 /* round down to next 64 kB limit so that IVPR stays aligned */
446 gd->relocaddr &= ~(65536 - 1);
449 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
452 gd->start_addr_sp = gd->relocaddr;
457 /* reserve memory for malloc() area */
458 static int reserve_malloc(void)
460 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
461 debug("Reserving %dk for malloc() at: %08lx\n",
462 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
466 /* (permanently) allocate a Board Info struct */
467 static int reserve_board(void)
470 gd->start_addr_sp -= sizeof(bd_t);
471 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
472 memset(gd->bd, '\0', sizeof(bd_t));
473 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
474 sizeof(bd_t), gd->start_addr_sp);
479 static int setup_machine(void)
481 #ifdef CONFIG_MACH_TYPE
482 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
487 static int reserve_global_data(void)
489 gd->start_addr_sp -= sizeof(gd_t);
490 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
491 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
492 sizeof(gd_t), gd->start_addr_sp);
496 static int reserve_fdt(void)
498 #ifndef CONFIG_OF_EMBED
500 * If the device tree is sitting immediately above our image then we
501 * must relocate it. If it is embedded in the data section, then it
502 * will be relocated with other data.
505 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
507 gd->start_addr_sp -= gd->fdt_size;
508 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
509 debug("Reserving %lu Bytes for FDT at: %08lx\n",
510 gd->fdt_size, gd->start_addr_sp);
517 int arch_reserve_stacks(void)
522 static int reserve_stacks(void)
524 /* make stack pointer 16-byte aligned */
525 gd->start_addr_sp -= 16;
526 gd->start_addr_sp &= ~0xf;
529 * let the architecture-specific code tailor gd->start_addr_sp and
532 return arch_reserve_stacks();
535 static int display_new_sp(void)
537 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
542 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
544 static int setup_board_part1(void)
549 * Save local variables to board info struct
551 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
552 bd->bi_memsize = gd->ram_size; /* size in bytes */
554 #ifdef CONFIG_SYS_SRAM_BASE
555 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
556 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
559 #if defined(CONFIG_8xx) || defined(CONFIG_MPC8260) || defined(CONFIG_5xx) || \
560 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
561 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
563 #if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K)
564 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
566 #if defined(CONFIG_MPC83xx)
567 bd->bi_immrbar = CONFIG_SYS_IMMR;
574 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
575 static int setup_board_part2(void)
579 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
580 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
581 #if defined(CONFIG_CPM2)
582 bd->bi_cpmfreq = gd->arch.cpm_clk;
583 bd->bi_brgfreq = gd->arch.brg_clk;
584 bd->bi_sccfreq = gd->arch.scc_clk;
585 bd->bi_vco = gd->arch.vco_out;
586 #endif /* CONFIG_CPM2 */
587 #if defined(CONFIG_MPC512X)
588 bd->bi_ipsfreq = gd->arch.ips_clk;
589 #endif /* CONFIG_MPC512X */
590 #if defined(CONFIG_MPC5xxx)
591 bd->bi_ipbfreq = gd->arch.ipb_clk;
592 bd->bi_pcifreq = gd->pci_clk;
593 #endif /* CONFIG_MPC5xxx */
594 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
595 bd->bi_pcifreq = gd->pci_clk;
597 #if defined(CONFIG_EXTRA_CLOCK)
598 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
599 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
600 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
608 static int init_post(void)
610 post_bootmode_init();
611 post_run(NULL, POST_ROM | post_bootmode_get(0));
617 static int reloc_fdt(void)
619 #ifndef CONFIG_OF_EMBED
620 if (gd->flags & GD_FLG_SKIP_RELOC)
623 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
624 gd->fdt_blob = gd->new_fdt;
631 static int setup_reloc(void)
633 if (gd->flags & GD_FLG_SKIP_RELOC) {
634 debug("Skipping relocation due to flag\n");
638 #ifdef CONFIG_SYS_TEXT_BASE
639 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
642 * On all ColdFire arch cpu, monitor code starts always
643 * just after the default vector table location, so at 0x400
645 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
648 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
650 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
651 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
652 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
658 #ifdef CONFIG_OF_BOARD_FIXUP
659 static int fix_fdt(void)
661 return board_fix_fdt((void *)gd->fdt_blob);
665 /* ARM calls relocate_code from its crt0.S */
666 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
667 !CONFIG_IS_ENABLED(X86_64)
669 static int jump_to_copy(void)
671 if (gd->flags & GD_FLG_SKIP_RELOC)
674 * x86 is special, but in a nice way. It uses a trampoline which
675 * enables the dcache if possible.
677 * For now, other archs use relocate_code(), which is implemented
678 * similarly for all archs. When we do generic relocation, hopefully
679 * we can make all archs enable the dcache prior to relocation.
681 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
683 * SDRAM and console are now initialised. The final stack can now
684 * be setup in SDRAM. Code execution will continue in Flash, but
685 * with the stack in SDRAM and Global Data in temporary memory
688 arch_setup_gd(gd->new_gd);
689 board_init_f_r_trampoline(gd->start_addr_sp);
691 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
698 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
699 static int mark_bootstage(void)
701 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
706 static int initf_console_record(void)
708 #if defined(CONFIG_CONSOLE_RECORD) && defined(CONFIG_SYS_MALLOC_F_LEN)
709 return console_record_init();
715 static int initf_dm(void)
717 #if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
720 ret = dm_init_and_scan(true);
724 #ifdef CONFIG_TIMER_EARLY
725 ret = dm_timer_init();
733 /* Architecture-specific memory reservation */
734 __weak int reserve_arch(void)
739 __weak int arch_cpu_init_dm(void)
744 static const init_fnc_t init_sequence_f[] = {
746 #ifdef CONFIG_OF_CONTROL
753 initf_console_record,
754 #if defined(CONFIG_HAVE_FSP)
757 arch_cpu_init, /* basic arch cpu dependent setup */
758 mach_cpu_init, /* SoC/machine dependent CPU setup */
761 mark_bootstage, /* need timer, go after init dm */
762 #if defined(CONFIG_BOARD_EARLY_INIT_F)
765 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
766 /* get CPU and bus clocks according to the environment variable */
767 get_clocks, /* get CPU and bus clocks (etc.) */
769 timer_init, /* initialize timer */
770 #if defined(CONFIG_BOARD_POSTCLK_INIT)
773 env_init, /* initialize environment */
774 init_baud_rate, /* initialze baudrate settings */
775 serial_init, /* serial communications setup */
776 console_init_f, /* stage 1 init of console */
777 display_options, /* say that we are here */
778 display_text_info, /* show debugging info if required */
779 #if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
783 #if defined(CONFIG_DISPLAY_CPUINFO)
784 print_cpuinfo, /* display cpu info (and speed) */
786 #if defined(CONFIG_DISPLAY_BOARDINFO)
789 INIT_FUNC_WATCHDOG_INIT
790 #if defined(CONFIG_MISC_INIT_F)
793 INIT_FUNC_WATCHDOG_RESET
794 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
797 #if defined(CONFIG_HARD_SPI)
801 /* TODO: unify all these dram functions? */
802 #if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_NDS32) || \
803 defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) || \
805 dram_init, /* configure available RAM banks */
807 #if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K)
813 INIT_FUNC_WATCHDOG_RESET
814 #if defined(CONFIG_SYS_DRAM_TEST)
816 #endif /* CONFIG_SYS_DRAM_TEST */
817 INIT_FUNC_WATCHDOG_RESET
822 INIT_FUNC_WATCHDOG_RESET
824 * Now that we have DRAM mapped and working, we can
825 * relocate the code and continue running from DRAM.
827 * Reserve memory at end of RAM for (top down in that order):
828 * - area that won't get touched by U-Boot and Linux (optional)
829 * - kernel log buffer
833 * - board info struct
836 #if defined(CONFIG_LOGBUFFER)
858 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
862 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
863 INIT_FUNC_WATCHDOG_RESET
867 #ifdef CONFIG_SYS_EXTBDINFO
870 #ifdef CONFIG_OF_BOARD_FIXUP
873 INIT_FUNC_WATCHDOG_RESET
876 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
881 #if defined(CONFIG_XTENSA)
884 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
885 !CONFIG_IS_ENABLED(X86_64)
891 void board_init_f(ulong boot_flags)
893 #ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
895 * For some architectures, global data is initialized and used before
896 * calling this function. The data should be preserved. For others,
897 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
898 * here to host global data until relocation.
905 * Clear global data before it is accessed at debug print
906 * in initcall_run_list. Otherwise the debug print probably
907 * get the wrong value of gd->have_console.
912 gd->flags = boot_flags;
913 gd->have_console = 0;
915 if (initcall_run_list(init_sequence_f))
918 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
919 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
920 /* NOTREACHED - jump_to_copy() does not return */
925 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
927 * For now this code is only used on x86.
929 * init_sequence_f_r is the list of init functions which are run when
930 * U-Boot is executing from Flash with a semi-limited 'C' environment.
931 * The following limitations must be considered when implementing an
933 * - 'static' variables are read-only
934 * - Global Data (gd->xxx) is read/write
936 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
937 * supported). It _should_, if possible, copy global data to RAM and
938 * initialise the CPU caches (to speed up the relocation process)
940 * NOTE: At present only x86 uses this route, but it is intended that
941 * all archs will move to this when generic relocation is implemented.
943 static const init_fnc_t init_sequence_f_r[] = {
944 #if !CONFIG_IS_ENABLED(X86_64)
951 void board_init_f_r(void)
953 if (initcall_run_list(init_sequence_f_r))
957 * The pre-relocation drivers may be using memory that has now gone
958 * away. Mark serial as unavailable - this will fall back to the debug
961 gd->flags &= ~GD_FLG_SERIAL_READY;
964 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
965 * Transfer execution from Flash to RAM by calculating the address
966 * of the in-RAM copy of board_init_r() and calling it
968 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
970 /* NOTREACHED - board_init_r() does not return */
973 #endif /* CONFIG_X86 */