2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
9 * Support for read and write access to EEPROM like memory devices. This
10 * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM).
11 * FRAM devices read and write data at bus speed. In particular, there is no
12 * write delay. Also, there is no limit imposed on the number of bytes that can
13 * be transferred with a single read or write.
15 * Use the following configuration options to ensure no unneeded performance
16 * degradation (typical for EEPROM) is incured for FRAM memory:
18 * #define CONFIG_SYS_I2C_FRAM
19 * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
28 extern void eeprom_init (void);
29 extern int eeprom_read (unsigned dev_addr, unsigned offset,
30 uchar *buffer, unsigned cnt);
31 extern int eeprom_write (unsigned dev_addr, unsigned offset,
32 uchar *buffer, unsigned cnt);
33 #if defined(CONFIG_SYS_EEPROM_WREN)
34 extern int eeprom_write_enable (unsigned dev_addr, int state);
38 #if defined(CONFIG_SYS_EEPROM_X40430)
39 /* Maximum number of times to poll for acknowledge after write */
40 #define MAX_ACKNOWLEDGE_POLLS 10
43 /* ------------------------------------------------------------------------- */
45 #if defined(CONFIG_CMD_EEPROM)
46 static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
48 const char *const fmt =
49 "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... ";
51 #if defined(CONFIG_SYS_I2C_MULTI_EEPROMS)
53 ulong dev_addr = simple_strtoul (argv[2], NULL, 16);
54 ulong addr = simple_strtoul (argv[3], NULL, 16);
55 ulong off = simple_strtoul (argv[4], NULL, 16);
56 ulong cnt = simple_strtoul (argv[5], NULL, 16);
59 ulong dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR;
60 ulong addr = simple_strtoul (argv[2], NULL, 16);
61 ulong off = simple_strtoul (argv[3], NULL, 16);
62 ulong cnt = simple_strtoul (argv[4], NULL, 16);
63 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */
65 # if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
67 # endif /* !CONFIG_SPI */
69 if (strcmp (argv[1], "read") == 0) {
72 printf (fmt, dev_addr, argv[1], addr, off, cnt);
74 rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);
78 } else if (strcmp (argv[1], "write") == 0) {
81 printf (fmt, dev_addr, argv[1], addr, off, cnt);
83 rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);
94 /*-----------------------------------------------------------------------
96 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
97 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
99 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
100 * 0x00000nxx for EEPROM address selectors and page number at n.
103 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
104 #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1 || CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2
105 #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2
109 int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
111 unsigned end = offset + cnt;
115 /* Read data until done or would cross a page boundary.
116 * We must write the address again when changing pages
117 * because the next page may be in a different device.
119 while (offset < end) {
121 #if !defined(CONFIG_SYS_I2C_FRAM)
125 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
128 blk_off = offset & 0xFF; /* block offset */
130 addr[0] = offset >> 8; /* block number */
131 addr[1] = blk_off; /* block offset */
136 blk_off = offset & 0xFF; /* block offset */
138 addr[0] = offset >> 16; /* block number */
139 addr[1] = offset >> 8; /* upper address octet */
140 addr[2] = blk_off; /* lower address octet */
142 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
144 addr[0] |= dev_addr; /* insert device address */
149 * For a FRAM device there is no limit on the number of the
150 * bytes that can be ccessed with the single read or write
153 #if !defined(CONFIG_SYS_I2C_FRAM)
154 maxlen = 0x100 - blk_off;
155 if (maxlen > I2C_RXTX_LEN)
156 maxlen = I2C_RXTX_LEN;
161 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
162 spi_read (addr, alen, buffer, len);
164 #if defined(CONFIG_SYS_I2C_EEPROM_BUS)
165 i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
167 if (i2c_read(addr[0], offset, alen - 1, buffer, len))
177 /*-----------------------------------------------------------------------
179 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is
180 * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM.
182 * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is
183 * 0x00000nxx for EEPROM address selectors and page number at n.
186 int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt)
188 unsigned end = offset + cnt;
192 #if defined(CONFIG_SYS_EEPROM_X40430)
193 uchar contr_r_addr[2];
200 #if defined(CONFIG_SYS_EEPROM_WREN)
201 eeprom_write_enable (dev_addr,1);
203 /* Write data until done or would cross a write page boundary.
204 * We must write the address again when changing pages
205 * because the address counter only increments within a page.
208 while (offset < end) {
210 #if !defined(CONFIG_SYS_I2C_FRAM)
214 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
217 blk_off = offset & 0xFF; /* block offset */
219 addr[0] = offset >> 8; /* block number */
220 addr[1] = blk_off; /* block offset */
225 blk_off = offset & 0xFF; /* block offset */
227 addr[0] = offset >> 16; /* block number */
228 addr[1] = offset >> 8; /* upper address octet */
229 addr[2] = blk_off; /* lower address octet */
231 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
233 addr[0] |= dev_addr; /* insert device address */
238 * For a FRAM device there is no limit on the number of the
239 * bytes that can be accessed with the single read or write
242 #if !defined(CONFIG_SYS_I2C_FRAM)
244 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
246 #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS)
247 #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1))
249 maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off);
251 maxlen = 0x100 - blk_off;
253 if (maxlen > I2C_RXTX_LEN)
254 maxlen = I2C_RXTX_LEN;
260 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
261 spi_write (addr, alen, buffer, len);
263 #if defined(CONFIG_SYS_EEPROM_X40430)
264 /* Get the value of the control register.
265 * Set current address (internal pointer in the x40430)
269 contr_r_addr[1] = 0xff;
271 addr_void[1] = addr[1];
272 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR
273 contr_r_addr[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
274 addr_void[0] |= CONFIG_SYS_I2C_EEPROM_ADDR;
277 if (i2c_read (contr_r_addr[0], contr_r_addr[1], 1, contr_reg, 1) != 0) {
280 ctrl_reg_v = contr_reg[0];
282 /* Are any of the eeprom blocks write protected?
284 if (ctrl_reg_v & 0x18) {
285 ctrl_reg_v &= ~0x18; /* reset block protect bits */
286 ctrl_reg_v |= 0x02; /* set write enable latch */
287 ctrl_reg_v &= ~0x04; /* clear RWEL */
289 /* Set write enable latch.
292 if (i2c_write (contr_r_addr[0], 0xff, 1, contr_reg, 1) != 0) {
296 /* Set register write enable latch.
299 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
303 /* Modify ctrl register.
305 contr_reg[0] = ctrl_reg_v;
306 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
310 /* The write (above) is an operation on NV memory.
311 * These can take some time (~5ms), and the device
312 * will not respond to further I2C messages till
313 * it's completed the write.
314 * So poll device for an I2C acknowledge.
315 * When we get one we know we can continue with other
319 for (i = 0; i < MAX_ACKNOWLEDGE_POLLS; i++) {
320 if (i2c_read (addr_void[0], addr_void[1], 1, contr_reg, 1) == 0)
322 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
323 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
326 if (i == MAX_ACKNOWLEDGE_POLLS) {
327 puts ("EEPROM poll acknowledge failed\n");
332 /* Is the write enable latch on?.
334 else if (!(ctrl_reg_v & 0x02)) {
335 /* Set write enable latch.
338 if (i2c_write (contr_r_addr[0], 0xFF, 1, contr_reg, 1) != 0) {
342 /* Write is enabled ... now write eeprom value.
345 #if defined(CONFIG_SYS_I2C_EEPROM_BUS)
346 i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS);
348 if (i2c_write(addr[0], offset, alen - 1, buffer, len))
355 #if defined(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
356 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
359 #if defined(CONFIG_SYS_EEPROM_WREN)
360 eeprom_write_enable (dev_addr,0);
365 #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
367 eeprom_probe (unsigned dev_addr, unsigned offset)
371 /* Probe the chip address
373 #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
374 chip = offset >> 8; /* block number */
376 chip = offset >> 16; /* block number */
377 #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
379 chip |= dev_addr; /* insert device address */
381 return (i2c_probe (chip));
385 /*-----------------------------------------------------------------------
388 #ifndef CONFIG_SYS_I2C_SPEED
389 #define CONFIG_SYS_I2C_SPEED 50000
392 void eeprom_init (void)
395 #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
398 #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
399 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
403 /*-----------------------------------------------------------------------
406 /***************************************************/
408 #if defined(CONFIG_CMD_EEPROM)
410 #ifdef CONFIG_SYS_I2C_MULTI_EEPROMS
412 eeprom, 6, 1, do_eeprom,
414 "read devaddr addr off cnt\n"
415 "eeprom write devaddr addr off cnt\n"
416 " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'"
418 #else /* One EEPROM */
420 eeprom, 5, 1, do_eeprom,
422 "read addr off cnt\n"
423 "eeprom write addr off cnt\n"
424 " - read/write `cnt' bytes at EEPROM offset `off'"
426 #endif /* CONFIG_SYS_I2C_MULTI_EEPROMS */