3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * I2C Functions similar to the standard memory functions.
27 * There are several parameters in many of the commands that bear further
30 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
31 * Each I2C chip on the bus has a unique address. On the I2C data bus,
32 * the address is the upper seven bits and the LSB is the "read/write"
33 * bit. Note that the {i2c_chip} address specified on the command
34 * line is not shifted up: e.g. a typical EEPROM memory chip may have
35 * an I2C address of 0x50, but the data put on the bus will be 0xA0
36 * for write and 0xA1 for read. This "non shifted" address notation
37 * matches at least half of the data sheets :-/.
39 * {addr} is the address (or offset) within the chip. Small memory
40 * chips have 8 bit addresses. Large memory chips have 16 bit
41 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
42 * Many non-memory chips have multiple registers and {addr} is used
43 * as the register index. Some non-memory chips have only one register
44 * and therefore don't need any {addr} parameter.
46 * The default {addr} parameter is one byte (.1) which works well for
47 * memories and registers with 8 bits of address space.
49 * You can specify the length of the {addr} field with the optional .0,
50 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
51 * manipulating a single register device which doesn't use an address
52 * field, use "0.0" for the address and the ".0" length field will
53 * suppress the address in the I2C data stream. This also works for
54 * successive reads using the I2C auto-incrementing memory pointer.
56 * If you are manipulating a large memory with 2-byte addresses, use
57 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
59 * Then there are the unfortunate memory chips that spill the most
60 * significant 1, 2, or 3 bits of address into the chip address byte.
61 * This effectively makes one chip (logically) look like 2, 4, or
62 * 8 chips. This is handled (awkwardly) by #defining
63 * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
64 * {addr} field (since .1 is the default, it doesn't actually have to
65 * be specified). Examples: given a memory chip at I2C chip address
66 * 0x50, the following would happen...
67 * i2c md 50 0 10 display 16 bytes starting at 0x000
68 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
69 * i2c md 50 100 10 display 16 bytes starting at 0x100
70 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
71 * i2c md 50 210 10 display 16 bytes starting at 0x210
72 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
73 * This is awfully ugly. It would be nice if someone would think up
74 * a better way of handling this.
76 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
81 #include <environment.h>
84 #include <asm/byteorder.h>
86 /* Display values from last command.
87 * Memory modify remembered values are different from display memory.
89 static uchar i2c_dp_last_chip;
90 static uint i2c_dp_last_addr;
91 static uint i2c_dp_last_alen;
92 static uint i2c_dp_last_length = 0x10;
94 static uchar i2c_mm_last_chip;
95 static uint i2c_mm_last_addr;
96 static uint i2c_mm_last_alen;
98 /* If only one I2C bus is present, the list of devices to ignore when
99 * the probe command is issued is represented by a 1D array of addresses.
100 * When multiple buses are present, the list is an array of bus-address
101 * pairs. The following macros take care of this */
103 #if defined(CONFIG_SYS_I2C_NOPROBES)
104 #if defined(CONFIG_I2C_MULTI_BUS)
109 } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
110 #define GET_BUS_NUM i2c_get_bus_num()
111 #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
112 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
113 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
114 #else /* single bus */
115 static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
116 #define GET_BUS_NUM 0
117 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
118 #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
119 #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
120 #endif /* CONFIG_MULTI_BUS */
122 #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0]))
125 #if defined(CONFIG_I2C_MUX)
126 static I2C_MUX_DEVICE *i2c_mux_devices = NULL;
127 static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS;
129 DECLARE_GLOBAL_DATA_PTR;
134 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]);
136 /* TODO: Implement architecture-specific get/set functions */
137 unsigned int __def_i2c_get_bus_speed(void)
139 return CONFIG_SYS_I2C_SPEED;
141 unsigned int i2c_get_bus_speed(void)
142 __attribute__((weak, alias("__def_i2c_get_bus_speed")));
144 int __def_i2c_set_bus_speed(unsigned int speed)
146 if (speed != CONFIG_SYS_I2C_SPEED)
151 int i2c_set_bus_speed(unsigned int)
152 __attribute__((weak, alias("__def_i2c_set_bus_speed")));
156 * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
158 #define DISP_LINE_LEN 16
160 int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
163 uint addr, alen, length;
164 int j, nbytes, linebytes;
166 /* We use the last specified parameters, unless new ones are
169 chip = i2c_dp_last_chip;
170 addr = i2c_dp_last_addr;
171 alen = i2c_dp_last_alen;
172 length = i2c_dp_last_length;
179 if ((flag & CMD_FLAG_REPEAT) == 0) {
181 * New command specified.
188 chip = simple_strtoul(argv[1], NULL, 16);
191 * I2C data address within the chip. This can be 1 or
192 * 2 bytes long. Some day it might be 3 bytes long :-).
194 addr = simple_strtoul(argv[2], NULL, 16);
196 for (j = 0; j < 8; j++) {
197 if (argv[2][j] == '.') {
198 alen = argv[2][j+1] - '0';
204 } else if (argv[2][j] == '\0')
209 * If another parameter, it is the length to display.
210 * Length is the number of objects, not number of bytes.
213 length = simple_strtoul(argv[3], NULL, 16);
219 * We buffer all read data, so we can make sure data is read only
224 unsigned char linebuf[DISP_LINE_LEN];
227 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
229 if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0)
230 puts ("Error reading the chip.\n");
232 printf("%04x:", addr);
234 for (j=0; j<linebytes; j++) {
235 printf(" %02x", *cp++);
240 for (j=0; j<linebytes; j++) {
241 if ((*cp < 0x20) || (*cp > 0x7e))
250 } while (nbytes > 0);
252 i2c_dp_last_chip = chip;
253 i2c_dp_last_addr = addr;
254 i2c_dp_last_alen = alen;
255 i2c_dp_last_length = length;
260 int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
262 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
265 int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
267 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
270 /* Write (fill) memory
273 * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
275 int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
284 if ((argc < 4) || (argc > 5)) {
290 * Chip is always specified.
292 chip = simple_strtoul(argv[1], NULL, 16);
295 * Address is always specified.
297 addr = simple_strtoul(argv[2], NULL, 16);
299 for (j = 0; j < 8; j++) {
300 if (argv[2][j] == '.') {
301 alen = argv[2][j+1] - '0';
307 } else if (argv[2][j] == '\0')
312 * Value to write is always specified.
314 byte = simple_strtoul(argv[3], NULL, 16);
320 count = simple_strtoul(argv[4], NULL, 16);
324 while (count-- > 0) {
325 if (i2c_write(chip, addr++, alen, &byte, 1) != 0)
326 puts ("Error writing the chip.\n");
328 * Wait for the write to complete. The write can take
329 * up to 10mSec (we allow a little more time).
331 * On some chips, while the write is in progress, the
332 * chip doesn't respond. This apparently isn't a
333 * universal feature so we don't take advantage of it.
336 * No write delay with FRAM devices.
338 #if !defined(CONFIG_SYS_I2C_FRAM)
343 for (timeout = 0; timeout < 10; timeout++) {
345 if (i2c_probe(chip) == 0)
354 /* Calculate a CRC on memory
357 * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
359 int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
376 * Chip is always specified.
378 chip = simple_strtoul(argv[1], NULL, 16);
381 * Address is always specified.
383 addr = simple_strtoul(argv[2], NULL, 16);
385 for (j = 0; j < 8; j++) {
386 if (argv[2][j] == '.') {
387 alen = argv[2][j+1] - '0';
393 } else if (argv[2][j] == '\0')
398 * Count is always specified
400 count = simple_strtoul(argv[3], NULL, 16);
402 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
404 * CRC a byte at a time. This is going to be slooow, but hey, the
405 * memories are small and slow too so hopefully nobody notices.
409 while (count-- > 0) {
410 if (i2c_read(chip, addr, alen, &byte, 1) != 0)
412 crc = crc32 (crc, &byte, 1);
416 puts ("Error reading the chip,\n");
418 printf ("%08lx\n", crc);
426 * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
427 * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
431 mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
440 extern char console_buffer[];
447 #ifdef CONFIG_BOOT_RETRY_TIME
448 reset_cmd_timeout(); /* got a good command to get here */
451 * We use the last specified parameters, unless new ones are
454 chip = i2c_mm_last_chip;
455 addr = i2c_mm_last_addr;
456 alen = i2c_mm_last_alen;
458 if ((flag & CMD_FLAG_REPEAT) == 0) {
460 * New command specified. Check for a size specification.
461 * Defaults to byte if no or incorrect specification.
463 size = cmd_get_data_size(argv[0], 1);
466 * Chip is always specified.
468 chip = simple_strtoul(argv[1], NULL, 16);
471 * Address is always specified.
473 addr = simple_strtoul(argv[2], NULL, 16);
475 for (j = 0; j < 8; j++) {
476 if (argv[2][j] == '.') {
477 alen = argv[2][j+1] - '0';
483 } else if (argv[2][j] == '\0')
489 * Print the address, followed by value. Then accept input for
490 * the next value. A non-converted value exits.
493 printf("%08lx:", addr);
494 if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0)
495 puts ("\nError reading the chip,\n");
497 data = cpu_to_be32(data);
499 printf(" %02lx", (data >> 24) & 0x000000FF);
501 printf(" %04lx", (data >> 16) & 0x0000FFFF);
503 printf(" %08lx", data);
506 nbytes = readline (" ? ");
509 * <CR> pressed as only input, don't modify current
510 * location and move to next.
515 #ifdef CONFIG_BOOT_RETRY_TIME
516 reset_cmd_timeout(); /* good enough to not time out */
519 #ifdef CONFIG_BOOT_RETRY_TIME
520 else if (nbytes == -2)
521 break; /* timed out, exit the command */
526 data = simple_strtoul(console_buffer, &endp, 16);
531 data = be32_to_cpu(data);
532 nbytes = endp - console_buffer;
534 #ifdef CONFIG_BOOT_RETRY_TIME
536 * good enough to not time out
540 if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0)
541 puts ("Error writing the chip.\n");
542 #ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
543 udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
551 i2c_mm_last_chip = chip;
552 i2c_mm_last_addr = addr;
553 i2c_mm_last_alen = alen;
560 * i2c probe {addr}{.0, .1, .2}
562 int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
565 #if defined(CONFIG_SYS_I2C_NOPROBES)
567 uchar bus = GET_BUS_NUM;
568 #endif /* NOPROBES */
570 puts ("Valid chip addresses:");
571 for (j = 0; j < 128; j++) {
572 #if defined(CONFIG_SYS_I2C_NOPROBES)
574 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
575 if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
583 if (i2c_probe(j) == 0)
588 #if defined(CONFIG_SYS_I2C_NOPROBES)
589 puts ("Excluded chip addresses:");
590 for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) {
591 if (COMPARE_BUS(bus,k))
592 printf(" %02X", NO_PROBE_ADDR(k));
602 * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
603 * {length} - Number of bytes to read
604 * {delay} - A DECIMAL number and defaults to 1000 uSec
606 int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
622 * Chip is always specified.
624 chip = simple_strtoul(argv[1], NULL, 16);
627 * Address is always specified.
629 addr = simple_strtoul(argv[2], NULL, 16);
631 for (j = 0; j < 8; j++) {
632 if (argv[2][j] == '.') {
633 alen = argv[2][j+1] - '0';
639 } else if (argv[2][j] == '\0')
644 * Length is the number of objects, not number of bytes.
647 length = simple_strtoul(argv[3], NULL, 16);
648 if (length > sizeof(bytes))
649 length = sizeof(bytes);
652 * The delay time (uSec) is optional.
656 delay = simple_strtoul(argv[4], NULL, 10);
661 if (i2c_read(chip, addr, alen, bytes, length) != 0)
662 puts ("Error reading the chip.\n");
671 * The SDRAM command is separately configured because many
672 * (most?) embedded boards don't use SDRAM DIMMs.
674 #if defined(CONFIG_CMD_SDRAM)
675 static void print_ddr2_tcyc (u_char const b)
677 printf ("%d.", (b >> 4) & 0x0F);
689 printf ("%d ns\n", b & 0x0F);
709 static void decode_bits (u_char const b, char const *str[], int const do_once)
713 for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
724 * i2c sdram {i2c_chip}
726 int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
728 enum { unknown, EDO, SDRAM, DDR2 } type;
735 static const char *decode_CAS_DDR2[] = {
736 " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
739 static const char *decode_CAS_default[] = {
740 " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
743 static const char *decode_CS_WE_default[] = {
744 " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
747 static const char *decode_byte21_default[] = {
749 " Redundant row address\n",
750 " Differential clock input\n",
751 " Registerd DQMB inputs\n",
752 " Buffered DQMB inputs\n",
754 " Registered address/control lines\n",
755 " Buffered address/control lines\n"
758 static const char *decode_byte22_DDR2[] = {
764 " Supports partial array self refresh\n",
765 " Supports 50 ohm ODT\n",
766 " Supports weak driver\n"
769 static const char *decode_row_density_DDR2[] = {
770 "512 MiB", "256 MiB", "128 MiB", "16 GiB",
771 "8 GiB", "4 GiB", "2 GiB", "1 GiB"
774 static const char *decode_row_density_default[] = {
775 "512 MiB", "256 MiB", "128 MiB", "64 MiB",
776 "32 MiB", "16 MiB", "8 MiB", "4 MiB"
784 * Chip is always specified.
786 chip = simple_strtoul (argv[1], NULL, 16);
788 if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) {
789 puts ("No SDRAM Serial Presence Detect found.\n");
794 for (j = 0; j < 63; j++) {
797 if (cksum != data[63]) {
798 printf ("WARNING: Configuration data checksum failure:\n"
799 " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
801 printf ("SPD data revision %d.%d\n",
802 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
803 printf ("Bytes used 0x%02X\n", data[0]);
804 printf ("Serial memory size 0x%02X\n", 1 << data[1]);
806 puts ("Memory type ");
826 puts ("Row address bits ");
827 if ((data[3] & 0x00F0) == 0)
828 printf ("%d\n", data[3] & 0x0F);
830 printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
832 puts ("Column address bits ");
833 if ((data[4] & 0x00F0) == 0)
834 printf ("%d\n", data[4] & 0x0F);
836 printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
840 printf ("Number of ranks %d\n",
841 (data[5] & 0x07) + 1);
844 printf ("Module rows %d\n", data[5]);
850 printf ("Module data width %d bits\n", data[6]);
853 printf ("Module data width %d bits\n",
854 (data[7] << 8) | data[6]);
858 puts ("Interface signal levels ");
860 case 0: puts ("TTL 5.0 V\n"); break;
861 case 1: puts ("LVTTL\n"); break;
862 case 2: puts ("HSTL 1.5 V\n"); break;
863 case 3: puts ("SSTL 3.3 V\n"); break;
864 case 4: puts ("SSTL 2.5 V\n"); break;
865 case 5: puts ("SSTL 1.8 V\n"); break;
866 default: puts ("unknown\n"); break;
871 printf ("SDRAM cycle time ");
872 print_ddr2_tcyc (data[9]);
875 printf ("SDRAM cycle time %d.%d ns\n",
876 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
882 printf ("SDRAM access time 0.%d%d ns\n",
883 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
886 printf ("SDRAM access time %d.%d ns\n",
887 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
891 puts ("EDC configuration ");
893 case 0: puts ("None\n"); break;
894 case 1: puts ("Parity\n"); break;
895 case 2: puts ("ECC\n"); break;
896 default: puts ("unknown\n"); break;
899 if ((data[12] & 0x80) == 0)
900 puts ("No self refresh, rate ");
902 puts ("Self refresh, rate ");
904 switch(data[12] & 0x7F) {
905 case 0: puts ("15.625 us\n"); break;
906 case 1: puts ("3.9 us\n"); break;
907 case 2: puts ("7.8 us\n"); break;
908 case 3: puts ("31.3 us\n"); break;
909 case 4: puts ("62.5 us\n"); break;
910 case 5: puts ("125 us\n"); break;
911 default: puts ("unknown\n"); break;
916 printf ("SDRAM width (primary) %d\n", data[13]);
919 printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
920 if ((data[13] & 0x80) != 0) {
921 printf (" (second bank) %d\n",
922 2 * (data[13] & 0x7F));
930 printf ("EDC width %d\n", data[14]);
934 printf ("EDC width %d\n",
937 if ((data[14] & 0x80) != 0) {
938 printf (" (second bank) %d\n",
939 2 * (data[14] & 0x7F));
946 printf ("Min clock delay, back-to-back random column addresses "
950 puts ("Burst length(s) ");
951 if (data[16] & 0x80) puts (" Page");
952 if (data[16] & 0x08) puts (" 8");
953 if (data[16] & 0x04) puts (" 4");
954 if (data[16] & 0x02) puts (" 2");
955 if (data[16] & 0x01) puts (" 1");
957 printf ("Number of banks %d\n", data[17]);
961 puts ("CAS latency(s) ");
962 decode_bits (data[18], decode_CAS_DDR2, 0);
966 puts ("CAS latency(s) ");
967 decode_bits (data[18], decode_CAS_default, 0);
973 puts ("CS latency(s) ");
974 decode_bits (data[19], decode_CS_WE_default, 0);
979 puts ("WE latency(s) ");
980 decode_bits (data[20], decode_CS_WE_default, 0);
986 puts ("Module attributes:\n");
988 puts (" TBD (bit 7)\n");
990 puts (" Analysis probe installed\n");
992 puts (" TBD (bit 5)\n");
994 puts (" FET switch external enable\n");
995 printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
996 if (data[20] & 0x11) {
997 printf (" %d active registers on DIMM\n",
998 (data[21] & 0x03) + 1);
1002 puts ("Module attributes:\n");
1006 decode_bits (data[21], decode_byte21_default, 0);
1012 decode_bits (data[22], decode_byte22_DDR2, 0);
1015 puts ("Device attributes:\n");
1016 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
1017 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
1018 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
1019 else puts (" Upper Vcc tolerance 10%\n");
1020 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
1021 else puts (" Lower Vcc tolerance 10%\n");
1022 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
1023 if (data[22] & 0x04) puts (" Supports precharge all\n");
1024 if (data[22] & 0x02) puts (" Supports auto precharge\n");
1025 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
1031 printf ("SDRAM cycle time (2nd highest CAS latency) ");
1032 print_ddr2_tcyc (data[23]);
1035 printf ("SDRAM cycle time (2nd highest CAS latency) %d."
1036 "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
1042 printf ("SDRAM access from clock (2nd highest CAS latency) 0."
1043 "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1046 printf ("SDRAM access from clock (2nd highest CAS latency) %d."
1047 "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
1053 printf ("SDRAM cycle time (3rd highest CAS latency) ");
1054 print_ddr2_tcyc (data[25]);
1057 printf ("SDRAM cycle time (3rd highest CAS latency) %d."
1058 "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
1064 printf ("SDRAM access from clock (3rd highest CAS latency) 0."
1065 "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1068 printf ("SDRAM access from clock (3rd highest CAS latency) %d."
1069 "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
1075 printf ("Minimum row precharge %d.%02d ns\n",
1076 (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
1079 printf ("Minimum row precharge %d ns\n", data[27]);
1085 printf ("Row active to row active min %d.%02d ns\n",
1086 (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
1089 printf ("Row active to row active min %d ns\n", data[28]);
1095 printf ("RAS to CAS delay min %d.%02d ns\n",
1096 (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
1099 printf ("RAS to CAS delay min %d ns\n", data[29]);
1103 printf ("Minimum RAS pulse width %d ns\n", data[30]);
1107 puts ("Density of each row ");
1108 decode_bits (data[31], decode_row_density_DDR2, 1);
1112 puts ("Density of each row ");
1113 decode_bits (data[31], decode_row_density_default, 1);
1120 puts ("Command and Address setup ");
1121 if (data[32] >= 0xA0) {
1122 printf ("1.%d%d ns\n",
1123 ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
1125 printf ("0.%d%d ns\n",
1126 ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
1130 printf ("Command and Address setup %c%d.%d ns\n",
1131 (data[32] & 0x80) ? '-' : '+',
1132 (data[32] >> 4) & 0x07, data[32] & 0x0F);
1138 puts ("Command and Address hold ");
1139 if (data[33] >= 0xA0) {
1140 printf ("1.%d%d ns\n",
1141 ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
1143 printf ("0.%d%d ns\n",
1144 ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
1148 printf ("Command and Address hold %c%d.%d ns\n",
1149 (data[33] & 0x80) ? '-' : '+',
1150 (data[33] >> 4) & 0x07, data[33] & 0x0F);
1156 printf ("Data signal input setup 0.%d%d ns\n",
1157 (data[34] >> 4) & 0x0F, data[34] & 0x0F);
1160 printf ("Data signal input setup %c%d.%d ns\n",
1161 (data[34] & 0x80) ? '-' : '+',
1162 (data[34] >> 4) & 0x07, data[34] & 0x0F);
1168 printf ("Data signal input hold 0.%d%d ns\n",
1169 (data[35] >> 4) & 0x0F, data[35] & 0x0F);
1172 printf ("Data signal input hold %c%d.%d ns\n",
1173 (data[35] & 0x80) ? '-' : '+',
1174 (data[35] >> 4) & 0x07, data[35] & 0x0F);
1178 puts ("Manufacturer's JEDEC ID ");
1179 for (j = 64; j <= 71; j++)
1180 printf ("%02X ", data[j]);
1182 printf ("Manufacturing Location %02X\n", data[72]);
1183 puts ("Manufacturer's Part Number ");
1184 for (j = 73; j <= 90; j++)
1185 printf ("%02X ", data[j]);
1187 printf ("Revision Code %02X %02X\n", data[91], data[92]);
1188 printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
1189 puts ("Assembly Serial Number ");
1190 for (j = 95; j <= 98; j++)
1191 printf ("%02X ", data[j]);
1195 printf ("Speed rating PC%d\n",
1196 data[126] == 0x66 ? 66 : data[126]);
1202 int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1204 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
1208 #if defined(CONFIG_I2C_MUX)
1209 int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1214 /* show all busses */
1216 I2C_MUX_DEVICE *device = i2c_mux_devices;
1218 printf ("Busses reached over muxes:\n");
1219 while (device != NULL) {
1220 printf ("Bus ID: %x\n", device->busid);
1221 printf (" reached over Mux(es):\n");
1223 while (mux != NULL) {
1224 printf (" %s@%x ch: %x\n", mux->name, mux->chip, mux->channel);
1227 device = device->next;
1230 I2C_MUX_DEVICE *dev;
1232 dev = i2c_mux_ident_muxstring ((uchar *)argv[1]);
1237 #endif /* CONFIG_I2C_MUX */
1239 #if defined(CONFIG_I2C_MULTI_BUS)
1240 int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1245 /* querying current setting */
1246 printf("Current bus is %d\n", i2c_get_bus_num());
1248 bus_idx = simple_strtoul(argv[1], NULL, 10);
1249 printf("Setting bus to %d\n", bus_idx);
1250 ret = i2c_set_bus_num(bus_idx);
1252 printf("Failure changing bus number (%d)\n", ret);
1256 #endif /* CONFIG_I2C_MULTI_BUS */
1258 int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1263 /* querying current speed */
1264 printf("Current bus speed=%d\n", i2c_get_bus_speed());
1266 speed = simple_strtoul(argv[1], NULL, 10);
1267 printf("Setting bus speed to %d Hz\n", speed);
1268 ret = i2c_set_bus_speed(speed);
1270 printf("Failure changing bus speed (%d)\n", ret);
1275 int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
1277 /* Strip off leading 'i2c' command argument */
1281 #if defined(CONFIG_I2C_MUX)
1282 if (!strncmp(argv[0], "bu", 2))
1283 return do_i2c_add_bus(cmdtp, flag, argc, argv);
1284 #endif /* CONFIG_I2C_MUX */
1285 if (!strncmp(argv[0], "sp", 2))
1286 return do_i2c_bus_speed(cmdtp, flag, argc, argv);
1287 #if defined(CONFIG_I2C_MULTI_BUS)
1288 if (!strncmp(argv[0], "de", 2))
1289 return do_i2c_bus_num(cmdtp, flag, argc, argv);
1290 #endif /* CONFIG_I2C_MULTI_BUS */
1291 if (!strncmp(argv[0], "md", 2))
1292 return do_i2c_md(cmdtp, flag, argc, argv);
1293 if (!strncmp(argv[0], "mm", 2))
1294 return do_i2c_mm(cmdtp, flag, argc, argv);
1295 if (!strncmp(argv[0], "mw", 2))
1296 return do_i2c_mw(cmdtp, flag, argc, argv);
1297 if (!strncmp(argv[0], "nm", 2))
1298 return do_i2c_nm(cmdtp, flag, argc, argv);
1299 if (!strncmp(argv[0], "cr", 2))
1300 return do_i2c_crc(cmdtp, flag, argc, argv);
1301 if (!strncmp(argv[0], "pr", 2))
1302 return do_i2c_probe(cmdtp, flag, argc, argv);
1303 if (!strncmp(argv[0], "re", 2))
1304 return do_i2c_reset(cmdtp, flag, argc, argv);
1305 if (!strncmp(argv[0], "lo", 2))
1306 return do_i2c_loop(cmdtp, flag, argc, argv);
1307 #if defined(CONFIG_CMD_SDRAM)
1308 if (!strncmp(argv[0], "sd", 2))
1309 return do_sdram(cmdtp, flag, argc, argv);
1316 /***************************************************/
1321 #if defined(CONFIG_I2C_MUX)
1322 "bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.\n"
1323 #endif /* CONFIG_I2C_MUX */
1324 "speed [speed] - show or set I2C bus speed\n"
1325 #if defined(CONFIG_I2C_MULTI_BUS)
1326 "i2c dev [dev] - show or set current I2C bus\n"
1327 #endif /* CONFIG_I2C_MULTI_BUS */
1328 "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
1329 "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
1330 "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
1331 "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
1332 "i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
1333 "i2c probe - show devices on the I2C bus\n"
1334 "i2c reset - re-init the I2C Controller\n"
1335 "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
1336 #if defined(CONFIG_CMD_SDRAM)
1337 "i2c sdram chip - print SDRAM configuration information\n"
1341 #if defined(CONFIG_I2C_MUX)
1343 int i2c_mux_add_device(I2C_MUX_DEVICE *dev)
1345 I2C_MUX_DEVICE *devtmp = i2c_mux_devices;
1347 if (i2c_mux_devices == NULL) {
1348 i2c_mux_devices = dev;
1351 while (devtmp->next != NULL)
1352 devtmp = devtmp->next;
1358 I2C_MUX_DEVICE *i2c_mux_search_device(int id)
1360 I2C_MUX_DEVICE *device = i2c_mux_devices;
1362 while (device != NULL) {
1363 if (device->busid == id)
1365 device = device->next;
1370 /* searches in the buf from *pos the next ':'.
1372 * 0 if found (with *pos = where)
1373 * < 0 if an error occured
1374 * > 0 if the end of buf is reached
1376 static int i2c_mux_search_next (int *pos, uchar *buf, int len)
1378 while ((buf[*pos] != ':') && (*pos < len)) {
1383 if (buf[*pos] != ':')
1388 static int i2c_mux_get_busid (void)
1390 int tmp = i2c_mux_busid;
1396 /* Analyses a Muxstring and sends immediately the
1397 Commands to the Muxes. Runs from Flash.
1399 int i2c_mux_ident_muxstring_f (uchar *buf)
1404 int len = strlen((char *)buf);
1412 ret = i2c_mux_search_next(&pos, buf, len);
1415 /* search address */
1418 ret = i2c_mux_search_next(&pos, buf, len);
1422 chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1424 /* search channel */
1427 ret = i2c_mux_search_next(&pos, buf, len);
1431 if (buf[pos] != 0) {
1435 channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1438 if (i2c_write(chip, 0, 0, &channel, 1) != 0) {
1439 printf ("Error setting Mux: chip:%x channel: \
1440 %x\n", chip, channel);
1451 /* Analyses a Muxstring and if this String is correct
1452 * adds a new I2C Bus.
1454 I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf)
1456 I2C_MUX_DEVICE *device;
1461 int len = strlen((char *)buf);
1464 device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE));
1466 device->busid = i2c_mux_get_busid ();
1467 device->next = NULL;
1469 mux = (I2C_MUX *)malloc (sizeof(I2C_MUX));
1471 /* search name of mux */
1473 ret = i2c_mux_search_next(&pos, buf, len);
1475 printf ("%s no name.\n", __FUNCTION__);
1476 mux->name = (char *)malloc (pos - oldpos + 1);
1477 memcpy (mux->name, &buf[oldpos], pos - oldpos);
1478 mux->name[pos - oldpos] = 0;
1479 /* search address */
1482 ret = i2c_mux_search_next(&pos, buf, len);
1484 printf ("%s no mux address.\n", __FUNCTION__);
1486 mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1488 /* search channel */
1491 ret = i2c_mux_search_next(&pos, buf, len);
1493 printf ("%s no mux channel.\n", __FUNCTION__);
1495 if (buf[pos] != 0) {
1499 mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16);
1502 if (device->mux == NULL)
1505 I2C_MUX *muxtmp = device->mux;
1506 while (muxtmp->next != NULL) {
1507 muxtmp = muxtmp->next;
1516 i2c_mux_add_device (device);
1523 int i2x_mux_select_mux(int bus)
1525 I2C_MUX_DEVICE *dev;
1528 if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) {
1529 /* select Default Mux Bus */
1530 #if defined(CONFIG_SYS_I2C_IVM_BUS)
1531 i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS);
1535 buf = (unsigned char *) getenv("EEprom_ivm");
1537 i2c_mux_ident_muxstring_f (buf);
1542 dev = i2c_mux_search_device(bus);
1547 while (mux != NULL) {
1548 if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) {
1549 printf ("Error setting Mux: chip:%x channel: \
1550 %x\n", mux->chip, mux->channel);
1557 #endif /* CONFIG_I2C_MUX */