3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 typedef struct _MII_reg_desc_t {
37 static const MII_reg_desc_t reg_0_5_desc_tbl[] = {
38 { 0, "PHY control register" },
39 { 1, "PHY status register" },
40 { 2, "PHY ID 1 register" },
41 { 3, "PHY ID 2 register" },
42 { 4, "Autonegotiation advertisement register" },
43 { 5, "Autonegotiation partner abilities register" },
46 typedef struct _MII_field_desc_t {
53 static const MII_field_desc_t reg_0_desc_tbl[] = {
54 { 15, 15, 0x01, "reset" },
55 { 14, 14, 0x01, "loopback" },
56 { 13, 6, 0x81, "speed selection" }, /* special */
57 { 12, 12, 0x01, "A/N enable" },
58 { 11, 11, 0x01, "power-down" },
59 { 10, 10, 0x01, "isolate" },
60 { 9, 9, 0x01, "restart A/N" },
61 { 8, 8, 0x01, "duplex" }, /* special */
62 { 7, 7, 0x01, "collision test enable" },
63 { 5, 0, 0x3f, "(reserved)" }
66 static const MII_field_desc_t reg_1_desc_tbl[] = {
67 { 15, 15, 0x01, "100BASE-T4 able" },
68 { 14, 14, 0x01, "100BASE-X full duplex able" },
69 { 13, 13, 0x01, "100BASE-X half duplex able" },
70 { 12, 12, 0x01, "10 Mbps full duplex able" },
71 { 11, 11, 0x01, "10 Mbps half duplex able" },
72 { 10, 10, 0x01, "100BASE-T2 full duplex able" },
73 { 9, 9, 0x01, "100BASE-T2 half duplex able" },
74 { 8, 8, 0x01, "extended status" },
75 { 7, 7, 0x01, "(reserved)" },
76 { 6, 6, 0x01, "MF preamble suppression" },
77 { 5, 5, 0x01, "A/N complete" },
78 { 4, 4, 0x01, "remote fault" },
79 { 3, 3, 0x01, "A/N able" },
80 { 2, 2, 0x01, "link status" },
81 { 1, 1, 0x01, "jabber detect" },
82 { 0, 0, 0x01, "extended capabilities" },
85 static const MII_field_desc_t reg_2_desc_tbl[] = {
86 { 15, 0, 0xffff, "OUI portion" },
89 static const MII_field_desc_t reg_3_desc_tbl[] = {
90 { 15, 10, 0x3f, "OUI portion" },
91 { 9, 4, 0x3f, "manufacturer part number" },
92 { 3, 0, 0x0f, "manufacturer rev. number" },
95 static const MII_field_desc_t reg_4_desc_tbl[] = {
96 { 15, 15, 0x01, "next page able" },
97 { 14, 14, 0x01, "reserved" },
98 { 13, 13, 0x01, "remote fault" },
99 { 12, 12, 0x01, "reserved" },
100 { 11, 11, 0x01, "asymmetric pause" },
101 { 10, 10, 0x01, "pause enable" },
102 { 9, 9, 0x01, "100BASE-T4 able" },
103 { 8, 8, 0x01, "100BASE-TX full duplex able" },
104 { 7, 7, 0x01, "100BASE-TX able" },
105 { 6, 6, 0x01, "10BASE-T full duplex able" },
106 { 5, 5, 0x01, "10BASE-T able" },
107 { 4, 0, 0x1f, "xxx to do" },
110 static const MII_field_desc_t reg_5_desc_tbl[] = {
111 { 15, 15, 0x01, "next page able" },
112 { 14, 14, 0x01, "acknowledge" },
113 { 13, 13, 0x01, "remote fault" },
114 { 12, 12, 0x01, "(reserved)" },
115 { 11, 11, 0x01, "asymmetric pause able" },
116 { 10, 10, 0x01, "pause able" },
117 { 9, 9, 0x01, "100BASE-T4 able" },
118 { 8, 8, 0x01, "100BASE-X full duplex able" },
119 { 7, 7, 0x01, "100BASE-TX able" },
120 { 6, 6, 0x01, "10BASE-T full duplex able" },
121 { 5, 5, 0x01, "10BASE-T able" },
122 { 4, 0, 0x1f, "xxx to do" },
124 typedef struct _MII_field_desc_and_len_t {
125 const MII_field_desc_t *pdesc;
127 } MII_field_desc_and_len_t;
129 static const MII_field_desc_and_len_t desc_and_len_tbl[] = {
130 { reg_0_desc_tbl, ARRAY_SIZE(reg_0_desc_tbl) },
131 { reg_1_desc_tbl, ARRAY_SIZE(reg_1_desc_tbl) },
132 { reg_2_desc_tbl, ARRAY_SIZE(reg_2_desc_tbl) },
133 { reg_3_desc_tbl, ARRAY_SIZE(reg_3_desc_tbl) },
134 { reg_4_desc_tbl, ARRAY_SIZE(reg_4_desc_tbl) },
135 { reg_5_desc_tbl, ARRAY_SIZE(reg_5_desc_tbl) },
138 static void dump_reg(
140 const MII_reg_desc_t *prd,
141 const MII_field_desc_and_len_t *pdl);
143 static int special_field(
145 const MII_field_desc_t *pdesc,
148 static void MII_dump_0_to_5(
155 for (i = 0; i < 6; i++) {
156 if ((reglo <= i) && (i <= reghi))
157 dump_reg(regvals[i], ®_0_5_desc_tbl[i],
158 &desc_and_len_tbl[i]);
162 static void dump_reg(
164 const MII_reg_desc_t *prd,
165 const MII_field_desc_and_len_t *pdl)
168 ushort mask_in_place;
169 const MII_field_desc_t *pdesc;
171 printf("%u. (%04hx) -- %s --\n",
172 prd->regno, regval, prd->name);
174 for (i = 0; i < pdl->len; i++) {
175 pdesc = &pdl->pdesc[i];
177 mask_in_place = pdesc->mask << pdesc->lo;
179 printf(" (%04hx:%04hx) %u.",
181 regval & mask_in_place,
184 if (special_field(prd->regno, pdesc, regval)) {
187 if (pdesc->hi == pdesc->lo)
188 printf("%2u ", pdesc->lo);
190 printf("%2u-%2u", pdesc->hi, pdesc->lo);
192 (regval & mask_in_place) >> pdesc->lo,
210 static int special_field(
212 const MII_field_desc_t *pdesc,
215 if ((regno == 0) && (pdesc->lo == 6)) {
216 ushort speed_bits = regval & PHY_BMCR_SPEED_MASK;
217 printf("%2u,%2u = b%u%u speed selection = %s Mbps",
221 speed_bits == PHY_BMCR_1000_MBPS ? "1000" :
222 speed_bits == PHY_BMCR_100_MBPS ? "100" :
223 speed_bits == PHY_BMCR_10_MBPS ? "10" :
228 else if ((regno == 0) && (pdesc->lo == 8)) {
229 printf("%2u = %5u duplex = %s",
231 (regval >> pdesc->lo) & 1,
232 ((regval >> pdesc->lo) & 1) ? "full" : "half");
236 else if ((regno == 4) && (pdesc->lo == 0)) {
237 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
238 printf("%2u-%2u = %5u selector = %s",
239 pdesc->hi, pdesc->lo, sel_bits,
240 sel_bits == PHY_ANLPAR_PSB_802_3 ?
242 sel_bits == PHY_ANLPAR_PSB_802_9 ?
243 "IEEE 802.9 ISLAN-16T" :
248 else if ((regno == 5) && (pdesc->lo == 0)) {
249 ushort sel_bits = (regval >> pdesc->lo) & pdesc->mask;
250 printf("%2u-%2u = %u selector = %s",
251 pdesc->hi, pdesc->lo, sel_bits,
252 sel_bits == PHY_ANLPAR_PSB_802_3 ?
254 sel_bits == PHY_ANLPAR_PSB_802_9 ?
255 "IEEE 802.9 ISLAN-16T" :
263 static char last_op[2];
264 static uint last_data;
265 static uint last_addr_lo;
266 static uint last_addr_hi;
267 static uint last_reg_lo;
268 static uint last_reg_hi;
270 static void extract_range(
276 *plo = simple_strtoul(input, &end, 16);
279 *phi = simple_strtoul(end, NULL, 16);
286 /* ---------------------------------------------------------------- */
287 static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
290 unsigned char addrlo, addrhi, reglo, reghi;
291 unsigned char addr, reg;
297 return cmd_usage(cmdtp);
299 #if defined(CONFIG_MII_INIT)
304 * We use the last specified parameters, unless new ones are
309 addrlo = last_addr_lo;
310 addrhi = last_addr_hi;
315 if ((flag & CMD_FLAG_REPEAT) == 0) {
317 if (strlen(argv[1]) > 1)
323 extract_range(argv[2], &addrlo, &addrhi);
325 extract_range(argv[3], ®lo, ®hi);
327 data = simple_strtoul (argv[4], NULL, 16);
330 /* use current device */
331 devname = miiphy_get_current_dev();
334 * check info/read/write.
337 unsigned char j, start, end;
343 * Look for any and all PHYs. Valid addresses are 0..31.
346 start = addrlo; end = addrhi;
351 for (j = start; j <= end; j++) {
352 if (miiphy_info (devname, j, &oui, &model, &rev) == 0) {
353 printf("PHY 0x%02X: "
359 miiphy_speed (devname, j),
360 miiphy_is_1000base_x (devname, j)
362 (miiphy_duplex (devname, j) == FULL)
366 } else if (op[0] == 'r') {
367 for (addr = addrlo; addr <= addrhi; addr++) {
368 for (reg = reglo; reg <= reghi; reg++) {
370 if (miiphy_read (devname, addr, reg, &data) != 0) {
372 "Error reading from the PHY addr=%02x reg=%02x\n",
376 if ((addrlo != addrhi) || (reglo != reghi))
377 printf("addr=%02x reg=%02x data=",
378 (uint)addr, (uint)reg);
379 printf("%04X\n", data & 0x0000FFFF);
382 if ((addrlo != addrhi) && (reglo != reghi))
385 } else if (op[0] == 'w') {
386 for (addr = addrlo; addr <= addrhi; addr++) {
387 for (reg = reglo; reg <= reghi; reg++) {
388 if (miiphy_write (devname, addr, reg, data) != 0) {
389 printf("Error writing to the PHY addr=%02x reg=%02x\n",
395 } else if (strncmp(op, "du", 2) == 0) {
398 if ((reglo > 5) || (reghi > 5)) {
400 "The MII dump command only formats the "
401 "standard MII registers, 0-5.\n");
404 for (addr = addrlo; addr <= addrhi; addr++) {
405 for (reg = reglo; reg < reghi + 1; reg++) {
406 if (miiphy_read(devname, addr, reg, ®s[reg]) != 0) {
409 "Error reading from the PHY addr=%02x reg=%02x\n",
415 MII_dump_0_to_5(regs, reglo, reghi);
418 } else if (strncmp(op, "de", 2) == 0) {
422 miiphy_set_current_dev (argv[2]);
424 return cmd_usage(cmdtp);
428 * Save the parameters for repeats.
432 last_addr_lo = addrlo;
433 last_addr_hi = addrhi;
441 /***************************************************/
445 "MII utility commands",
446 "device - list available devices\n"
447 "mii device <devname> - set current device\n"
448 "mii info <addr> - display MII PHY info\n"
449 "mii read <addr> <reg> - read MII PHY <addr> register <reg>\n"
450 "mii write <addr> <reg> <data> - write MII PHY <addr> register <reg>\n"
451 "mii dump <addr> <reg> - pretty-print <addr> <reg> (0-5 only)\n"
452 "Addr and/or reg may be ranges, e.g. 2-7."