git.sur5r.net Git - u-boot/blob - common/soft_i2c.c

   1 /*
   2  * (C) Copyright 2001, 2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  *
  23  * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  24  * vanbaren@cideas.com.  It was heavily influenced by LiMon, written by
  25  * Neil Russell.
  26  */
  27
  28 #include <common.h>
  29 #ifdef  CONFIG_MPC8260                  /* only valid for MPC8260 */
  30 #include <ioports.h>
  31 #endif
  32 #ifdef  CONFIG_AT91RM9200               /* need this for the at91rm9200 */
  33 #include <asm/io.h>
  34 #include <asm/arch/hardware.h>
  35 #endif
  36 #ifdef  CONFIG_IXP425                   /* only valid for IXP425 */
  37 #include <asm/arch/ixp425.h>
  38 #endif
  39 #ifdef CONFIG_LPC2292
  40 #include <asm/arch/hardware.h>
  41 #endif
  42 #include <i2c.h>
  43
  44 #if defined(CONFIG_SOFT_I2C)
  45
  46 /* #define      DEBUG_I2C       */
  47
  48 #ifdef DEBUG_I2C
  49 DECLARE_GLOBAL_DATA_PTR;
  50 #endif
  51
  52
  53 /*-----------------------------------------------------------------------
  54  * Definitions
  55  */
  56
  57 #define RETRIES         0
  58
  59
  60 #define I2C_ACK         0               /* PD_SDA level to ack a byte */
  61 #define I2C_NOACK       1               /* PD_SDA level to noack a byte */
  62
  63
  64 #ifdef DEBUG_I2C
  65 #define PRINTD(fmt,args...)     do {    \
  66         if (gd->have_console)           \
  67                 printf (fmt ,##args);   \
  68         } while (0)
  69 #else
  70 #define PRINTD(fmt,args...)
  71 #endif
  72
  73 /*-----------------------------------------------------------------------
  74  * Local functions
  75  */
  76 static void  send_reset (void);
  77 static void  send_start (void);
  78 static void  send_stop  (void);
  79 static void  send_ack   (int);
  80 static int   write_byte (uchar byte);
  81 static uchar read_byte  (int);
  82
  83
  84 /*-----------------------------------------------------------------------
  85  * Send a reset sequence consisting of 9 clocks with the data signal high
  86  * to clock any confused device back into an idle state.  Also send a
  87  * <stop> at the end of the sequence for belts & suspenders.
  88  */
  89 static void send_reset(void)
  90 {
  91 #ifdef  CONFIG_MPC8260
  92         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
  93 #endif
  94 #ifdef  CONFIG_8xx
  95         volatile immap_t *immr = (immap_t *)CFG_IMMR;
  96 #endif
  97         int j;
  98
  99         I2C_SCL(1);
 100         I2C_SDA(1);
 101 #ifdef  I2C_INIT
 102         I2C_INIT;
 103 #endif
 104         I2C_TRISTATE;
 105         for(j = 0; j < 9; j++) {
 106                 I2C_SCL(0);
 107                 I2C_DELAY;
 108                 I2C_DELAY;
 109                 I2C_SCL(1);
 110                 I2C_DELAY;
 111                 I2C_DELAY;
 112         }
 113         send_stop();
 114         I2C_TRISTATE;
 115 }
 116
 117 /*-----------------------------------------------------------------------
 118  * START: High -> Low on SDA while SCL is High
 119  */
 120 static void send_start(void)
 121 {
 122 #ifdef  CONFIG_MPC8260
 123         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
 124 #endif
 125 #ifdef  CONFIG_8xx
 126         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 127 #endif
 128
 129         I2C_DELAY;
 130         I2C_SDA(1);
 131         I2C_ACTIVE;
 132         I2C_DELAY;
 133         I2C_SCL(1);
 134         I2C_DELAY;
 135         I2C_SDA(0);
 136         I2C_DELAY;
 137 }
 138
 139 /*-----------------------------------------------------------------------
 140  * STOP: Low -> High on SDA while SCL is High
 141  */
 142 static void send_stop(void)
 143 {
 144 #ifdef  CONFIG_MPC8260
 145         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
 146 #endif
 147 #ifdef  CONFIG_8xx
 148         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 149 #endif
 150
 151         I2C_SCL(0);
 152         I2C_DELAY;
 153         I2C_SDA(0);
 154         I2C_ACTIVE;
 155         I2C_DELAY;
 156         I2C_SCL(1);
 157         I2C_DELAY;
 158         I2C_SDA(1);
 159         I2C_DELAY;
 160         I2C_TRISTATE;
 161 }
 162
 163
 164 /*-----------------------------------------------------------------------
 165  * ack should be I2C_ACK or I2C_NOACK
 166  */
 167 static void send_ack(int ack)
 168 {
 169 #ifdef  CONFIG_MPC8260
 170         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
 171 #endif
 172 #ifdef  CONFIG_8xx
 173         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 174 #endif
 175
 176         I2C_SCL(0);
 177         I2C_DELAY;
 178         I2C_ACTIVE;
 179         I2C_SDA(ack);
 180         I2C_DELAY;
 181         I2C_SCL(1);
 182         I2C_DELAY;
 183         I2C_DELAY;
 184         I2C_SCL(0);
 185         I2C_DELAY;
 186 }
 187
 188
 189 /*-----------------------------------------------------------------------
 190  * Send 8 bits and look for an acknowledgement.
 191  */
 192 static int write_byte(uchar data)
 193 {
 194 #ifdef  CONFIG_MPC8260
 195         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
 196 #endif
 197 #ifdef  CONFIG_8xx
 198         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 199 #endif
 200         int j;
 201         int nack;
 202
 203         I2C_ACTIVE;
 204         for(j = 0; j < 8; j++) {
 205                 I2C_SCL(0);
 206                 I2C_DELAY;
 207                 I2C_SDA(data & 0x80);
 208                 I2C_DELAY;
 209                 I2C_SCL(1);
 210                 I2C_DELAY;
 211                 I2C_DELAY;
 212
 213                 data <<= 1;
 214         }
 215
 216         /*
 217          * Look for an <ACK>(negative logic) and return it.
 218          */
 219         I2C_SCL(0);
 220         I2C_DELAY;
 221         I2C_SDA(1);
 222         I2C_TRISTATE;
 223         I2C_DELAY;
 224         I2C_SCL(1);
 225         I2C_DELAY;
 226         I2C_DELAY;
 227         nack = I2C_READ;
 228         I2C_SCL(0);
 229         I2C_DELAY;
 230         I2C_ACTIVE;
 231
 232         return(nack);   /* not a nack is an ack */
 233 }
 234
 235
 236 /*-----------------------------------------------------------------------
 237  * if ack == I2C_ACK, ACK the byte so can continue reading, else
 238  * send I2C_NOACK to end the read.
 239  */
 240 static uchar read_byte(int ack)
 241 {
 242 #ifdef  CONFIG_MPC8260
 243         volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
 244 #endif
 245 #ifdef  CONFIG_8xx
 246         volatile immap_t *immr = (immap_t *)CFG_IMMR;
 247 #endif
 248         int  data;
 249         int  j;
 250
 251         /*
 252          * Read 8 bits, MSB first.
 253          */
 254         I2C_TRISTATE;
 255         I2C_SDA(1);
 256         data = 0;
 257         for(j = 0; j < 8; j++) {
 258                 I2C_SCL(0);
 259                 I2C_DELAY;
 260                 I2C_SCL(1);
 261                 I2C_DELAY;
 262                 data <<= 1;
 263                 data |= I2C_READ;
 264                 I2C_DELAY;
 265         }
 266         send_ack(ack);
 267
 268         return(data);
 269 }
 270
 271 /*=====================================================================*/
 272 /*                         Public Functions                            */
 273 /*=====================================================================*/
 274
 275 /*-----------------------------------------------------------------------
 276  * Initialization
 277  */
 278 void i2c_init (int speed, int slaveaddr)
 279 {
 280         /*
 281          * WARNING: Do NOT save speed in a static variable: if the
 282          * I2C routines are called before RAM is initialized (to read
 283          * the DIMM SPD, for instance), RAM won't be usable and your
 284          * system will crash.
 285          */
 286         send_reset ();
 287 }
 288
 289 /*-----------------------------------------------------------------------
 290  * Probe to see if a chip is present.  Also good for checking for the
 291  * completion of EEPROM writes since the chip stops responding until
 292  * the write completes (typically 10mSec).
 293  */
 294 int i2c_probe(uchar addr)
 295 {
 296         int rc;
 297
 298         /*
 299          * perform 1 byte write transaction with just address byte
 300          * (fake write)
 301          */
 302         send_start();
 303         rc = write_byte ((addr << 1) | 0);
 304         send_stop();
 305
 306         return (rc ? 1 : 0);
 307 }
 308
 309 /*-----------------------------------------------------------------------
 310  * Read bytes
 311  */
 312 int  i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 313 {
 314         int shift;
 315         PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
 316                 chip, addr, alen, buffer, len);
 317
 318 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
 319         /*
 320          * EEPROM chips that implement "address overflow" are ones
 321          * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
 322          * address and the extra bits end up in the "chip address"
 323          * bit slots. This makes a 24WC08 (1Kbyte) chip look like
 324          * four 256 byte chips.
 325          *
 326          * Note that we consider the length of the address field to
 327          * still be one byte because the extra address bits are
 328          * hidden in the chip address.
 329          */
 330         chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
 331
 332         PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
 333                 chip, addr);
 334 #endif
 335
 336         /*
 337          * Do the addressing portion of a write cycle to set the
 338          * chip's address pointer.  If the address length is zero,
 339          * don't do the normal write cycle to set the address pointer,
 340          * there is no address pointer in this chip.
 341          */
 342         send_start();
 343         if(alen > 0) {
 344                 if(write_byte(chip << 1)) {     /* write cycle */
 345                         send_stop();
 346                         PRINTD("i2c_read, no chip responded %02X\n", chip);
 347                         return(1);
 348                 }
 349                 shift = (alen-1) * 8;
 350                 while(alen-- > 0) {
 351                         if(write_byte(addr >> shift)) {
 352                                 PRINTD("i2c_read, address not <ACK>ed\n");
 353                                 return(1);
 354                         }
 355                         shift -= 8;
 356                 }
 357                 send_stop();    /* reportedly some chips need a full stop */
 358                 send_start();
 359         }
 360         /*
 361          * Send the chip address again, this time for a read cycle.
 362          * Then read the data.  On the last byte, we do a NACK instead
 363          * of an ACK(len == 0) to terminate the read.
 364          */
 365         write_byte((chip << 1) | 1);    /* read cycle */
 366         while(len-- > 0) {
 367                 *buffer++ = read_byte(len == 0);
 368         }
 369         send_stop();
 370         return(0);
 371 }
 372
 373 /*-----------------------------------------------------------------------
 374  * Write bytes
 375  */
 376 int  i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 377 {
 378         int shift, failures = 0;
 379
 380         PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
 381                 chip, addr, alen, buffer, len);
 382
 383         send_start();
 384         if(write_byte(chip << 1)) {     /* write cycle */
 385                 send_stop();
 386                 PRINTD("i2c_write, no chip responded %02X\n", chip);
 387                 return(1);
 388         }
 389         shift = (alen-1) * 8;
 390         while(alen-- > 0) {
 391                 if(write_byte(addr >> shift)) {
 392                         PRINTD("i2c_write, address not <ACK>ed\n");
 393                         return(1);
 394                 }
 395                 shift -= 8;
 396         }
 397
 398         while(len-- > 0) {
 399                 if(write_byte(*buffer++)) {
 400                         failures++;
 401                 }
 402         }
 403         send_stop();
 404         return(failures);
 405 }
 406
 407 /*-----------------------------------------------------------------------
 408  * Read a register
 409  */
 410 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
 411 {
 412         uchar buf;
 413
 414         i2c_read(i2c_addr, reg, 1, &buf, 1);
 415
 416         return(buf);
 417 }
 418
 419 /*-----------------------------------------------------------------------
 420  * Write a register
 421  */
 422 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
 423 {
 424         i2c_write(i2c_addr, reg, 1, &val, 1);
 425 }
 426
 427
 428 #endif  /* CONFIG_SOFT_I2C */