git.sur5r.net Git - u-boot/blob - configs/chromebit_mickey_defconfig

   1 CONFIG_ARM=y
   2 CONFIG_ARCH_ROCKCHIP=y
   3 CONFIG_SYS_MALLOC_F_LEN=0x2000
   4 CONFIG_ROCKCHIP_RK3288=y
   5 # CONFIG_SPL_MMC_SUPPORT is not set
   6 CONFIG_TARGET_CHROMEBIT_MICKEY=y
   7 CONFIG_SPL_SPI_FLASH_SUPPORT=y
   8 CONFIG_SPL_SPI_SUPPORT=y
   9 CONFIG_SPL_STACK_R_ADDR=0x80000
  10 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
  11 # CONFIG_DISPLAY_CPUINFO is not set
  12 CONFIG_SPL_STACK_R=y
  13 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
  14 # CONFIG_CMD_IMLS is not set
  15 CONFIG_CMD_GPT=y
  16 CONFIG_CMD_MMC=y
  17 CONFIG_CMD_SF=y
  18 CONFIG_CMD_SPI=y
  19 CONFIG_CMD_I2C=y
  20 CONFIG_CMD_GPIO=y
  21 # CONFIG_CMD_SETEXPR is not set
  22 CONFIG_CMD_CACHE=y
  23 CONFIG_CMD_TIME=y
  24 CONFIG_CMD_PMIC=y
  25 CONFIG_CMD_REGULATOR=y
  26 # CONFIG_SPL_DOS_PARTITION is not set
  27 # CONFIG_SPL_ISO_PARTITION is not set
  28 # CONFIG_SPL_EFI_PARTITION is not set
  29 CONFIG_SPL_PARTITION_UUIDS=y
  30 CONFIG_SPL_OF_CONTROL=y
  31 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  32 CONFIG_SPL_OF_PLATDATA=y
  33 CONFIG_REGMAP=y
  34 CONFIG_SPL_REGMAP=y
  35 CONFIG_SYSCON=y
  36 CONFIG_SPL_SYSCON=y
  37 # CONFIG_SPL_SIMPLE_BUS is not set
  38 CONFIG_CLK=y
  39 CONFIG_SPL_CLK=y
  40 CONFIG_ROCKCHIP_GPIO=y
  41 CONFIG_I2C_CROS_EC_TUNNEL=y
  42 CONFIG_SYS_I2C_ROCKCHIP=y
  43 CONFIG_I2C_MUX=y
  44 CONFIG_DM_KEYBOARD=y
  45 CONFIG_CROS_EC_KEYB=y
  46 CONFIG_CROS_EC=y
  47 CONFIG_CROS_EC_SPI=y
  48 CONFIG_PWRSEQ=y
  49 CONFIG_MMC_DW=y
  50 CONFIG_MMC_DW_ROCKCHIP=y
  51 CONFIG_PINCTRL=y
  52 CONFIG_SPL_PINCTRL=y
  53 # CONFIG_SPL_PINCTRL_FULL is not set
  54 CONFIG_ROCKCHIP_RK3288_PINCTRL=y
  55 CONFIG_DM_PMIC=y
  56 # CONFIG_SPL_PMIC_CHILDREN is not set
  57 CONFIG_PMIC_RK808=y
  58 CONFIG_SPL_DM_REGULATOR=y
  59 CONFIG_DM_REGULATOR_FIXED=y
  60 CONFIG_REGULATOR_RK808=y
  61 CONFIG_PWM_ROCKCHIP=y
  62 CONFIG_RAM=y
  63 CONFIG_SPL_RAM=y
  64 CONFIG_DEBUG_UART=y
  65 CONFIG_DEBUG_UART_BASE=0xff690000
  66 CONFIG_DEBUG_UART_CLOCK=24000000
  67 CONFIG_DEBUG_UART_SHIFT=2
  68 CONFIG_SYS_NS16550=y
  69 CONFIG_ROCKCHIP_SERIAL=y
  70 CONFIG_ROCKCHIP_SPI=y
  71 CONFIG_SYSRESET=y
  72 CONFIG_DM_VIDEO=y
  73 CONFIG_DISPLAY=y
  74 CONFIG_VIDEO_ROCKCHIP=y
  75 CONFIG_USE_TINY_PRINTF=y
  76 CONFIG_CMD_DHRYSTONE=y
  77 CONFIG_ERRNO_STR=y
  78 # CONFIG_SPL_OF_LIBFDT is not set