git.sur5r.net Git - u-boot/blob - configs/socfpga_sr1500_defconfig

   1 CONFIG_ARM=y
   2 CONFIG_ARCH_SOCFPGA=y
   3 CONFIG_SYS_MALLOC_F_LEN=0x2000
   4 CONFIG_SPL_DM=y
   5 CONFIG_DM_GPIO=y
   6 CONFIG_TARGET_SOCFPGA_SR1500=y
   7 CONFIG_SPL_STACK_R_ADDR=0x00800000
   8 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
   9 CONFIG_SPL=y
  10 CONFIG_SPL_STACK_R=y
  11 CONFIG_FIT=y
  12 # CONFIG_CMD_IMLS is not set
  13 # CONFIG_CMD_FLASH is not set
  14 CONFIG_SPL_DM_SEQ_ALIAS=y
  15 CONFIG_DWAPB_GPIO=y
  16 CONFIG_DM_MMC=y
  17 CONFIG_SPI_FLASH=y
  18 CONFIG_SPI_FLASH_STMICRO=y
  19 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
  20 CONFIG_SPI_FLASH_BAR=y
  21 CONFIG_DM_ETH=y
  22 CONFIG_ETH_DESIGNWARE=y
  23 CONFIG_SYS_NS16550=y
  24 CONFIG_CADENCE_QSPI=y