1 /* To be built with arm-none-eabi-gcc -c -mthumb -mcpu=cortex-m0 -O3 bluenrgx.c */
2 /* Then postprocess output of command "arm-none-eabi-objdump -d bluenrgx.o" to make a C array of bytes */
6 /* Status Values ----------------------------------------------------------*/
8 #define ERR_UNALIGNED 1
9 #define ERR_INVALID_ADDRESS 2
10 #define ERR_INVALID_TYPE 3
11 #define ERR_WRITE_PROTECTED 4
12 #define ERR_WRITE_FAILED 5
13 #define ERR_ERASE_REQUIRED 6
14 #define ERR_VERIFY_FAILED 7
16 /* Flash Controller defines ---------------------------------------------------*/
17 #define FLASH_REG_COMMAND ((volatile uint32_t *)0x40100000)
18 #define FLASH_REG_CONFIG ((volatile uint32_t *)0x40100004)
19 #define FLASH_REG_IRQSTAT ((volatile uint32_t *)0x40100008)
20 #define FLASH_REG_IRQMASK ((volatile uint32_t *)0x4010000C)
21 #define FLASH_REG_IRQRAW ((volatile uint32_t *)0x40100010)
22 #define FLASH_REG_ADDRESS ((volatile uint32_t *)0x40100018)
23 #define FLASH_REG_UNLOCKM ((volatile uint32_t *)0x4010001C)
24 #define FLASH_REG_UNLOCKL ((volatile uint32_t *)0x40100020)
25 #define FLASH_REG_DATA0 ((volatile uint32_t *)0x40100040)
26 #define FLASH_REG_DATA1 ((volatile uint32_t *)0x40100044)
27 #define FLASH_REG_DATA2 ((volatile uint32_t *)0x40100048)
28 #define FLASH_REG_DATA3 ((volatile uint32_t *)0x4010004C)
29 #define FLASH_SIZE_REG 0x40100014
31 #define MFB_MASS_ERASE 0x01
32 #define MFB_PAGE_ERASE 0x02
34 #define DO_ERASE 0x0100
35 #define DO_VERIFY 0x0200
36 #define FLASH_CMD_ERASE_PAGE 0x11
37 #define FLASH_CMD_MASSERASE 0x22
38 #define FLASH_CMD_WRITE 0x33
39 #define FLASH_CMD_BURSTWRITE 0xCC
40 #define FLASH_INT_CMDDONE 0x01
41 #define MFB_BOTTOM (0x10040000)
42 #define MFB_SIZE_B ((16 * (((*(uint32_t *) FLASH_SIZE_REG) + 1) >> 12)) * 1024)
43 #define MFB_SIZE_W (MFB_SIZE_B/4)
44 #define MFB_TOP (MFB_BOTTOM+MFB_SIZE_B-1)
45 #define MFB_PAGE_SIZE_B (2048)
46 #define MFB_PAGE_SIZE_W (MFB_PAGE_SIZE_B/4)
48 #define AREA_ERROR 0x01
51 #define FLASH_WORD_LEN 4
58 /* Flash Commands --------------------------------------------------------*/
59 static inline __attribute__((always_inline)) uint32_t flashWrite(uint32_t address, uint8_t **data,
62 uint32_t index, flash_word[4];
65 *FLASH_REG_IRQMASK = 0;
66 for (index = 0; index < writeLength; index += (FLASH_WORD_LEN*4)) {
67 for (i = 0; i < 4; i++)
68 flash_word[i] = (*(uint32_t *) (*data + i*4));
70 /* Clear the IRQ flags */
71 *FLASH_REG_IRQRAW = 0x0000003F;
72 /* Load the flash address to write */
73 *FLASH_REG_ADDRESS = (uint16_t)((address + index) >> 2);
74 /* Prepare and load the data to flash */
75 *FLASH_REG_DATA0 = flash_word[0];
76 *FLASH_REG_DATA1 = flash_word[1];
77 *FLASH_REG_DATA2 = flash_word[2];
78 *FLASH_REG_DATA3 = flash_word[3];
79 /* Flash write command */
80 *FLASH_REG_COMMAND = FLASH_CMD_BURSTWRITE;
81 /* Wait the end of the flash write command */
82 while ((*FLASH_REG_IRQRAW & FLASH_INT_CMDDONE) == 0)
84 *data += (FLASH_WORD_LEN * 4);
90 __attribute__((naked)) __attribute__((noreturn)) void write(uint8_t *work_area_p,
92 uint8_t *target_address,
96 volatile work_area_t *work_area = (work_area_t *) work_area_p;
97 uint8_t *fifo_start = (uint8_t *) work_area->rp;
100 volatile int32_t fifo_linear_size;
102 /* Wait for some data in the FIFO */
103 while (work_area->rp == work_area->wp)
105 if (work_area->wp == 0) {
106 /* Aborted by other party */
109 if (work_area->rp > work_area->wp) {
110 fifo_linear_size = fifo_end-work_area->rp;
112 fifo_linear_size = (work_area->wp - work_area->rp);
113 if (fifo_linear_size < 0)
114 fifo_linear_size = 0;
116 if (fifo_linear_size < 16) {
117 /* We should never get here */
121 retval = flashWrite((uint32_t) target_address, (uint8_t **) &work_area->rp, fifo_linear_size);
122 if (retval != SUCCESS) {
123 work_area->rp = (uint8_t *)retval;
126 target_address += fifo_linear_size;
127 if (work_area->rp >= fifo_end)
128 work_area->rp = fifo_start;
129 count -= fifo_linear_size;