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33 ******************************************************************************/
36 MAIN_FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00100000
37 SRAM_CODE_0(RWX): ORIGIN = 0x20000000, LENGTH = 0x00000110
38 SRAM_CODE_1(RWX): ORIGIN = 0x20000110, LENGTH = 0x00000030
39 SRAM_CODE_2(RWX): ORIGIN = 0x20000150, LENGTH = 0x00000040
40 SRAM_CODE_3(RWX): ORIGIN = 0x20000190, LENGTH = 0x00000F70
41 SRAM_CODE_4(RWX): ORIGIN = 0x20001170, LENGTH = 0x00000200
42 SRAM_DATA (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
45 REGION_ALIAS("REGION_INTVECT", SRAM_CODE_0);
46 REGION_ALIAS("REGION_RESET", SRAM_CODE_1);
47 REGION_ALIAS("REGION_DESCRIPTOR", SRAM_CODE_2);
48 REGION_ALIAS("REGION_TEXT", SRAM_CODE_3);
49 REGION_ALIAS("REGION_BSS", SRAM_CODE_3);
50 REGION_ALIAS("REGION_DATA", SRAM_DATA);
51 REGION_ALIAS("REGION_STACK", SRAM_CODE_4);
52 REGION_ALIAS("REGION_HEAP", SRAM_DATA);
53 REGION_ALIAS("REGION_ARM_EXIDX", SRAM_CODE_3);
54 REGION_ALIAS("REGION_ARM_EXTAB", SRAM_CODE_3);
57 /* section for the interrupt vector area */
62 PROVIDE (_vtable_base_address =
63 DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);
65 .vtable (_vtable_base_address) : AT (_vtable_base_address) {
71 . = ORIGIN(REGION_DESCRIPTOR) + LENGTH(REGION_DESCRIPTOR) - 1;
78 } > REGION_RESET AT> REGION_RESET
89 __init_array_start = .;
90 KEEP (*(.init_array*))
94 } > REGION_TEXT AT> REGION_TEXT
99 } > REGION_TEXT AT> REGION_TEXT
103 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
105 } > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
108 KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
109 } > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
114 __data_load__ = LOADADDR (.data);
120 } > REGION_DATA AT> REGION_TEXT
130 } > REGION_BSS AT> REGION_BSS
134 end = __heap_start__;
139 __HeapLimit = __heap_end__;
140 } > REGION_HEAP AT> REGION_HEAP
142 .stack (NOLOAD) : ALIGN(0x8) {
145 } > REGION_STACK AT> REGION_STACK
147 __stack_top = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
148 PROVIDE(__stack = __stack_top);