2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2001 Josh Huber <huber@mclx.com>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 /* U-Boot - Startup Code for PowerPC based Embedded Boards
29 * The processor starts at 0xfff00100 and the code is executed
30 * from flash. The code is organized to be at an other address
31 * in memory, but as long we don't jump around before relocating.
32 * board_init lies at a quite high address and when the cpu has
33 * jumped there, everything is ok.
39 #include <ppc_asm.tmpl>
42 #include <asm/cache.h>
45 #if !defined(CONFIG_DB64360) && \
46 !defined(CONFIG_DB64460)
47 #include <galileo/gt64260R.h>
50 #ifndef CONFIG_IDENT_STRING
51 #define CONFIG_IDENT_STRING ""
54 /* We don't want the MMU yet.
57 /* Machine Check and Recoverable Interr. */
58 #define MSR_KERNEL ( MSR_ME | MSR_RI )
61 * Set up GOT: Global Offset Table
63 * Use r14 to access the GOT
66 GOT_ENTRY(_GOT2_TABLE_)
67 GOT_ENTRY(_FIXUP_TABLE_)
70 GOT_ENTRY(_start_of_vectors)
71 GOT_ENTRY(_end_of_vectors)
72 GOT_ENTRY(transfer_to_handler)
76 GOT_ENTRY(__bss_start)
80 * r3 - 1st arg to board_init(): IMMP pointer
81 * r4 - 2nd arg to board_init(): boot flag
84 .long 0x27051956 /* U-Boot Magic Number */
88 .ascii " (", __DATE__, " - ", __TIME__, ")"
89 .ascii CONFIG_IDENT_STRING, "\0"
94 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
98 . = EXC_OFF_SYS_RESET + 0x10
102 li r21, BOOTFLAG_WARM /* Software reboot */
106 /* the boot code is located below the exception table */
108 .globl _start_of_vectors
112 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
114 /* Data Storage exception. "Never" generated on the 860. */
115 STD_EXCEPTION(0x300, DataStorage, UnknownException)
117 /* Instruction Storage exception. "Never" generated on the 860. */
118 STD_EXCEPTION(0x400, InstStorage, UnknownException)
120 /* External Interrupt exception. */
121 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
123 /* Alignment exception. */
131 addi r3,r1,STACK_FRAME_OVERHEAD
133 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
134 lwz r6,GOT(transfer_to_handler)
138 .long AlignmentException - _start + EXC_OFF_SYS_RESET
139 .long int_return - _start + EXC_OFF_SYS_RESET
141 /* Program check exception */
145 addi r3,r1,STACK_FRAME_OVERHEAD
147 rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
148 lwz r6,GOT(transfer_to_handler)
152 .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
153 .long int_return - _start + EXC_OFF_SYS_RESET
155 /* No FPU on MPC8xx. This exception is not supposed to happen.
157 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
159 /* I guess we could implement decrementer, and may have
160 * to someday for timekeeping.
162 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
163 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
164 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
165 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
166 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
168 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
169 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
172 * On the MPC8xx, this is a software emulation interrupt. It
173 * occurs for all unimplemented and illegal instructions.
175 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
177 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
178 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
179 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
180 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
182 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
183 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
184 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
185 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
186 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
187 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
188 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
190 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
191 STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
192 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
193 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
195 .globl _end_of_vectors
202 /* disable everything */
211 /* init the L2 cache */
212 addis r3, r0, L2_INIT@h
213 ori r3, r3, L2_INIT@l
217 #if defined(CONFIG_ALTIVEC) && defined(CONFIG_74xx)
220 * dssall instruction, gas doesn't have it yet
221 * ...for altivec, data stream stop all this probably
222 * isn't needed unless we warm (software) reboot U-Boot
227 /* invalidate the L2 cache */
228 bl l2cache_invalidate
231 #ifdef CFG_BOARD_ASM_INIT
237 * Calculate absolute address in FLASH and jump there
238 *------------------------------------------------------*/
239 lis r3, CFG_MONITOR_BASE@h
240 ori r3, r3, CFG_MONITOR_BASE@l
241 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
246 /* let the C-code set up the rest */
248 /* Be careful to keep code relocatable ! */
249 /*------------------------------------------------------*/
251 /* perform low-level init */
252 /* sdram init, galileo init, etc */
253 /* r3: NHR bit from HID0 */
260 * Cache must be enabled here for stack-in-cache trick.
261 * This means we need to enable the BATS.
263 * 1) for the EVB, original gt regs need to be mapped
264 * 2) need to have an IBAT for the 0xf region,
265 * we are running there!
266 * Cache should be turned on after BATs, since by default
267 * everything is write-through.
268 * The init-mem BAT can be reused after reloc. The old
269 * gt-regs BAT can be reused after board_init_f calls
270 * board_early_init_f (EVB only).
272 #if !defined(CONFIG_BAB7xx) && !defined(CONFIG_ELPPC)
273 /* enable address translation */
277 /* enable and invalidate the data cache */
281 #ifdef CFG_INIT_RAM_LOCK
286 /* set up the stack pointer in our newly created
288 lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
289 ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l
291 li r0, 0 /* Make room for stack frame header and */
292 stwu r0, -4(r1) /* clear final stack frame so that */
293 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
295 GET_GOT /* initialize GOT access */
297 /* run low-level CPU init code (from Flash) */
304 /* run 1st part of board init code (from Flash) */
310 .globl invalidate_bats
312 /* invalidate BATs */
338 /* setup_bats - set them up to some initial state */
344 addis r4, r0, CFG_IBAT0L@h
345 ori r4, r4, CFG_IBAT0L@l
346 addis r3, r0, CFG_IBAT0U@h
347 ori r3, r3, CFG_IBAT0U@l
353 addis r4, r0, CFG_DBAT0L@h
354 ori r4, r4, CFG_DBAT0L@l
355 addis r3, r0, CFG_DBAT0U@h
356 ori r3, r3, CFG_DBAT0U@l
362 addis r4, r0, CFG_IBAT1L@h
363 ori r4, r4, CFG_IBAT1L@l
364 addis r3, r0, CFG_IBAT1U@h
365 ori r3, r3, CFG_IBAT1U@l
371 addis r4, r0, CFG_DBAT1L@h
372 ori r4, r4, CFG_DBAT1L@l
373 addis r3, r0, CFG_DBAT1U@h
374 ori r3, r3, CFG_DBAT1U@l
380 addis r4, r0, CFG_IBAT2L@h
381 ori r4, r4, CFG_IBAT2L@l
382 addis r3, r0, CFG_IBAT2U@h
383 ori r3, r3, CFG_IBAT2U@l
389 addis r4, r0, CFG_DBAT2L@h
390 ori r4, r4, CFG_DBAT2L@l
391 addis r3, r0, CFG_DBAT2U@h
392 ori r3, r3, CFG_DBAT2U@l
398 addis r4, r0, CFG_IBAT3L@h
399 ori r4, r4, CFG_IBAT3L@l
400 addis r3, r0, CFG_IBAT3U@h
401 ori r3, r3, CFG_IBAT3U@l
407 addis r4, r0, CFG_DBAT3L@h
408 ori r4, r4, CFG_DBAT3L@l
409 addis r3, r0, CFG_DBAT3U@h
410 ori r3, r3, CFG_DBAT3U@l
417 addis r4, r0, CFG_IBAT4L@h
418 ori r4, r4, CFG_IBAT4L@l
419 addis r3, r0, CFG_IBAT4U@h
420 ori r3, r3, CFG_IBAT4U@l
426 addis r4, r0, CFG_DBAT4L@h
427 ori r4, r4, CFG_DBAT4L@l
428 addis r3, r0, CFG_DBAT4U@h
429 ori r3, r3, CFG_DBAT4U@l
435 addis r4, r0, CFG_IBAT5L@h
436 ori r4, r4, CFG_IBAT5L@l
437 addis r3, r0, CFG_IBAT5U@h
438 ori r3, r3, CFG_IBAT5U@l
444 addis r4, r0, CFG_DBAT5L@h
445 ori r4, r4, CFG_DBAT5L@l
446 addis r3, r0, CFG_DBAT5U@h
447 ori r3, r3, CFG_DBAT5U@l
453 addis r4, r0, CFG_IBAT6L@h
454 ori r4, r4, CFG_IBAT6L@l
455 addis r3, r0, CFG_IBAT6U@h
456 ori r3, r3, CFG_IBAT6U@l
462 addis r4, r0, CFG_DBAT6L@h
463 ori r4, r4, CFG_DBAT6L@l
464 addis r3, r0, CFG_DBAT6U@h
465 ori r3, r3, CFG_DBAT6U@l
471 addis r4, r0, CFG_IBAT7L@h
472 ori r4, r4, CFG_IBAT7L@l
473 addis r3, r0, CFG_IBAT7U@h
474 ori r3, r3, CFG_IBAT7U@l
480 addis r4, r0, CFG_DBAT7L@h
481 ori r4, r4, CFG_DBAT7L@l
482 addis r3, r0, CFG_DBAT7U@h
483 ori r3, r3, CFG_DBAT7U@l
489 /* bats are done, now invalidate the TLBs */
492 addis r5, 0, 0x4 /* upper bound of 0x00040000 for 7400/750 */
505 .globl enable_addr_trans
507 /* enable address translation */
509 ori r5, r5, (MSR_IR | MSR_DR)
514 .globl disable_addr_trans
516 /* disable address translation */
519 andi. r0, r3, (MSR_IR | MSR_DR)
527 * This code finishes saving the registers to the exception frame
528 * and jumps to the appropriate handler for the exception.
529 * Register r21 is pointer into trap frame, r1 has new stack pointer.
531 .globl transfer_to_handler
542 andi. r24,r23,0x3f00 /* get vector offset */
546 mtspr SPRG2,r22 /* r1 is now kernel sp */
547 lwz r24,0(r23) /* virtual address of handler */
548 lwz r23,4(r23) /* where to go when done */
553 rfi /* jump to handler, enable MMU */
556 mfmsr r28 /* Disable interrupts */
560 SYNC /* Some chip revs need this... */
575 lwz r2,_NIP(r1) /* Restore environment */
594 /*-----------------------------------------------------------------------*/
596 * void relocate_code (addr_sp, gd, addr_moni)
598 * This "function" does not return, instead it continues in RAM
599 * after relocating the monitor code.
603 * r5 = length in bytes
608 mr r1, r3 /* Set new stack pointer */
609 mr r9, r4 /* Save copy of Global Data pointer */
610 mr r10, r5 /* Save copy of Destination Address */
612 mr r3, r5 /* Destination Address */
613 lis r4, CFG_MONITOR_BASE@h /* Source Address */
614 ori r4, r4, CFG_MONITOR_BASE@l
615 lwz r5, GOT(__init_end)
617 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
622 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
628 /* First our own GOT */
630 /* then the one used by the C code */
637 bl board_relocate_rom
639 mr r3, r10 /* Destination Address */
640 lis r4, CFG_MONITOR_BASE@h /* Source Address */
641 ori r4, r4, CFG_MONITOR_BASE@l
642 lwz r5, GOT(__init_end)
644 li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
649 beq cr1,4f /* In place copy is not necessary */
650 beq 7f /* Protect against 0 count */
669 * Now flush the cache: note that we must start from a cache aligned
670 * address. Otherwise we might miss one cache line.
674 beq 7f /* Always flush prefetch queue in any case */
682 sync /* Wait for all dcbst to complete on bus */
688 7: sync /* Wait for all icbi to complete on bus */
692 * We are done. Do not return, instead branch to second part of board
693 * initialization, now running from RAM.
695 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
704 * Relocation Function, r14 point to got2+0x8000
706 * Adjust got2 pointers, no need to check for 0, this code
707 * already puts a few entries in the table.
709 li r0,__got2_entries@sectoff@l
710 la r3,GOT(_GOT2_TABLE_)
711 lwz r11,GOT(_GOT2_TABLE_)
721 * Now adjust the fixups and the pointers to the fixups
722 * in case we need to move ourselves again.
724 2: li r0,__fixup_entries@sectoff@l
725 lwz r3,GOT(_FIXUP_TABLE_)
739 * Now clear BSS segment
741 lwz r3,GOT(__bss_start)
754 mr r3, r10 /* Destination Address */
755 #if defined(CONFIG_AMIGAONEG3SE) || \
756 defined(CONFIG_DB64360) || \
757 defined(CONFIG_DB64460)
758 mr r4, r9 /* Use RAM copy of the global data */
762 /* not reached - end relocate_code */
763 /*-----------------------------------------------------------------------*/
766 * Copy exception vector code to low memory
769 * r7: source address, r8: end address, r9: target address
774 lwz r8, GOT(_end_of_vectors)
776 li r9, 0x100 /* reset vector always at 0x100 */
779 bgelr /* return if r7>=r8 - just in case */
781 mflr r4 /* save link register */
791 * relocate `hdlr' and `int_return' entries
793 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
794 li r8, Alignment - _start + EXC_OFF_SYS_RESET
797 addi r7, r7, 0x100 /* next exception vector */
801 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
804 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
807 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
808 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
811 addi r7, r7, 0x100 /* next exception vector */
815 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
816 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
819 addi r7, r7, 0x100 /* next exception vector */
823 /* enable execptions from RAM vectors */
829 mtlr r4 /* restore link register */
833 * Function: relocate entries for one exception vector
836 lwz r0, 0(r7) /* hdlr ... */
837 add r0, r0, r3 /* ... += dest_addr */
840 lwz r0, 4(r7) /* int_return ... */
841 add r0, r0, r3 /* ... += dest_addr */
849 #ifdef CFG_INIT_RAM_LOCK
851 /* Allocate Initial RAM in data cache.
853 lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
854 ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
855 li r2, ((CFG_INIT_RAM_END & ~31) + \
856 (CFG_INIT_RAM_ADDR & 31) + 31) / 32
863 /* Lock the data cache */
871 .globl unlock_ram_in_cache
873 /* invalidate the INIT_RAM section */
874 lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
875 ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
876 li r2, ((CFG_INIT_RAM_END & ~31) + \
877 (CFG_INIT_RAM_ADDR & 31) + 31) / 32
882 sync /* Wait for all icbi to complete on bus */
885 /* Unlock the data cache and invalidate it */