2 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
3 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
4 * Copyright (C) 2000,2001,2002 Wolfgang Denk <wd@denx.de>
5 * Copyright (C) 2001 Josh Huber <huber@mclx.com>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 /* U-Boot - Startup Code for PowerPC based Embedded Boards
29 * The processor starts at 0xfff00100 and the code is executed
30 * from flash. The code is organized to be at an other address
31 * in memory, but as long we don't jump around before relocating.
32 * board_init lies at a quite high address and when the cpu has
33 * jumped there, everything is ok.
37 #include <timestamp.h>
40 #include <ppc_asm.tmpl>
43 #include <asm/cache.h>
46 #if !defined(CONFIG_DB64360) && \
47 !defined(CONFIG_DB64460) && \
48 !defined(CONFIG_CPCI750) && \
50 #include <galileo/gt64260R.h>
53 #ifndef CONFIG_IDENT_STRING
54 #define CONFIG_IDENT_STRING ""
57 /* We don't want the MMU yet.
60 /* Machine Check and Recoverable Interr. */
61 #define MSR_KERNEL ( MSR_ME | MSR_RI )
64 * Set up GOT: Global Offset Table
66 * Use r12 to access the GOT
69 GOT_ENTRY(_GOT2_TABLE_)
70 GOT_ENTRY(_FIXUP_TABLE_)
73 GOT_ENTRY(_start_of_vectors)
74 GOT_ENTRY(_end_of_vectors)
75 GOT_ENTRY(transfer_to_handler)
79 GOT_ENTRY(__bss_start)
83 * r3 - 1st arg to board_init(): IMMP pointer
84 * r4 - 2nd arg to board_init(): boot flag
87 .long 0x27051956 /* U-Boot Magic Number */
91 .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
92 .ascii CONFIG_IDENT_STRING, "\0"
97 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
101 . = EXC_OFF_SYS_RESET + 0x10
105 li r21, BOOTFLAG_WARM /* Software reboot */
109 /* the boot code is located below the exception table */
111 .globl _start_of_vectors
115 STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
117 /* Data Storage exception. "Never" generated on the 860. */
118 STD_EXCEPTION(0x300, DataStorage, UnknownException)
120 /* Instruction Storage exception. "Never" generated on the 860. */
121 STD_EXCEPTION(0x400, InstStorage, UnknownException)
123 /* External Interrupt exception. */
124 STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
126 /* Alignment exception. */
129 EXCEPTION_PROLOG(SRR0, SRR1)
134 addi r3,r1,STACK_FRAME_OVERHEAD
135 EXC_XFER_TEMPLATE(Alignment, AlignmentException, MSR_KERNEL, COPY_EE)
137 /* Program check exception */
140 EXCEPTION_PROLOG(SRR0, SRR1)
141 addi r3,r1,STACK_FRAME_OVERHEAD
142 EXC_XFER_TEMPLATE(ProgramCheck, ProgramCheckException,
145 /* No FPU on MPC8xx. This exception is not supposed to happen.
147 STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
149 /* I guess we could implement decrementer, and may have
150 * to someday for timekeeping.
152 STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
153 STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
154 STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
155 STD_EXCEPTION(0xc00, SystemCall, UnknownException)
156 STD_EXCEPTION(0xd00, SingleStep, UnknownException)
158 STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
159 STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
162 * On the MPC8xx, this is a software emulation interrupt. It
163 * occurs for all unimplemented and illegal instructions.
165 STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
167 STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
168 STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
169 STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
170 STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
172 STD_EXCEPTION(0x1500, Reserved5, UnknownException)
173 STD_EXCEPTION(0x1600, Reserved6, UnknownException)
174 STD_EXCEPTION(0x1700, Reserved7, UnknownException)
175 STD_EXCEPTION(0x1800, Reserved8, UnknownException)
176 STD_EXCEPTION(0x1900, Reserved9, UnknownException)
177 STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
178 STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
180 STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
181 STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
182 STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
183 STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
185 .globl _end_of_vectors
192 /* disable everything */
201 /* init the L2 cache */
202 addis r3, r0, L2_INIT@h
203 ori r3, r3, L2_INIT@l
207 #if defined(CONFIG_ALTIVEC) && defined(CONFIG_74xx)
210 * dssall instruction, gas doesn't have it yet
211 * ...for altivec, data stream stop all this probably
212 * isn't needed unless we warm (software) reboot U-Boot
217 /* invalidate the L2 cache */
218 bl l2cache_invalidate
221 #ifdef CONFIG_SYS_BOARD_ASM_INIT
227 * Calculate absolute address in FLASH and jump there
228 *------------------------------------------------------*/
229 lis r3, CONFIG_SYS_MONITOR_BASE@h
230 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
231 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
236 /* let the C-code set up the rest */
238 /* Be careful to keep code relocatable ! */
239 /*------------------------------------------------------*/
241 /* perform low-level init */
242 /* sdram init, galileo init, etc */
243 /* r3: NHR bit from HID0 */
250 * Cache must be enabled here for stack-in-cache trick.
251 * This means we need to enable the BATS.
253 * 1) for the EVB, original gt regs need to be mapped
254 * 2) need to have an IBAT for the 0xf region,
255 * we are running there!
256 * Cache should be turned on after BATs, since by default
257 * everything is write-through.
258 * The init-mem BAT can be reused after reloc. The old
259 * gt-regs BAT can be reused after board_init_f calls
260 * board_early_init_f (EVB only).
262 #if !defined(CONFIG_BAB7xx) && !defined(CONFIG_ELPPC) && !defined(CONFIG_P3Mx)
263 /* enable address translation */
267 /* enable and invalidate the data cache */
271 #ifdef CONFIG_SYS_INIT_RAM_LOCK
276 /* set up the stack pointer in our newly created
278 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
279 ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
281 li r0, 0 /* Make room for stack frame header and */
282 stwu r0, -4(r1) /* clear final stack frame so that */
283 stwu r0, -4(r1) /* stack backtraces terminate cleanly */
285 GET_GOT /* initialize GOT access */
287 /* run low-level CPU init code (from Flash) */
294 /* run 1st part of board init code (from Flash) */
300 .globl invalidate_bats
302 /* invalidate BATs */
307 #ifdef CONFIG_HIGH_BATS
318 #ifdef CONFIG_HIGH_BATS
328 /* setup_bats - set them up to some initial state */
334 addis r4, r0, CONFIG_SYS_IBAT0L@h
335 ori r4, r4, CONFIG_SYS_IBAT0L@l
336 addis r3, r0, CONFIG_SYS_IBAT0U@h
337 ori r3, r3, CONFIG_SYS_IBAT0U@l
343 addis r4, r0, CONFIG_SYS_DBAT0L@h
344 ori r4, r4, CONFIG_SYS_DBAT0L@l
345 addis r3, r0, CONFIG_SYS_DBAT0U@h
346 ori r3, r3, CONFIG_SYS_DBAT0U@l
352 addis r4, r0, CONFIG_SYS_IBAT1L@h
353 ori r4, r4, CONFIG_SYS_IBAT1L@l
354 addis r3, r0, CONFIG_SYS_IBAT1U@h
355 ori r3, r3, CONFIG_SYS_IBAT1U@l
361 addis r4, r0, CONFIG_SYS_DBAT1L@h
362 ori r4, r4, CONFIG_SYS_DBAT1L@l
363 addis r3, r0, CONFIG_SYS_DBAT1U@h
364 ori r3, r3, CONFIG_SYS_DBAT1U@l
370 addis r4, r0, CONFIG_SYS_IBAT2L@h
371 ori r4, r4, CONFIG_SYS_IBAT2L@l
372 addis r3, r0, CONFIG_SYS_IBAT2U@h
373 ori r3, r3, CONFIG_SYS_IBAT2U@l
379 addis r4, r0, CONFIG_SYS_DBAT2L@h
380 ori r4, r4, CONFIG_SYS_DBAT2L@l
381 addis r3, r0, CONFIG_SYS_DBAT2U@h
382 ori r3, r3, CONFIG_SYS_DBAT2U@l
388 addis r4, r0, CONFIG_SYS_IBAT3L@h
389 ori r4, r4, CONFIG_SYS_IBAT3L@l
390 addis r3, r0, CONFIG_SYS_IBAT3U@h
391 ori r3, r3, CONFIG_SYS_IBAT3U@l
397 addis r4, r0, CONFIG_SYS_DBAT3L@h
398 ori r4, r4, CONFIG_SYS_DBAT3L@l
399 addis r3, r0, CONFIG_SYS_DBAT3U@h
400 ori r3, r3, CONFIG_SYS_DBAT3U@l
405 #ifdef CONFIG_HIGH_BATS
407 addis r4, r0, CONFIG_SYS_IBAT4L@h
408 ori r4, r4, CONFIG_SYS_IBAT4L@l
409 addis r3, r0, CONFIG_SYS_IBAT4U@h
410 ori r3, r3, CONFIG_SYS_IBAT4U@l
416 addis r4, r0, CONFIG_SYS_DBAT4L@h
417 ori r4, r4, CONFIG_SYS_DBAT4L@l
418 addis r3, r0, CONFIG_SYS_DBAT4U@h
419 ori r3, r3, CONFIG_SYS_DBAT4U@l
425 addis r4, r0, CONFIG_SYS_IBAT5L@h
426 ori r4, r4, CONFIG_SYS_IBAT5L@l
427 addis r3, r0, CONFIG_SYS_IBAT5U@h
428 ori r3, r3, CONFIG_SYS_IBAT5U@l
434 addis r4, r0, CONFIG_SYS_DBAT5L@h
435 ori r4, r4, CONFIG_SYS_DBAT5L@l
436 addis r3, r0, CONFIG_SYS_DBAT5U@h
437 ori r3, r3, CONFIG_SYS_DBAT5U@l
443 addis r4, r0, CONFIG_SYS_IBAT6L@h
444 ori r4, r4, CONFIG_SYS_IBAT6L@l
445 addis r3, r0, CONFIG_SYS_IBAT6U@h
446 ori r3, r3, CONFIG_SYS_IBAT6U@l
452 addis r4, r0, CONFIG_SYS_DBAT6L@h
453 ori r4, r4, CONFIG_SYS_DBAT6L@l
454 addis r3, r0, CONFIG_SYS_DBAT6U@h
455 ori r3, r3, CONFIG_SYS_DBAT6U@l
461 addis r4, r0, CONFIG_SYS_IBAT7L@h
462 ori r4, r4, CONFIG_SYS_IBAT7L@l
463 addis r3, r0, CONFIG_SYS_IBAT7U@h
464 ori r3, r3, CONFIG_SYS_IBAT7U@l
470 addis r4, r0, CONFIG_SYS_DBAT7L@h
471 ori r4, r4, CONFIG_SYS_DBAT7L@l
472 addis r3, r0, CONFIG_SYS_DBAT7U@h
473 ori r3, r3, CONFIG_SYS_DBAT7U@l
479 /* bats are done, now invalidate the TLBs */
482 addis r5, 0, 0x4 /* upper bound of 0x00040000 for 7400/750 */
495 .globl enable_addr_trans
497 /* enable address translation */
499 ori r5, r5, (MSR_IR | MSR_DR)
504 .globl disable_addr_trans
506 /* disable address translation */
509 andi. r0, r3, (MSR_IR | MSR_DR)
517 * This code finishes saving the registers to the exception frame
518 * and jumps to the appropriate handler for the exception.
519 * Register r21 is pointer into trap frame, r1 has new stack pointer.
521 .globl transfer_to_handler
532 andi. r24,r23,0x3f00 /* get vector offset */
536 mtspr SPRG2,r22 /* r1 is now kernel sp */
537 lwz r24,0(r23) /* virtual address of handler */
538 lwz r23,4(r23) /* where to go when done */
543 rfi /* jump to handler, enable MMU */
546 mfmsr r28 /* Disable interrupts */
550 SYNC /* Some chip revs need this... */
565 lwz r2,_NIP(r1) /* Restore environment */
584 /*-----------------------------------------------------------------------*/
586 * void relocate_code (addr_sp, gd, addr_moni)
588 * This "function" does not return, instead it continues in RAM
589 * after relocating the monitor code.
593 * r5 = length in bytes
598 mr r1, r3 /* Set new stack pointer */
599 mr r9, r4 /* Save copy of Global Data pointer */
600 mr r10, r5 /* Save copy of Destination Address */
603 mr r3, r5 /* Destination Address */
604 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
605 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
606 lwz r5, GOT(__init_end)
608 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
613 * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address
619 /* First our own GOT */
621 /* then the one used by the C code */
628 bl board_relocate_rom
630 mr r3, r10 /* Destination Address */
631 lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */
632 ori r4, r4, CONFIG_SYS_MONITOR_BASE@l
633 lwz r5, GOT(__init_end)
635 li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */
640 beq cr1,4f /* In place copy is not necessary */
641 beq 7f /* Protect against 0 count */
660 * Now flush the cache: note that we must start from a cache aligned
661 * address. Otherwise we might miss one cache line.
665 beq 7f /* Always flush prefetch queue in any case */
673 sync /* Wait for all dcbst to complete on bus */
679 7: sync /* Wait for all icbi to complete on bus */
683 * We are done. Do not return, instead branch to second part of board
684 * initialization, now running from RAM.
686 addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
695 * Relocation Function, r12 point to got2+0x8000
697 * Adjust got2 pointers, no need to check for 0, this code
698 * already puts a few entries in the table.
700 li r0,__got2_entries@sectoff@l
701 la r3,GOT(_GOT2_TABLE_)
702 lwz r11,GOT(_GOT2_TABLE_)
714 * Now adjust the fixups and the pointers to the fixups
715 * in case we need to move ourselves again.
717 li r0,__fixup_entries@sectoff@l
718 lwz r3,GOT(_FIXUP_TABLE_)
732 * Now clear BSS segment
734 lwz r3,GOT(__bss_start)
747 mr r3, r10 /* Destination Address */
748 #if defined(CONFIG_AMIGAONEG3SE) || \
749 defined(CONFIG_DB64360) || \
750 defined(CONFIG_DB64460) || \
751 defined(CONFIG_CPCI750) || \
752 defined(CONFIG_PPMC7XX) || \
754 mr r4, r9 /* Use RAM copy of the global data */
758 /* not reached - end relocate_code */
759 /*-----------------------------------------------------------------------*/
762 * Copy exception vector code to low memory
765 * r7: source address, r8: end address, r9: target address
769 mflr r4 /* save link register */
772 lwz r8, GOT(_end_of_vectors)
774 li r9, 0x100 /* reset vector always at 0x100 */
777 bgelr /* return if r7>=r8 - just in case */
787 * relocate `hdlr' and `int_return' entries
789 li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
790 li r8, Alignment - _start + EXC_OFF_SYS_RESET
793 addi r7, r7, 0x100 /* next exception vector */
797 li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
800 li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
803 li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
804 li r8, SystemCall - _start + EXC_OFF_SYS_RESET
807 addi r7, r7, 0x100 /* next exception vector */
811 li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
812 li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
815 addi r7, r7, 0x100 /* next exception vector */
819 /* enable execptions from RAM vectors */
825 mtlr r4 /* restore link register */
828 #ifdef CONFIG_SYS_INIT_RAM_LOCK
830 /* Allocate Initial RAM in data cache.
832 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
833 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
834 li r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
835 (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
842 /* Lock the data cache */
850 .globl unlock_ram_in_cache
852 /* invalidate the INIT_RAM section */
853 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
854 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
855 li r4, ((CONFIG_SYS_INIT_RAM_END & ~31) + \
856 (CONFIG_SYS_INIT_RAM_ADDR & 31) + 31) / 32
861 sync /* Wait for all icbi to complete on bus */
864 /* Unlock the data cache and invalidate it */