2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop <at> leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/hardware.h>
29 * We're using the AT91CAP9 PITC in 32 bit mode, by
30 * setting the 20 bit counter period to its maximum (0xfffff).
32 #define TIMER_LOAD_VAL 0xfffff
33 #define READ_RESET_TIMER (AT91C_BASE_PITC->PITC_PIVR)
34 #define READ_TIMER (AT91C_BASE_PITC->PITC_PIIR)
35 #define TIMER_FREQ (AT91C_MASTER_CLOCK << 4)
36 #define TICKS_TO_USEC(ticks) ((ticks) / 6)
38 ulong get_timer_masked(void);
43 /* nothing really to do with interrupts, just starts up a counter. */
44 int interrupt_init(void)
48 * The clock is already enabled for system controller in boot
50 AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
53 AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN;
55 /* Load PITC_PIMR with the right timer value */
56 AT91C_BASE_PITC->PITC_PIMR |= TIMER_LOAD_VAL;
64 * timer without interrupts
67 static inline ulong get_timer_raw(void)
69 ulong now = READ_TIMER;
71 return now - resettime;
73 return 0xFFFFFFFFUL - (resettime - now) ;
76 void reset_timer_masked(void)
78 resettime = READ_TIMER;
81 ulong get_timer_masked(void)
83 return TICKS_TO_USEC(get_timer_raw());
87 void udelay_masked(unsigned long usec)
92 while (get_timer(tmp) < usec) /* our timer works in usecs */
96 void reset_timer(void)
101 ulong get_timer(ulong base)
103 ulong now = get_timer_masked();
108 return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ;
111 void udelay(unsigned long usec)
117 * This function is derived from PowerPC code (read timebase as long long).
118 * On ARM it just returns the timer value.
120 unsigned long long get_ticks(void)
126 * This function is derived from PowerPC code (timebase clock frequency).
127 * On ARM it returns the number of timer ticks per second.
129 ulong get_tbclk(void)
137 * Reset the cpu by setting up the watchdog timer and let him time out
138 * on the AT91CAP9ADK board
140 void reset_cpu(ulong ignored)
142 /* this is the way Linux does it */
143 AT91C_BASE_RSTC->RSTC_RCR = (0xA5 << 24) |