2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
38 *************************************************************************
40 * Jump vector table as in table 3.1 in [1]
42 *************************************************************************
49 ldr pc, _undefined_instruction
50 ldr pc, _software_interrupt
51 ldr pc, _prefetch_abort
57 _undefined_instruction:
58 .word undefined_instruction
60 .word software_interrupt
72 .balignl 16,0xdeadbeef
76 *************************************************************************
78 * Startup Code (reset vector)
80 * do important init only if we don't start from memory!
81 * setup Memory and board specific bits prior to relocation.
82 * relocate armboot to ram
85 *************************************************************************
96 * These are defined in the board-specific linker script.
106 #ifdef CONFIG_USE_IRQ
107 /* IRQ stack memory (calculated at run-time) */
108 .globl IRQ_STACK_START
112 /* IRQ stack memory (calculated at run-time) */
113 .globl FIQ_STACK_START
120 * the actual reset code
125 * set the cpu to SVC32 mode
133 * we do sys-critical inits only at reboot,
134 * not when booting from ram!
136 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
140 relocate: /* relocate U-Boot to RAM */
141 adr r0, _start /* r0 <- current position of code */
142 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
143 cmp r0, r1 /* don't reloc during debug */
146 ldr r2, _armboot_start
148 sub r2, r3, r2 /* r2 <- size of armboot */
149 add r2, r0, r2 /* r2 <- source end address */
152 ldmia r0!, {r3-r10} /* copy from source address [r0] */
153 stmia r1!, {r3-r10} /* copy to target address [r1] */
154 cmp r0, r2 /* until source end addreee [r2] */
157 /* Set up the stack */
159 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
160 sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
161 sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
162 #ifdef CONFIG_USE_IRQ
163 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
165 sub sp, r0, #12 /* leave 3 words for abort-stack */
168 ldr r0, _bss_start /* find start of bss segment */
169 ldr r1, _bss_end /* stop here */
170 mov r2, #0x00000000 /* clear */
172 clbss_l:str r2, [r0] /* clear loop... */
177 ldr pc, _start_armboot
184 *************************************************************************
186 * CPU_init_critical registers
188 * setup important registers
189 * setup memory timing
191 *************************************************************************
195 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
198 * flush v4 I/D caches
201 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
202 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
205 * disable MMU stuff and caches
207 mrc p15, 0, r0, c1, c0, 0
208 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
209 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
210 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
211 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
212 mcr p15, 0, r0, c1, c0, 0
215 * Go setup Memory and board specific bits prior to relocation.
217 mov ip, lr /* perserve link reg across call */
218 bl lowlevel_init /* go setup memory */
219 mov lr, ip /* restore link */
220 mov pc, lr /* back to my caller */
223 *************************************************************************
227 *************************************************************************
233 #define S_FRAME_SIZE 72
255 #define MODE_SVC 0x13
259 * use bad_save_user_regs for abort/prefetch/undef/swi ...
260 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
263 .macro bad_save_user_regs
264 @ carve out a frame on current user stack
265 sub sp, sp, #S_FRAME_SIZE
266 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
268 ldr r2, _armboot_start
269 sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
270 sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
271 @ get values for "aborted" pc and cpsr (into parm regs)
273 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
276 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
277 mov r0, sp @ save current stack into r0 (param register)
280 .macro irq_save_user_regs
281 sub sp, sp, #S_FRAME_SIZE
282 stmia sp, {r0 - r12} @ Calling r0-r12
283 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
285 stmdb r8, {sp, lr}^ @ Calling SP, LR
286 str lr, [r8, #0] @ Save calling PC
288 str r6, [r8, #4] @ Save CPSR
289 str r0, [r8, #8] @ Save OLD_R0
293 .macro irq_restore_user_regs
294 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
296 ldr lr, [sp, #S_PC] @ Get PC
297 add sp, sp, #S_FRAME_SIZE
298 subs pc, lr, #4 @ return & move spsr_svc into cpsr
302 ldr r13, _armboot_start @ setup our mode stack
303 sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
304 sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
306 str lr, [r13] @ save caller lr in position 0 of saved stack
307 mrs lr, spsr @ get the spsr
308 str lr, [r13, #4] @ save spsr in position 1 of saved stack
309 mov r13, #MODE_SVC @ prepare SVC-Mode
311 msr spsr, r13 @ switch modes, make sure moves will execute
312 mov lr, pc @ capture return pc
313 movs pc, lr @ jump to next instruction & switch modes.
316 .macro get_irq_stack @ setup IRQ stack
317 ldr sp, IRQ_STACK_START
320 .macro get_fiq_stack @ setup FIQ stack
321 ldr sp, FIQ_STACK_START
328 undefined_instruction:
331 bl do_undefined_instruction
337 bl do_software_interrupt
357 #ifdef CONFIG_USE_IRQ
364 irq_restore_user_regs
369 /* someone ought to write a more effiction fiq_save_user_regs */
372 irq_restore_user_regs
390 # ifdef CONFIG_INTEGRATOR
392 /* Satisfied by general board level routine */
400 ldr r1, rstctl1 /* get clkm1 reset ctl */
402 strh r3, [r1] /* clear it */
404 strh r3, [r1] /* force dsp+arm reset */
411 #endif /* #ifdef CONFIG_INTEGRATOR */