3 * Josef Baumgartner <josef.baumgartner@telex.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/immap_5271.h>
30 #include <asm/m5271.h>
34 #include <asm/immap_5272.h>
35 #include <asm/m5272.h>
43 #include <asm/m5249.h>
51 printf ("CPU: Freescale Coldfire MCF5271 at %s MHz\n", strmhz(buf, CFG_CLK));
55 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
56 mbar_writeByte(MCF_RCM_RCR,
57 MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
61 #if defined(CONFIG_WATCHDOG)
62 void watchdog_reset (void)
64 mbar_writeShort(MCF_WTM_WSR, 0x5555);
65 mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
68 int watchdog_disable (void)
70 mbar_writeShort(MCF_WTM_WCR, 0);
74 int watchdog_init (void)
76 mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
79 #endif /* #ifdef CONFIG_WATCHDOG */
84 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
85 volatile wdog_t * wdp = (wdog_t *)(CFG_MBAR + MCFSIM_WRRR);
90 /* enable watchdog, set timeout to 0 and wait */
94 /* we don't return! */
99 ulong *dirp = (ulong *)(CFG_MBAR + MCFSIM_DIR);
104 msk = (*dirp > 28) & 0xf;
106 case 0x2: suf = "1K75N"; break;
107 case 0x4: suf = "3K75N"; break;
110 printf ("Freescale MCF5272 (Mask:%01x)\n", msk);
115 printf ("Freescale MCF5272 %s\n", suf);
120 #if defined(CONFIG_WATCHDOG)
121 /* Called by macro WATCHDOG_RESET */
122 void watchdog_reset (void)
124 volatile immap_t * regp = (volatile immap_t *)CFG_MBAR;
125 regp->wdog_reg.wdog_wcr = 0;
128 int watchdog_disable (void)
130 volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
132 regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
133 regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
134 regp->wdog_reg.wdog_wrrr = 0; /* disable watchdog timer */
136 puts ("WATCHDOG:disabled\n");
140 int watchdog_init (void)
142 volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
144 regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
146 /* set timeout and enable watchdog */
147 regp->wdog_reg.wdog_wrrr = ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
148 regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
150 puts ("WATCHDOG:enabled\n");
153 #endif /* #ifdef CONFIG_WATCHDOG */
155 #endif /* #ifdef CONFIG_M5272 */
161 puts ("CPU: Freescale Coldfire MCF5282\n");
165 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
170 #ifdef CONFIG_M5249 /* test-only: todo... */
175 printf ("CPU: Freescale Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
179 int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
180 /* enable watchdog, set timeout to 0 and wait */
181 mbar_writeByte(MCFSIM_SYPCR, 0xc0);
184 /* we don't return! */