2 * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
5 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Note: Part of this code has been derived from linux
30 * 1 - you MUST define LITTLEENDIAN in the configuration file for the
31 * board or this driver will NOT work!
32 * 2 - this driver is intended for use with USB Mass Storage Devices
33 * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
38 #ifdef CONFIG_USB_OHCI
40 /* #include <pci.h> no PCI on the AU1x00 */
45 #include <asm/au1x00.h>
47 #include "au1x00_usb_ohci.h"
49 #define OHCI_USE_NPS /* force NoPowerSwitching mode */
50 #define OHCI_VERBOSE_DEBUG /* not always helpful */
51 #define OHCI_FILL_TRACE
53 #define USBH_ENABLE_BE (1<<0)
54 #define USBH_ENABLE_C (1<<1)
55 #define USBH_ENABLE_E (1<<2)
56 #define USBH_ENABLE_CE (1<<3)
57 #define USBH_ENABLE_RD (1<<4)
60 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C)
62 #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | USBH_ENABLE_BE)
66 /* For initializing controller (mask in an HCFS mode too) */
67 #define OHCI_CONTROL_INIT \
68 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
73 #define readl(a) au_readl((long)(a))
74 #define writel(v,a) au_writel((v),(int)(a))
76 #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
80 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
82 #define dbg(format, arg...) do {} while(0)
84 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
87 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
89 #define info(format, arg...) do {} while(0)
92 #define m16_swap(x) swap_16(x)
93 #define m32_swap(x) swap_32(x)
97 /* this must be aligned to a 256 byte boundary */
98 struct ohci_hcca ghcca[1];
99 /* a pointer to the aligned storage */
100 struct ohci_hcca *phcca;
101 /* this allocates EDs for all possible endpoints */
102 struct ohci_device ohci_dev;
107 /* device which was disconnected */
108 struct usb_device *devgone;
110 /*-------------------------------------------------------------------------*/
112 /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
113 * The erratum (#4) description is incorrect. AMD's workaround waits
114 * till some bits (mostly reserved) are clear; ok for all revs.
116 #define OHCI_QUIRK_AMD756 0xabcd
117 #define read_roothub(hc, register, mask) ({ \
118 u32 temp = readl (&hc->regs->roothub.register); \
119 if (hc->flags & OHCI_QUIRK_AMD756) \
120 while (temp & mask) \
121 temp = readl (&hc->regs->roothub.register); \
124 static u32 roothub_a (struct ohci *hc)
125 { return read_roothub (hc, a, 0xfc0fe000); }
126 static inline u32 roothub_b (struct ohci *hc)
127 { return readl (&hc->regs->roothub.b); }
128 static inline u32 roothub_status (struct ohci *hc)
129 { return readl (&hc->regs->roothub.status); }
130 static u32 roothub_portstatus (struct ohci *hc, int i)
131 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
134 /* forward declaration */
135 static int hc_interrupt (void);
137 td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
138 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
140 /*-------------------------------------------------------------------------*
141 * URB support functions
142 *-------------------------------------------------------------------------*/
144 /* free HCD-private data associated with this URB */
146 static void urb_free_priv (urb_priv_t * urb)
152 last = urb->length - 1;
154 for (i = 0; i <= last; i++) {
164 /*-------------------------------------------------------------------------*/
167 static int sohci_get_current_frame_number (struct usb_device * dev);
169 /* debug| print the main components of an URB
170 * small: 0) header + data packets 1) just header */
172 static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
173 int transfer_len, struct devrequest * setup, char * str, int small)
175 urb_priv_t * purb = &urb_priv;
177 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
179 sohci_get_current_frame_number (dev),
180 usb_pipedevice (pipe),
181 usb_pipeendpoint (pipe),
182 usb_pipeout (pipe)? 'O': 'I',
183 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
184 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
186 transfer_len, dev->status);
187 #ifdef OHCI_VERBOSE_DEBUG
191 if (usb_pipecontrol (pipe)) {
192 printf (__FILE__ ": cmd(8):");
193 for (i = 0; i < 8 ; i++)
194 printf (" %02x", ((__u8 *) setup) [i]);
197 if (transfer_len > 0 && buffer) {
198 printf (__FILE__ ": data(%d/%d):",
201 len = usb_pipeout (pipe)?
202 transfer_len: purb->actual_length;
203 for (i = 0; i < 16 && i < len; i++)
204 printf (" %02x", ((__u8 *) buffer) [i]);
205 printf ("%s\n", i < len? "...": "");
211 /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
212 void ep_print_int_eds (ohci_t *ohci, char * str) {
215 for (i= 0; i < 32; i++) {
217 ed_p = &(ohci->hcca->int_table [i]);
220 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
221 while (*ed_p != 0 && j--) {
222 ed_t *ed = (ed_t *)m32_swap(ed_p);
223 printf (" ed: %4x;", ed->hwINFO);
224 ed_p = &ed->hwNextED;
230 static void ohci_dump_intr_mask (char *label, __u32 mask)
232 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
235 (mask & OHCI_INTR_MIE) ? " MIE" : "",
236 (mask & OHCI_INTR_OC) ? " OC" : "",
237 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
238 (mask & OHCI_INTR_FNO) ? " FNO" : "",
239 (mask & OHCI_INTR_UE) ? " UE" : "",
240 (mask & OHCI_INTR_RD) ? " RD" : "",
241 (mask & OHCI_INTR_SF) ? " SF" : "",
242 (mask & OHCI_INTR_WDH) ? " WDH" : "",
243 (mask & OHCI_INTR_SO) ? " SO" : ""
247 static void maybe_print_eds (char *label, __u32 value)
249 ed_t *edp = (ed_t *)value;
252 dbg ("%s %08x", label, value);
253 dbg ("%08x", edp->hwINFO);
254 dbg ("%08x", edp->hwTailP);
255 dbg ("%08x", edp->hwHeadP);
256 dbg ("%08x", edp->hwNextED);
260 static char * hcfs2string (int state)
263 case OHCI_USB_RESET: return "reset";
264 case OHCI_USB_RESUME: return "resume";
265 case OHCI_USB_OPER: return "operational";
266 case OHCI_USB_SUSPEND: return "suspend";
271 /* dump control and status registers */
272 static void ohci_dump_status (ohci_t *controller)
274 struct ohci_regs *regs = controller->regs;
277 temp = readl (®s->revision) & 0xff;
279 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
281 temp = readl (®s->control);
282 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
283 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
284 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
285 (temp & OHCI_CTRL_IR) ? " IR" : "",
286 hcfs2string (temp & OHCI_CTRL_HCFS),
287 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
288 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
289 (temp & OHCI_CTRL_IE) ? " IE" : "",
290 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
291 temp & OHCI_CTRL_CBSR
294 temp = readl (®s->cmdstatus);
295 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
296 (temp & OHCI_SOC) >> 16,
297 (temp & OHCI_OCR) ? " OCR" : "",
298 (temp & OHCI_BLF) ? " BLF" : "",
299 (temp & OHCI_CLF) ? " CLF" : "",
300 (temp & OHCI_HCR) ? " HCR" : ""
303 ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
304 ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
306 maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
308 maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
309 maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
311 maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
312 maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
314 maybe_print_eds ("donehead", readl (®s->donehead));
317 static void ohci_dump_roothub (ohci_t *controller, int verbose)
321 temp = roothub_a (controller);
322 ndp = (temp & RH_A_NDP);
325 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
326 ((temp & RH_A_POTPGT) >> 24) & 0xff,
327 (temp & RH_A_NOCP) ? " NOCP" : "",
328 (temp & RH_A_OCPM) ? " OCPM" : "",
329 (temp & RH_A_DT) ? " DT" : "",
330 (temp & RH_A_NPS) ? " NPS" : "",
331 (temp & RH_A_PSM) ? " PSM" : "",
334 temp = roothub_b (controller);
335 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
337 (temp & RH_B_PPCM) >> 16,
340 temp = roothub_status (controller);
341 dbg ("roothub.status: %08x%s%s%s%s%s%s",
343 (temp & RH_HS_CRWE) ? " CRWE" : "",
344 (temp & RH_HS_OCIC) ? " OCIC" : "",
345 (temp & RH_HS_LPSC) ? " LPSC" : "",
346 (temp & RH_HS_DRWE) ? " DRWE" : "",
347 (temp & RH_HS_OCI) ? " OCI" : "",
348 (temp & RH_HS_LPS) ? " LPS" : ""
352 for (i = 0; i < ndp; i++) {
353 temp = roothub_portstatus (controller, i);
354 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
357 (temp & RH_PS_PRSC) ? " PRSC" : "",
358 (temp & RH_PS_OCIC) ? " OCIC" : "",
359 (temp & RH_PS_PSSC) ? " PSSC" : "",
360 (temp & RH_PS_PESC) ? " PESC" : "",
361 (temp & RH_PS_CSC) ? " CSC" : "",
363 (temp & RH_PS_LSDA) ? " LSDA" : "",
364 (temp & RH_PS_PPS) ? " PPS" : "",
365 (temp & RH_PS_PRS) ? " PRS" : "",
366 (temp & RH_PS_POCI) ? " POCI" : "",
367 (temp & RH_PS_PSS) ? " PSS" : "",
369 (temp & RH_PS_PES) ? " PES" : "",
370 (temp & RH_PS_CCS) ? " CCS" : ""
375 static void ohci_dump (ohci_t *controller, int verbose)
377 dbg ("OHCI controller usb-%s state", controller->slot_name);
379 /* dumps some of the state we know about */
380 ohci_dump_status (controller);
382 ep_print_int_eds (controller, "hcca");
383 dbg ("hcca frame #%04x", controller->hcca->frame_no);
384 ohci_dump_roothub (controller, 1);
390 /*-------------------------------------------------------------------------*
391 * Interface functions (URB)
392 *-------------------------------------------------------------------------*/
394 /* get a transfer request */
396 int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
397 int transfer_len, struct devrequest *setup, int interval)
401 urb_priv_t *purb_priv;
406 /* when controller's hung, permit only roothub cleanup attempts
407 * such as powering down ports */
408 if (ohci->disabled) {
409 err("sohci_submit_job: EPIPE");
413 /* every endpoint has a ed, locate and fill it */
414 if (!(ed = ep_add_ed (dev, pipe))) {
415 err("sohci_submit_job: ENOMEM");
419 /* for the private part of the URB we need the number of TDs (size) */
420 switch (usb_pipetype (pipe)) {
421 case PIPE_BULK: /* one TD for every 4096 Byte */
422 size = (transfer_len - 1) / 4096 + 1;
424 case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
425 size = (transfer_len == 0)? 2:
426 (transfer_len - 1) / 4096 + 3;
430 if (size >= (N_URB_TD - 1)) {
431 err("need %d TDs, only have %d", size, N_URB_TD);
434 purb_priv = &urb_priv;
435 purb_priv->pipe = pipe;
437 /* fill the private part of the URB */
438 purb_priv->length = size;
440 purb_priv->actual_length = 0;
442 /* allocate the TDs */
443 /* note that td[0] was allocated in ep_add_ed */
444 for (i = 0; i < size; i++) {
445 purb_priv->td[i] = td_alloc (dev);
446 if (!purb_priv->td[i]) {
447 purb_priv->length = i;
448 urb_free_priv (purb_priv);
449 err("sohci_submit_job: ENOMEM");
454 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
455 urb_free_priv (purb_priv);
456 err("sohci_submit_job: EINVAL");
460 /* link the ed into a chain if is not already */
461 if (ed->state != ED_OPER)
464 /* fill the TDs and link it to the ed */
465 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
470 /*-------------------------------------------------------------------------*/
473 /* tell us the current USB frame number */
475 static int sohci_get_current_frame_number (struct usb_device *usb_dev)
477 ohci_t *ohci = &gohci;
479 return m16_swap (ohci->hcca->frame_no);
483 /*-------------------------------------------------------------------------*
484 * ED handling functions
485 *-------------------------------------------------------------------------*/
487 /* link an ed into one of the HC chains */
489 static int ep_link (ohci_t *ohci, ed_t *edi)
491 volatile ed_t *ed = edi;
498 if (ohci->ed_controltail == NULL) {
499 writel ((long)ed, &ohci->regs->ed_controlhead);
501 ohci->ed_controltail->hwNextED = m32_swap (ed);
503 ed->ed_prev = ohci->ed_controltail;
504 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
505 !ohci->ed_rm_list[1] && !ohci->sleeping) {
506 ohci->hc_control |= OHCI_CTRL_CLE;
507 writel (ohci->hc_control, &ohci->regs->control);
509 ohci->ed_controltail = edi;
514 if (ohci->ed_bulktail == NULL) {
515 writel ((long)ed, &ohci->regs->ed_bulkhead);
517 ohci->ed_bulktail->hwNextED = m32_swap (ed);
519 ed->ed_prev = ohci->ed_bulktail;
520 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
521 !ohci->ed_rm_list[1] && !ohci->sleeping) {
522 ohci->hc_control |= OHCI_CTRL_BLE;
523 writel (ohci->hc_control, &ohci->regs->control);
525 ohci->ed_bulktail = edi;
531 /*-------------------------------------------------------------------------*/
533 /* unlink an ed from one of the HC chains.
534 * just the link to the ed is unlinked.
535 * the link from the ed still points to another operational ed or 0
536 * so the HC can eventually finish the processing of the unlinked ed */
538 static int ep_unlink (ohci_t *ohci, ed_t *ed)
540 ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
544 if (ed->ed_prev == NULL) {
546 ohci->hc_control &= ~OHCI_CTRL_CLE;
547 writel (ohci->hc_control, &ohci->regs->control);
549 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
551 ed->ed_prev->hwNextED = ed->hwNextED;
553 if (ohci->ed_controltail == ed) {
554 ohci->ed_controltail = ed->ed_prev;
556 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
561 if (ed->ed_prev == NULL) {
563 ohci->hc_control &= ~OHCI_CTRL_BLE;
564 writel (ohci->hc_control, &ohci->regs->control);
566 writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
568 ed->ed_prev->hwNextED = ed->hwNextED;
570 if (ohci->ed_bulktail == ed) {
571 ohci->ed_bulktail = ed->ed_prev;
573 ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
577 ed->state = ED_UNLINK;
582 /*-------------------------------------------------------------------------*/
584 /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
585 * but the USB stack is a little bit stateless so we do it at every transaction
586 * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
587 * in all other cases the state is left unchanged
588 * the ed info fields are setted anyway even though most of them should not change */
590 static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
596 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
597 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
599 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
600 err("ep_add_ed: pending delete");
601 /* pending delete request */
605 if (ed->state == ED_NEW) {
606 ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
607 /* dummy td; end of td list for ed */
608 td = td_alloc (usb_dev);
609 ed->hwTailP = m32_swap (td);
610 ed->hwHeadP = ed->hwTailP;
611 ed->state = ED_UNLINK;
612 ed->type = usb_pipetype (pipe);
616 ed->hwINFO = m32_swap (usb_pipedevice (pipe)
617 | usb_pipeendpoint (pipe) << 7
618 | (usb_pipeisoc (pipe)? 0x8000: 0)
619 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
620 | usb_pipeslow (pipe) << 13
621 | usb_maxpacket (usb_dev, pipe) << 16);
626 /*-------------------------------------------------------------------------*
627 * TD handling functions
628 *-------------------------------------------------------------------------*/
630 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
632 static void td_fill (ohci_t *ohci, unsigned int info,
634 struct usb_device *dev, int index, urb_priv_t *urb_priv)
636 volatile td_t *td, *td_pt;
637 #ifdef OHCI_FILL_TRACE
641 if (index > urb_priv->length) {
642 err("index > length");
645 /* use this td as the next dummy */
646 td_pt = urb_priv->td [index];
649 /* fill the old dummy TD */
650 td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
652 td->ed = urb_priv->ed;
653 td->next_dl_td = NULL;
655 td->data = (__u32)data;
656 #ifdef OHCI_FILL_TRACE
657 if (1 || (usb_pipebulk(urb_priv->pipe) &&
658 usb_pipeout(urb_priv->pipe))) {
659 for (i = 0; i < len; i++)
660 printf("td->data[%d] %#2x\n",i, ((unsigned char *)(td->data+0x80000000))[i]);
666 td->hwINFO = m32_swap (info);
667 td->hwCBP = m32_swap (data);
669 td->hwBE = m32_swap (data + len - 1);
672 td->hwNextTD = m32_swap (td_pt);
673 td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
675 /* append to queue */
676 td->ed->hwTailP = td->hwNextTD;
679 /*-------------------------------------------------------------------------*/
681 /* prepare all TDs of a transfer */
683 #define kseg_to_phys(x) ((void *)((__u32)(x) - 0x80000000))
685 static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
686 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
688 ohci_t *ohci = &gohci;
689 int data_len = transfer_len;
693 unsigned int toggle = 0;
695 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
696 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
697 toggle = TD_T_TOGGLE;
700 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
704 data = kseg_to_phys(buffer);
708 switch (usb_pipetype (pipe)) {
710 info = usb_pipeout (pipe)?
711 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
712 while(data_len > 4096) {
713 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
714 data += 4096; data_len -= 4096; cnt++;
716 info = usb_pipeout (pipe)?
717 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
718 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
722 writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
726 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
727 td_fill (ohci, info, kseg_to_phys(setup), 8, dev, cnt++, urb);
729 info = usb_pipeout (pipe)?
730 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
731 /* NOTE: mishandles transfers >8K, some >4K */
732 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
734 info = usb_pipeout (pipe)?
735 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
736 td_fill (ohci, info, data, 0, dev, cnt++, urb);
738 writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
741 if (urb->length != cnt)
742 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
745 /*-------------------------------------------------------------------------*
746 * Done List handling functions
747 *-------------------------------------------------------------------------*/
750 /* calculate the transfer length and update the urb */
752 static void dl_transfer_length(td_t * td)
754 __u32 tdINFO, tdBE, tdCBP;
755 urb_priv_t *lurb_priv = &urb_priv;
757 tdINFO = m32_swap (td->hwINFO);
758 tdBE = m32_swap (td->hwBE);
759 tdCBP = m32_swap (td->hwCBP);
762 if (!(usb_pipecontrol(lurb_priv->pipe) &&
763 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
766 lurb_priv->actual_length += tdBE - td->data + 1;
768 lurb_priv->actual_length += tdCBP - td->data;
773 /*-------------------------------------------------------------------------*/
775 /* replies to the request have to be on a FIFO basis so
776 * we reverse the reversed done-list */
778 static td_t * dl_reverse_done_list (ohci_t *ohci)
782 td_t *td_list = NULL;
783 urb_priv_t *lurb_priv = NULL;
785 td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
786 ohci->hcca->done_head = 0;
789 td_list = (td_t *)td_list_hc;
791 if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
792 lurb_priv = &urb_priv;
793 dbg(" USB-error/status: %x : %p",
794 TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
795 if (td_list->ed->hwHeadP & m32_swap (0x1)) {
796 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
797 td_list->ed->hwHeadP =
798 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
799 (td_list->ed->hwHeadP & m32_swap (0x2));
800 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
802 td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
806 td_list->next_dl_td = td_rev;
808 td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
813 /*-------------------------------------------------------------------------*/
816 static int dl_done_list (ohci_t *ohci, td_t *td_list)
818 td_t *td_list_next = NULL;
823 urb_priv_t *lurb_priv;
824 __u32 tdINFO, edHeadP, edTailP;
827 td_list_next = td_list->next_dl_td;
829 lurb_priv = &urb_priv;
830 tdINFO = m32_swap (td_list->hwINFO);
834 dl_transfer_length(td_list);
836 /* error code of transfer */
837 cc = TD_CC_GET (tdINFO);
839 dbg("ConditionCode %#x", cc);
840 stat = cc_to_error[cc];
843 if (ed->state != ED_NEW) {
844 edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
845 edTailP = m32_swap (ed->hwTailP);
847 /* unlink eds if they are not busy */
848 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
849 ep_unlink (ohci, ed);
852 td_list = td_list_next;
857 /*-------------------------------------------------------------------------*
859 *-------------------------------------------------------------------------*/
861 /* Device descriptor */
862 static __u8 root_hub_dev_des[] =
864 0x12, /* __u8 bLength; */
865 0x01, /* __u8 bDescriptorType; Device */
866 0x10, /* __u16 bcdUSB; v1.1 */
868 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
869 0x00, /* __u8 bDeviceSubClass; */
870 0x00, /* __u8 bDeviceProtocol; */
871 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
872 0x00, /* __u16 idVendor; */
874 0x00, /* __u16 idProduct; */
876 0x00, /* __u16 bcdDevice; */
878 0x00, /* __u8 iManufacturer; */
879 0x01, /* __u8 iProduct; */
880 0x00, /* __u8 iSerialNumber; */
881 0x01 /* __u8 bNumConfigurations; */
885 /* Configuration descriptor */
886 static __u8 root_hub_config_des[] =
888 0x09, /* __u8 bLength; */
889 0x02, /* __u8 bDescriptorType; Configuration */
890 0x19, /* __u16 wTotalLength; */
892 0x01, /* __u8 bNumInterfaces; */
893 0x01, /* __u8 bConfigurationValue; */
894 0x00, /* __u8 iConfiguration; */
895 0x40, /* __u8 bmAttributes;
896 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
897 0x00, /* __u8 MaxPower; */
900 0x09, /* __u8 if_bLength; */
901 0x04, /* __u8 if_bDescriptorType; Interface */
902 0x00, /* __u8 if_bInterfaceNumber; */
903 0x00, /* __u8 if_bAlternateSetting; */
904 0x01, /* __u8 if_bNumEndpoints; */
905 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
906 0x00, /* __u8 if_bInterfaceSubClass; */
907 0x00, /* __u8 if_bInterfaceProtocol; */
908 0x00, /* __u8 if_iInterface; */
911 0x07, /* __u8 ep_bLength; */
912 0x05, /* __u8 ep_bDescriptorType; Endpoint */
913 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
914 0x03, /* __u8 ep_bmAttributes; Interrupt */
915 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
917 0xff /* __u8 ep_bInterval; 255 ms */
920 static unsigned char root_hub_str_index0[] =
922 0x04, /* __u8 bLength; */
923 0x03, /* __u8 bDescriptorType; String-descriptor */
924 0x09, /* __u8 lang ID */
925 0x04, /* __u8 lang ID */
928 static unsigned char root_hub_str_index1[] =
930 28, /* __u8 bLength; */
931 0x03, /* __u8 bDescriptorType; String-descriptor */
932 'O', /* __u8 Unicode */
933 0, /* __u8 Unicode */
934 'H', /* __u8 Unicode */
935 0, /* __u8 Unicode */
936 'C', /* __u8 Unicode */
937 0, /* __u8 Unicode */
938 'I', /* __u8 Unicode */
939 0, /* __u8 Unicode */
940 ' ', /* __u8 Unicode */
941 0, /* __u8 Unicode */
942 'R', /* __u8 Unicode */
943 0, /* __u8 Unicode */
944 'o', /* __u8 Unicode */
945 0, /* __u8 Unicode */
946 'o', /* __u8 Unicode */
947 0, /* __u8 Unicode */
948 't', /* __u8 Unicode */
949 0, /* __u8 Unicode */
950 ' ', /* __u8 Unicode */
951 0, /* __u8 Unicode */
952 'H', /* __u8 Unicode */
953 0, /* __u8 Unicode */
954 'u', /* __u8 Unicode */
955 0, /* __u8 Unicode */
956 'b', /* __u8 Unicode */
957 0, /* __u8 Unicode */
960 /* Hub class-specific descriptor is constructed dynamically */
963 /*-------------------------------------------------------------------------*/
965 #define OK(x) len = (x); break
967 #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
968 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
970 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
971 #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
973 #define RD_RH_STAT roothub_status(&gohci)
974 #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
976 /* request to virtual root hub */
978 int rh_check_port_status(ohci_t *controller)
984 temp = roothub_a (controller);
985 ndp = (temp & RH_A_NDP);
986 for (i = 0; i < ndp; i++) {
987 temp = roothub_portstatus (controller, i);
988 /* check for a device disconnect */
989 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
990 (RH_PS_PESC | RH_PS_CSC)) &&
991 ((temp & RH_PS_CCS) == 0)) {
999 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1000 void *buffer, int transfer_len, struct devrequest *cmd)
1002 void * data = buffer;
1003 int leni = transfer_len;
1007 __u8 *data_buf = (__u8 *)datab;
1014 urb_priv.actual_length = 0;
1015 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1019 if (usb_pipeint(pipe)) {
1020 info("Root-Hub submit IRQ: NOT implemented");
1024 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1025 wValue = m16_swap (cmd->value);
1026 wIndex = m16_swap (cmd->index);
1027 wLength = m16_swap (cmd->length);
1029 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1030 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1032 switch (bmRType_bReq) {
1033 /* Request Destination:
1034 without flags: Device,
1035 RH_INTERFACE: interface,
1036 RH_ENDPOINT: endpoint,
1037 RH_CLASS means HUB here,
1038 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1042 *(__u16 *) data_buf = m16_swap (1); OK (2);
1043 case RH_GET_STATUS | RH_INTERFACE:
1044 *(__u16 *) data_buf = m16_swap (0); OK (2);
1045 case RH_GET_STATUS | RH_ENDPOINT:
1046 *(__u16 *) data_buf = m16_swap (0); OK (2);
1047 case RH_GET_STATUS | RH_CLASS:
1048 *(__u32 *) data_buf = m32_swap (
1049 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1051 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1052 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1054 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1056 case (RH_ENDPOINT_STALL): OK (0);
1060 case RH_CLEAR_FEATURE | RH_CLASS:
1062 case RH_C_HUB_LOCAL_POWER:
1064 case (RH_C_HUB_OVER_CURRENT):
1065 WR_RH_STAT(RH_HS_OCIC); OK (0);
1069 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1071 case (RH_PORT_ENABLE):
1072 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1073 case (RH_PORT_SUSPEND):
1074 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1075 case (RH_PORT_POWER):
1076 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1077 case (RH_C_PORT_CONNECTION):
1078 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1079 case (RH_C_PORT_ENABLE):
1080 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1081 case (RH_C_PORT_SUSPEND):
1082 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1083 case (RH_C_PORT_OVER_CURRENT):
1084 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1085 case (RH_C_PORT_RESET):
1086 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1090 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1092 case (RH_PORT_SUSPEND):
1093 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1094 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1095 if (RD_RH_PORTSTAT & RH_PS_CCS)
1096 WR_RH_PORTSTAT (RH_PS_PRS);
1098 case (RH_PORT_POWER):
1099 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1100 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1101 if (RD_RH_PORTSTAT & RH_PS_CCS)
1102 WR_RH_PORTSTAT (RH_PS_PES );
1107 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1109 case RH_GET_DESCRIPTOR:
1110 switch ((wValue & 0xff00) >> 8) {
1111 case (0x01): /* device descriptor */
1112 len = min_t(unsigned int,
1115 sizeof (root_hub_dev_des),
1117 data_buf = root_hub_dev_des; OK(len);
1118 case (0x02): /* configuration descriptor */
1119 len = min_t(unsigned int,
1122 sizeof (root_hub_config_des),
1124 data_buf = root_hub_config_des; OK(len);
1125 case (0x03): /* string descriptors */
1126 if(wValue==0x0300) {
1127 len = min_t(unsigned int,
1130 sizeof (root_hub_str_index0),
1132 data_buf = root_hub_str_index0;
1135 if(wValue==0x0301) {
1136 len = min_t(unsigned int,
1139 sizeof (root_hub_str_index1),
1141 data_buf = root_hub_str_index1;
1145 stat = USB_ST_STALLED;
1149 case RH_GET_DESCRIPTOR | RH_CLASS:
1151 __u32 temp = roothub_a (&gohci);
1153 data_buf [0] = 9; /* min length; */
1154 data_buf [1] = 0x29;
1155 data_buf [2] = temp & RH_A_NDP;
1157 if (temp & RH_A_PSM) /* per-port power switching? */
1158 data_buf [3] |= 0x1;
1159 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1160 data_buf [3] |= 0x10;
1161 else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
1162 data_buf [3] |= 0x8;
1164 /* corresponds to data_buf[4-7] */
1166 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1167 temp = roothub_b (&gohci);
1168 data_buf [7] = temp & RH_B_DR;
1169 if (data_buf [2] < 7) {
1170 data_buf [8] = 0xff;
1173 data_buf [8] = (temp & RH_B_DR) >> 8;
1174 data_buf [10] = data_buf [9] = 0xff;
1177 len = min_t(unsigned int, leni,
1178 min_t(unsigned int, data_buf [0], wLength));
1182 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1184 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1187 dbg ("unsupported root hub command");
1188 stat = USB_ST_STALLED;
1192 ohci_dump_roothub (&gohci, 1);
1197 len = min_t(int, len, leni);
1198 if (data != data_buf)
1199 memcpy (data, data_buf, len);
1205 urb_priv.actual_length = transfer_len;
1206 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1214 /*-------------------------------------------------------------------------*/
1216 /* common code for handling submit messages - used for all but root hub */
1218 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1219 int transfer_len, struct devrequest *setup, int interval)
1222 int maxsize = usb_maxpacket(dev, pipe);
1225 /* device pulled? Shortcut the action. */
1226 if (devgone == dev) {
1227 dev->status = USB_ST_CRC_ERR;
1232 urb_priv.actual_length = 0;
1233 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1238 err("submit_common_message: pipesize for pipe %lx is zero",
1243 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1244 err("sohci_submit_job failed");
1249 /* ohci_dump_status(&gohci); */
1251 /* allow more time for a BULK device to react - some are slow */
1252 #define BULK_TO 5000 /* timeout in milliseconds */
1253 if (usb_pipebulk(pipe))
1259 /* wait for it to complete */
1261 /* check whether the controller is done */
1262 stat = hc_interrupt();
1264 stat = USB_ST_CRC_ERR;
1267 if (stat >= 0 && stat != 0xff) {
1268 /* 0xff is returned for an SF-interrupt */
1272 udelay(250); /* wait_ms(1); */
1274 err("CTL:TIMEOUT ");
1275 stat = USB_ST_CRC_ERR;
1279 /* we got an Root Hub Status Change interrupt */
1282 ohci_dump_roothub (&gohci, 1);
1286 timeout = rh_check_port_status(&gohci);
1288 #if 0 /* this does nothing useful, but leave it here in case that changes */
1289 /* the called routine adds 1 to the passed value */
1290 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1294 * This is potentially dangerous because it assumes
1295 * that only one device is ever plugged in!
1302 dev->act_len = transfer_len;
1305 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1310 /* free TDs in urb_priv */
1311 urb_free_priv (&urb_priv);
1315 /* submit routines called from usb.c */
1316 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1319 info("submit_bulk_msg");
1320 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1323 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1324 int transfer_len, struct devrequest *setup)
1326 int maxsize = usb_maxpacket(dev, pipe);
1328 info("submit_control_msg");
1330 urb_priv.actual_length = 0;
1331 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1336 err("submit_control_message: pipesize for pipe %lx is zero",
1340 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1342 /* root hub - redirect */
1343 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1347 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1350 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1351 int transfer_len, int interval)
1353 info("submit_int_msg");
1357 /*-------------------------------------------------------------------------*
1359 *-------------------------------------------------------------------------*/
1361 /* reset the HC and BUS */
1363 static int hc_reset (ohci_t *ohci)
1366 int smm_timeout = 50; /* 0,5 sec */
1368 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
1369 writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1370 info("USB HC TakeOver from SMM");
1371 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1373 if (--smm_timeout == 0) {
1374 err("USB HC TakeOver failed!");
1380 /* Disable HC interrupts */
1381 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1383 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1385 readl (&ohci->regs->control));
1387 /* Reset USB (needed by some controllers) */
1388 writel (0, &ohci->regs->control);
1390 /* HC Reset requires max 10 us delay */
1391 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1392 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1393 if (--timeout == 0) {
1394 err("USB HC reset timed out!");
1402 /*-------------------------------------------------------------------------*/
1404 /* Start an OHCI controller, set the BUS operational
1406 * connect the virtual root hub */
1408 static int hc_start (ohci_t * ohci)
1411 unsigned int fminterval;
1415 /* Tell the controller where the control and bulk lists are
1416 * The lists are empty now. */
1418 writel (0, &ohci->regs->ed_controlhead);
1419 writel (0, &ohci->regs->ed_bulkhead);
1421 writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1423 fminterval = 0x2edf;
1424 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1425 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1426 writel (fminterval, &ohci->regs->fminterval);
1427 writel (0x628, &ohci->regs->lsthresh);
1429 /* start controller operations */
1430 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1432 writel (ohci->hc_control, &ohci->regs->control);
1434 /* disable all interrupts */
1435 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1436 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1437 OHCI_INTR_OC | OHCI_INTR_MIE);
1438 writel (mask, &ohci->regs->intrdisable);
1439 /* clear all interrupts */
1440 mask &= ~OHCI_INTR_MIE;
1441 writel (mask, &ohci->regs->intrstatus);
1442 /* Choose the interrupts we care about now - but w/o MIE */
1443 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1444 writel (mask, &ohci->regs->intrenable);
1447 /* required for AMD-756 and some Mac platforms */
1448 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1449 &ohci->regs->roothub.a);
1450 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1451 #endif /* OHCI_USE_NPS */
1453 #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
1454 /* POTPGT delay is bits 24-31, in 2 ms units. */
1455 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1457 /* connect the virtual root hub */
1458 ohci->rh.devnum = 0;
1463 /*-------------------------------------------------------------------------*/
1465 /* an interrupt happens */
1470 ohci_t *ohci = &gohci;
1471 struct ohci_regs *regs = ohci->regs;
1475 if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
1476 ints = OHCI_INTR_WDH;
1478 ints = readl (®s->intrstatus);
1481 /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
1483 if (ints & OHCI_INTR_RHSC) {
1487 if (ints & OHCI_INTR_UE) {
1489 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1491 /* e.g. due to PCI Master/Target Abort */
1494 ohci_dump (ohci, 1);
1498 /* FIXME: be optimistic, hope that bug won't repeat often. */
1499 /* Make some non-interrupt context restart the controller. */
1500 /* Count and limit the retries though; either hardware or */
1501 /* software errors can go forever... */
1506 if (ints & OHCI_INTR_WDH) {
1508 writel (OHCI_INTR_WDH, ®s->intrdisable);
1509 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1510 writel (OHCI_INTR_WDH, ®s->intrenable);
1513 if (ints & OHCI_INTR_SO) {
1514 dbg("USB Schedule overrun\n");
1515 writel (OHCI_INTR_SO, ®s->intrenable);
1519 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1520 if (ints & OHCI_INTR_SF) {
1521 unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
1523 writel (OHCI_INTR_SF, ®s->intrdisable);
1524 if (ohci->ed_rm_list[frame] != NULL)
1525 writel (OHCI_INTR_SF, ®s->intrenable);
1529 writel (ints, ®s->intrstatus);
1533 /*-------------------------------------------------------------------------*/
1535 /*-------------------------------------------------------------------------*/
1537 /* De-allocate all resources.. */
1539 static void hc_release_ohci (ohci_t *ohci)
1541 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1543 if (!ohci->disabled)
1547 /*-------------------------------------------------------------------------*/
1549 #define __read_32bit_c0_register(source, sel) \
1552 __asm__ __volatile__( \
1553 "mfc0\t%0, " #source "\n\t" \
1556 __asm__ __volatile__( \
1557 ".set\tmips32\n\t" \
1558 "mfc0\t%0, " #source ", " #sel "\n\t" \
1564 #define read_c0_prid() __read_32bit_c0_register($15, 0)
1567 * low level initalisation routine, called from usb.c
1569 static char ohci_inited = 0;
1571 int usb_lowlevel_init(void)
1574 u32 sys_freqctrl, sys_clksrc;
1575 u32 prid = read_c0_prid();
1577 dbg("in usb_lowlevel_init\n");
1579 /* zero and disable FREQ2 */
1580 sys_freqctrl = au_readl(SYS_FREQCTRL0);
1581 sys_freqctrl &= ~0xFFF00000;
1582 au_writel(sys_freqctrl, SYS_FREQCTRL0);
1584 /* zero and disable USBH/USBD clocks */
1585 sys_clksrc = au_readl(SYS_CLKSRC);
1586 sys_clksrc &= ~0x00007FE0;
1587 au_writel(sys_clksrc, SYS_CLKSRC);
1589 sys_freqctrl = au_readl(SYS_FREQCTRL0);
1590 sys_freqctrl &= ~0xFFF00000;
1592 sys_clksrc = au_readl(SYS_CLKSRC);
1593 sys_clksrc &= ~0x00007FE0;
1595 switch (prid & 0x000000FF) {
1599 /* CPU core freq to 48MHz to slow it way down... */
1600 au_writel(4, SYS_CPUPLL);
1603 * Setup 48MHz FREQ2 from CPUPLL for USB Host
1605 /* FRDIV2=3 -> div by 8 of 384MHz -> 48MHz */
1606 sys_freqctrl |= ((3<<22) | (1<<21) | (0<<20));
1607 au_writel(sys_freqctrl, SYS_FREQCTRL0);
1609 /* CPU core freq to 384MHz */
1610 au_writel(0x20, SYS_CPUPLL);
1612 printf("Au1000: 48MHz OHCI workaround enabled\n");
1615 default: /* HC and newer */
1616 /* FREQ2 = aux/2 = 48 MHz */
1617 sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
1618 au_writel(sys_freqctrl, SYS_FREQCTRL0);
1623 * Route 48MHz FREQ2 into USB Host and/or Device
1625 sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
1626 au_writel(sys_clksrc, SYS_CLKSRC);
1628 /* configure pins GPIO[14:9] as GPIO */
1629 pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8080);
1631 au_writel(pin_func, SYS_PINFUNC);
1632 au_writel(0x2800, SYS_TRIOUTCLR);
1633 au_writel(0x0030, SYS_OUTPUTCLR);
1635 dbg("OHCI board setup complete\n");
1637 /* enable host controller */
1638 au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG);
1640 au_writel(USBH_ENABLE_INIT, USB_HOST_CONFIG);
1643 /* wait for reset complete (read register twice; see au1500 errata) */
1644 while (au_readl(USB_HOST_CONFIG),
1645 !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD))
1648 dbg("OHCI clock running\n");
1650 memset (&gohci, 0, sizeof (ohci_t));
1651 memset (&urb_priv, 0, sizeof (urb_priv_t));
1653 /* align the storage */
1654 if ((__u32)&ghcca[0] & 0xff) {
1655 err("HCCA not aligned!!");
1659 info("aligned ghcca %p", phcca);
1660 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1661 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1662 err("EDs not aligned!!");
1665 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1666 if ((__u32)gtd & 0x7) {
1667 err("TDs not aligned!!");
1672 memset (phcca, 0, sizeof (struct ohci_hcca));
1677 gohci.regs = (struct ohci_regs *)(USB_OHCI_BASE | 0xA0000000);
1680 gohci.slot_name = "au1x00";
1682 dbg("OHCI revision: 0x%08x\n"
1683 " RH: a: 0x%08x b: 0x%08x\n",
1684 readl(&gohci.regs->revision),
1685 readl(&gohci.regs->roothub.a), readl(&gohci.regs->roothub.b));
1687 if (hc_reset (&gohci) < 0)
1690 /* FIXME this is a second HC reset; why?? */
1691 writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
1694 if (hc_start (&gohci) < 0)
1698 ohci_dump (&gohci, 1);
1706 err("OHCI initialization error\n");
1707 hc_release_ohci (&gohci);
1708 /* Initialization failed */
1709 au_writel(readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG);
1713 int usb_lowlevel_stop(void)
1715 /* this gets called really early - before the controller has */
1716 /* even been initialized! */
1719 /* TODO release any interrupts, etc. */
1720 /* call hc_release_ohci() here ? */
1722 /* may not want to do this */
1724 au_writel(readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG);
1728 #endif /* CONFIG_USB_OHCI */