3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * This file is based on code
6 * (C) Copyright Motorola, Inc., 2000
8 * MPC8220 dma header file
11 #ifndef __MPC8220_DMA_H
12 #define __MPC8220_DMA_H
17 /* Task number assignment */
18 #define FEC_RECV_TASK_NO 0
19 #define FEC_XMIT_TASK_NO 1
21 /*---------------------------------------------------------------------
22 * Stuff for Ethernet Tx/Rx tasks
23 *---------------------------------------------------------------------
26 /* Layout of Ethernet controller Parameter SRAM area:
27 * ----------------------------------------------------------------
28 * 0x00: TBD_BASE, base address of TX BD ring
29 * 0x04: TBD_NEXT, address of next TX BD to be processed
30 * 0x08: RBD_BASE, base address of RX BD ring
31 * 0x0C: RBD_NEXT, address of next RX BD to be processed
32 * ---------------------------------------------------------------
33 * ALL PARAMETERS ARE ALL LONGWORDS (FOUR BYTES EACH).
36 /* base address of SRAM area to store parameters used by Ethernet tasks */
37 #define FEC_PARAM_BASE (MMAP_SRAM + 0x5b00)
39 /* base address of SRAM area for buffer descriptors */
40 #define FEC_BD_BASE (MMAP_SRAM + 0x5b20)
42 /*---------------------------------------------------------------------
43 * common shortcuts used by driver C code
44 *---------------------------------------------------------------------
47 /* Disable SmartDMA task */
48 #define DMA_TASK_DISABLE(tasknum) \
50 volatile ushort *tcr = (ushort *)(MMAP_DMA + 0x0000001c + 2 * tasknum); \
51 *tcr = (*tcr) & (~0x8000); \
54 /* Enable SmartDMA task */
55 #define DMA_TASK_ENABLE(tasknum) \
57 volatile ushort *tcr = (ushort *) (MMAP_DMA + 0x0000001c + 2 * tasknum);\
58 *tcr = (*tcr) | 0x8000; \
61 /* Clear interrupt pending bits */
62 #define DMA_CLEAR_IEVENT(tasknum) \
64 struct mpc8220_dma *dma = (struct mpc8220_dma *)MMAP_DMA; \
65 dma->IntPend = (1 << tasknum); \
68 #endif /* __MPC8220_DMA_H */