2 * Copyright 2004 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * 20050101: Eran Liberty (liberty@freescale.com)
25 * Initial file creating (porting from 85XX & 8260)
29 * CPU specific code for the MPC83xx family.
31 * Derived from the MPC8260 and MPC85xx.
38 #include <asm/processor.h>
43 DECLARE_GLOBAL_DATA_PTR;
44 ulong clock = gd->cpu_clk;
48 if ((pvr & 0xFFFF0000) != PVR_83xx) {
49 puts("Not MPC83xx Family!!!\n");
53 puts("CPU: MPC83xx, ");
60 puts("Rev: Unknown\n");
61 return -1; /* Not sure what this is */
63 printf("Rev: %d.%d at %s MHz\n", (pvr & 0xf0) >> 4,
64 (pvr & 0x0f), strmhz(buf, clock));
70 void upmconfig (uint upm, uint *table, uint size)
72 hang(); /* FIXME: upconfig() needed? */
77 do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
84 volatile immap_t *immap = (immap_t *) CFG_IMMRBAR;
87 /* Interrupts and MMU off */
88 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
90 msr &= ~( MSR_EE | MSR_IR | MSR_DR);
91 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
93 /* enable Reset Control Reg */
94 immap->reset.rpr = 0x52535445;
96 /* confirm Reset Control Reg is enabled */
97 while(!((immap->reset.rcer) & RCER_CRE));
99 printf("Resetting the board.");
104 /* perform reset, only one bit */
105 immap->reset.rcr = RCR_SWHR;
107 #else /* ! MPC83xx_RESET */
109 immap->reset.rmr = RMR_CSRE; /* Checkstop Reset enable */
111 /* Interrupts and MMU off */
112 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
114 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
115 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
118 * Trying to execute the next instruction at a non-existing address
119 * should cause a machine check, resulting in reset
121 addr = CFG_RESET_ADDRESS;
123 printf("resetting the board.");
125 ((void (*)(void)) addr) ();
126 #endif /* MPC83xx_RESET */
133 * Get timebase clock frequency (like cpu_clk in Hz)
136 unsigned long get_tbclk(void)
138 DECLARE_GLOBAL_DATA_PTR;
142 tbclk = (gd->bus_clk + 3L) / 4L;
148 #if defined(CONFIG_WATCHDOG)
149 void watchdog_reset (void)
151 hang(); /* FIXME: implement watchdog_reset()? */
153 #endif /* CONFIG_WATCHDOG */