2 * (C) Copyright 2006 Freescale Semiconductor, Inc.
4 * (C) Copyright 2003,Motorola Inc.
5 * Xianghua Xiao <x.xiao@motorola.com>
6 * Adapted for Motorola 85xx chip.
9 * Gleb Natapov <gnatapov@mrv.com>
10 * Some bits are taken from linux driver writen by adrian@humboldt.co.uk
12 * Hardware I2C driver for MPC107 PCI bridge.
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 * 20050101: Eran Liberty (liberty@freescale.com)
35 * Initial file creating (porting from 85XX & 8260)
36 * 20060601: Dave Liu (daveliu@freescale.com)
37 * Unified variable names for mpc83xx
44 #ifdef CONFIG_HARD_I2C
48 DECLARE_GLOBAL_DATA_PTR;
50 /* Three I2C bus speeds are supported here (50kHz, 100kHz
51 * and 400kHz). It should be easy to add more. Note that
52 * the maximum bus speed for I2C bus 1 is CSB/3, while I2C
53 * bus 2 can go as high as CSB.
54 * Typical values for CSB are 266MHz and 200MHz. */
56 /* 50kH 100kHz 400kHz */
57 static const uchar speed_map_266[][3] =
58 {{0x2e, 0x2a, 0x20}, /* base 88MHz */
59 {0x34, 0x30, 0x28}}; /* base 266 MHz */
61 static const uchar speed_map_200[][3] =
62 {{0x2c, 0x28, 0x20}, /* base 66 MHz */
63 {0x33, 0x2f, 0x26}}; /* base 200 MHz */
65 /* Initialize the bus pointer to whatever one the SPD EEPROM is on.
66 * Default is bus 1. This is necessary because the DDR initialization
67 * runs from ROM, and we can't switch buses because we can't modify
68 * the i2c_dev variable. Everything gets straightened out once i2c_init
69 * is called from RAM. */
71 #if defined CFG_SPD_BUS_NUM
72 static i2c_t *i2c_dev = CFG_SPD_BUS_NUM;
74 static i2c_t *i2c_dev = I2C_1;
77 static uchar busNum = I2C_BUS_1 ;
78 static int bus_speed[2] = {0, 0};
80 static int set_speed(int speed)
85 /* Global data contains maximum I2C bus 1 speed, which is CSB/3 */
86 if(gd->i2c_clk == 88000000)
88 spdPtr = speed_map_266[busNum];
90 else if(gd->i2c_clk == 66000000)
92 spdPtr = speed_map_200[busNum];
96 printf("Max I2C bus speed %d not supported\n", gd->i2c_clk);
103 value = *(spdPtr + 0);
106 value = *(spdPtr + 1);
109 value = *(spdPtr + 2);
112 printf("I2C bus speed %d not supported\n", speed);
116 writeb(value, &i2c_dev->fdr);
117 bus_speed[busNum] = speed;
122 static void _i2c_init(int speed, int slaveadd)
124 /* stop I2C controller */
125 writeb(0x00 , &i2c_dev->cr);
128 writeb(speed, &i2c_dev->fdr);
130 /* set default filter */
131 writeb(0x10,&i2c_dev->dfsrr);
133 /* write slave address */
134 writeb(slaveadd, &i2c_dev->adr);
136 /* clear status register */
137 writeb(0x00, &i2c_dev->sr);
139 /* start I2C controller */
140 writeb(I2C_CR_MEN, &i2c_dev->cr);
143 void i2c_init(int speed, int slaveadd)
145 /* Set both interfaces to the same speed and slave address */
146 /* Note: This function gets called twice - before and after
147 * relocation to RAM. The first time it's called, we are unable
148 * to change buses, so whichever one 'i2c_dev' was initialized to
149 * gets set twice. When run from RAM both buses get set properly */
151 i2c_set_bus_num(I2C_BUS_1);
152 _i2c_init(speed, slaveadd);
153 #ifdef CFG_I2C2_OFFSET
154 i2c_set_bus_num(I2C_BUS_2);
155 _i2c_init(speed, slaveadd);
156 i2c_set_bus_num(I2C_BUS_1);
157 #endif /* CFG_I2C2_OFFSET */
160 static __inline__ int
163 ulong timeval = get_timer (0);
164 while (readb(&i2c_dev->sr) & I2C_SR_MBB) {
165 if (get_timer (timeval) > I2C_TIMEOUT) {
172 static __inline__ int
176 ulong timeval = get_timer(0);
178 csr = readb(&i2c_dev->sr);
180 if (!(csr & I2C_SR_MIF))
183 writeb(0x0, &i2c_dev->sr);
185 if (csr & I2C_SR_MAL) {
186 debug("i2c_wait: MAL\n");
190 if (!(csr & I2C_SR_MCF)) {
191 debug("i2c_wait: unfinished\n");
195 if (write == I2C_WRITE && (csr & I2C_SR_RXAK)) {
196 debug("i2c_wait: No RXACK\n");
201 } while (get_timer (timeval) < I2C_TIMEOUT);
203 debug("i2c_wait: timed out\n");
207 static __inline__ int
208 i2c_write_addr (u8 dev, u8 dir, int rsta)
210 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX |
211 (rsta?I2C_CR_RSTA:0),
214 writeb((dev << 1) | dir, &i2c_dev->dr);
216 if (i2c_wait (I2C_WRITE) < 0)
221 static __inline__ int
222 __i2c_write (u8 *data, int length)
226 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
229 for (i=0; i < length; i++) {
230 writeb(data[i], &i2c_dev->dr);
232 if (i2c_wait (I2C_WRITE) < 0)
238 static __inline__ int
239 __i2c_read (u8 *data, int length)
243 writeb(I2C_CR_MEN | I2C_CR_MSTA |
244 ((length == 1) ? I2C_CR_TXAK : 0),
250 for (i=0; i < length; i++) {
251 if (i2c_wait (I2C_READ) < 0)
254 /* Generate ack on last next to last byte */
256 writeb(I2C_CR_MEN | I2C_CR_MSTA |
260 /* Generate stop on last byte */
262 writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev->cr);
264 data[i] = readb(&i2c_dev->dr);
270 i2c_read (u8 dev, uint addr, int alen, u8 *data, int length)
275 if (i2c_wait4bus () < 0)
278 if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
281 if (__i2c_write (&a[4 - alen], alen) != alen)
284 if (i2c_write_addr (dev, I2C_READ, 1) == 0)
287 i = __i2c_read (data, length);
290 writeb(I2C_CR_MEN, &i2c_dev->cr);
291 return !(i == length);
295 i2c_write (u8 dev, uint addr, int alen, u8 *data, int length)
300 if (i2c_wait4bus () < 0)
303 if (i2c_write_addr (dev, I2C_WRITE, 0) == 0)
306 if (__i2c_write (&a[4 - alen], alen) != alen)
309 i = __i2c_write (data, length);
312 writeb(I2C_CR_MEN, &i2c_dev->cr);
313 return !(i == length);
316 int i2c_probe (uchar chip)
321 * Try to read the first location of the chip. The underlying
322 * driver doesn't appear to support sending just the chip address
323 * and looking for an <ACK> back.
326 return i2c_read (chip, 0, 1, (uchar *)&tmp, 1);
329 uchar i2c_reg_read (uchar i2c_addr, uchar reg)
333 i2c_read (i2c_addr, reg, 1, buf, 1);
338 void i2c_reg_write (uchar i2c_addr, uchar reg, uchar val)
340 i2c_write (i2c_addr, reg, 1, &val, 1);
343 int i2c_set_bus_num(uchar bus)
349 #ifdef CFG_I2C2_OFFSET
350 else if(bus == I2C_BUS_2)
354 #endif /* CFG_I2C2_OFFSET */
363 int i2c_set_bus_speed(int speed)
365 return set_speed(speed);
368 uchar i2c_get_bus_num(void)
373 int i2c_get_bus_speed(void)
375 return bus_speed[busNum];
377 #endif /* CONFIG_HARD_I2C */