2 * Copyright 2008-2009 Freescale Semiconductor, Inc.
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/processor.h>
29 #ifdef CONFIG_ADDR_MAP
33 DECLARE_GLOBAL_DATA_PTR;
35 void set_tlb(u8 tlb, u32 epn, u64 rpn,
37 u8 ts, u8 esel, u8 tsize, u8 iprot)
39 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
41 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
42 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
43 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
44 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
45 _mas7 = FSL_BOOKE_MAS7(rpn);
47 write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
49 #ifdef CONFIG_ADDR_MAP
50 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
51 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
55 void disable_tlb(u8 esel)
57 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
59 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
69 #ifdef CONFIG_ENABLE_36BIT_PHYS
72 asm volatile("isync;msync;tlbwe;isync");
74 #ifdef CONFIG_ADDR_MAP
75 if (gd->flags & GD_FLG_RELOC)
76 addrmap_set_entry(0, 0, 0, esel);
80 void invalidate_tlb(u8 tlb)
92 for (i = 0; i < num_tlb_entries; i++) {
93 write_tlb(tlb_table[i].mas0,
103 static void tlbsx (const volatile unsigned *addr)
105 __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
108 /* return -1 if we didn't find anything */
109 int find_tlb_idx(void *addr, u8 tlbsel)
113 /* zero out Search PID, AS */
121 /* we found something, and its in the TLB we expect */
122 if ((MAS1_VALID & _mas1) &&
123 (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
124 return ((_mas0 & MAS0_ESEL_MSK) >> 16);
130 #ifdef CONFIG_ADDR_MAP
131 void init_addr_map(void)
134 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
136 /* walk all the entries */
137 for (i = 0; i < max_cam; i++) {
142 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
144 asm volatile("tlbre;isync");
147 /* if the entry isn't valid skip it */
148 if (!(_mas1 & MAS1_VALID))
151 tsize = (_mas1 >> 8) & 0xf;
152 epn = mfspr(MAS2) & MAS2_EPN;
153 rpn = mfspr(MAS3) & MAS3_RPN;
154 #ifdef CONFIG_ENABLE_36BIT_PHYS
155 rpn |= ((phys_addr_t)mfspr(MAS7)) << 32;
158 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i);
165 #ifndef CONFIG_SYS_DDR_TLB_START
166 #define CONFIG_SYS_DDR_TLB_START 8
169 unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
171 unsigned int tlb_size;
172 unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
173 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
174 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
175 u64 size, memsize = (u64)memsize_in_meg << 20;
177 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
179 /* Convert (4^max) kB to (2^max) bytes */
180 max_cam = max_cam * 2 + 10;
182 for (; size && ram_tlb_index < 16; ram_tlb_index++) {
183 u32 camsize = __ilog2_u64(size) & ~1U;
184 u32 align = __ilog2(ram_tlb_address) & ~1U;
186 if (align == -2) align = max_cam;
190 if (camsize > max_cam)
193 tlb_size = (camsize - 10) / 2;
195 set_tlb(1, ram_tlb_address, ram_tlb_address,
196 MAS3_SX|MAS3_SW|MAS3_SR, 0,
197 0, ram_tlb_index, tlb_size, 1);
199 size -= 1ULL << camsize;
200 memsize -= 1ULL << camsize;
201 ram_tlb_address += 1UL << camsize;
205 print_size(memsize, " left unmapped\n");
208 * Confirm that the requested amount of memory was mapped.
210 return memsize_in_meg;