2 * (C) Copyright 2007-2008
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/cache.h>
30 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
32 #include <libfdt_env.h>
33 #include <fdt_support.h>
34 #include <asm/4xx_pcie.h>
36 DECLARE_GLOBAL_DATA_PTR;
38 void __ft_board_setup(void *blob, bd_t *bd)
43 u32 ranges[EBC_NUM_BANKS * 4];
45 char *ebc_path = "/plb/opb/ebc";
47 ft_cpu_setup(blob, bd);
50 * Read 4xx EBC bus bridge registers to get mappings of the
51 * peripheral banks into the OPB/PLB address space
53 for (i = 0; i < EBC_NUM_BANKS; i++) {
54 mtdcr(EBC0_CFGADDR, EBC_BXCR(i));
55 bxcr = mfdcr(EBC0_CFGDATA);
57 if ((bxcr & EBC_BXCR_BU_MASK) != EBC_BXCR_BU_NONE) {
60 *p++ = bxcr & EBC_BXCR_BAS_MASK;
61 *p++ = EBC_BXCR_BANK_SIZE(bxcr);
65 /* Some 405 PPC's have EBC as direct PLB child in the dts */
66 if (fdt_path_offset(blob, "/plb/opb/ebc") < 0)
67 strcpy(ebc_path, "/plb/ebc");
68 rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges,
69 (p - ranges) * sizeof(u32), 1);
71 printf("Unable to update property EBC mappings, err=%s\n",
75 void ft_board_setup(void *blob, bd_t *bd) __attribute__((weak, alias("__ft_board_setup")));
78 * Fixup all PCIe nodes by setting the device_type property
79 * to "pci-endpoint" instead is "pci" for endpoint ports.
80 * This property will get checked later by the Linux driver
81 * to properly configure the PCIe port in Linux (again).
83 void fdt_pcie_setup(void *blob)
85 const char *compat = "ibm,plb-pciex";
86 const char *prop = "device_type";
87 const char *prop_val = "pci-endpoint";
92 /* Search first PCIe node */
93 no = fdt_node_offset_by_compatible(blob, -1, compat);
94 while (no != -FDT_ERR_NOTFOUND) {
95 port = fdt_getprop(blob, no, "port", NULL);
97 printf("WARNING: could not find port property\n");
99 if (is_end_point(*port)) {
100 rc = fdt_setprop(blob, no, prop, prop_val,
101 strlen(prop_val) + 1);
103 printf("WARNING: could not set %s for %s: %s.\n",
104 prop, compat, fdt_strerror(rc));
108 /* Jump to next PCIe node */
109 no = fdt_node_offset_by_compatible(blob, no, compat);
113 void ft_cpu_setup(void *blob, bd_t *bd)
118 get_sys_info(&sys_info);
120 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency",
122 do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency",
124 do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1);
125 do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1);
127 if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0)
128 do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency",
129 sys_info.freqEBC, 1);
131 do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency",
132 sys_info.freqEBC, 1);
134 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
137 * Fixup all UART clocks for CPU internal UARTs
138 * (only these UARTs are definitely clocked by gd->uart_clk)
140 * These UARTs are direct childs of /plb/opb. This code
141 * does not touch any UARTs that are connected to the ebc.
143 off = fdt_path_offset(blob, "/plb/opb");
144 while ((off = fdt_next_node(blob, off, &ndepth)) >= 0) {
146 * process all sub nodes and stop when we are back
147 * at the starting depth
152 /* only update direct childs */
154 (fdt_node_check_compatible(blob, off, "ns16550") == 0))
155 fdt_setprop(blob, off,
157 (void*)&(gd->uart_clk), 4);
161 * Fixup all ethernet nodes
162 * Note: aliases in the dts are required for this
164 fdt_fixup_ethernet(blob);
167 * Fixup all available PCIe nodes by setting the device_type property
169 fdt_pcie_setup(blob);
171 #endif /* CONFIG_OF_LIBFDT && CONFIG_OF_BOARD_SETUP */