3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
39 * setup up stacks if necessary
42 DECLARE_GLOBAL_DATA_PTR;
44 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
45 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
50 int cleanup_before_linux (void)
53 * this function is called just before we call linux
54 * it prepares the processor for linux
56 * just disable everything that can disturb booting linux
61 disable_interrupts ();
63 /* turn off I-cache */
64 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
66 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
69 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
74 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
76 printf ("resetting ...\n");
78 udelay (50000); /* wait 50 ms */
79 disable_interrupts ();
87 void icache_enable (void)
91 /* read control register */
92 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
97 /* write back to control register */
98 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
101 void icache_disable (void)
105 /* read control register */
106 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
111 /* write back to control register */
112 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
115 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
118 int icache_status (void)
122 /* read control register */
123 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
129 /* we will never enable dcache, because we have to setup MMU first */
130 void dcache_enable (void)
135 void dcache_disable (void)
140 int dcache_status (void)
142 return 0; /* always off */