3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
10 * See file CREDITS for list of people who contributed to this
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 DECLARE_GLOBAL_DATA_PTR;
43 * setup up stacks if necessary
46 IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
47 FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
52 int cleanup_before_linux (void)
55 * this function is called just before we call linux
56 * it prepares the processor for linux
58 * just disable everything that can disturb booting linux
63 disable_interrupts ();
65 /* turn off I-cache */
66 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
68 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
71 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
76 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
78 printf ("resetting ...\n");
80 udelay (50000); /* wait 50 ms */
81 disable_interrupts ();
89 void icache_enable (void)
93 /* read control register */
94 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
99 /* write back to control register */
100 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
103 void icache_disable (void)
107 /* read control register */
108 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
113 /* write back to control register */
114 asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
117 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
120 int icache_status (void)
124 /* read control register */
125 asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
131 /* we will never enable dcache, because we have to setup MMU first */
132 void dcache_enable (void)
137 void dcache_disable (void)
142 int dcache_status (void)
144 return 0; /* always off */