2 * armboot - Startup Code for SA1100 CPU
4 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 *************************************************************************
36 * Jump vector table as in table 3.1 in [1]
38 *************************************************************************
44 ldr pc, _undefined_instruction
45 ldr pc, _software_interrupt
46 ldr pc, _prefetch_abort
52 _undefined_instruction: .word undefined_instruction
53 _software_interrupt: .word software_interrupt
54 _prefetch_abort: .word prefetch_abort
55 _data_abort: .word data_abort
56 _not_used: .word not_used
60 .balignl 16,0xdeadbeef
64 *************************************************************************
66 * Startup Code (reset vector)
68 * do important init only if we don't start from memory!
69 * relocate armboot to ram
71 * jump to second stage
73 *************************************************************************
77 * CFG_MEM_END is in the board dependent config-file (configs/config_BOARD.h)
87 * Note: _armboot_end_data and _armboot_end are defined
88 * by the (board-dependent) linker script.
89 * _armboot_end_data is the first usable FLASH address after armboot
91 .globl _armboot_end_data
93 .word armboot_end_data
99 * _armboot_real_end is the first usable RAM address behind armboot
100 * and the various stacks
102 .globl _armboot_real_end
106 #ifdef CONFIG_USE_IRQ
107 /* IRQ stack memory (calculated at run-time) */
108 .globl IRQ_STACK_START
112 /* IRQ stack memory (calculated at run-time) */
113 .globl FIQ_STACK_START
120 * the actual reset code
125 * set the cpu to SVC32 mode
133 * we do sys-critical inits only at reboot,
134 * not when booting from ram!
136 #ifdef CONFIG_INIT_CRITICAL
142 * relocate armboot to RAM
144 adr r0, _start /* r0 <- current position of code */
145 ldr r2, _armboot_start
147 sub r2, r3, r2 /* r2 <- size of armboot */
148 ldr r1, _TEXT_BASE /* r1 <- destination address */
149 add r2, r0, r2 /* r2 <- source end address */
152 * r0 = source address
153 * r1 = target address
154 * r2 = source end address
162 /* set up the stack */
164 add r0, r0, #CONFIG_STACKSIZE
165 sub sp, r0, #12 /* leave 3 words for abort-stack */
167 ldr pc, _start_armboot
169 _start_armboot: .word start_armboot
173 *************************************************************************
175 * CPU_init_critical registers
177 * setup important registers
178 * setup memory timing
180 *************************************************************************
184 /* Interupt-Controller base address */
185 IC_BASE: .word 0x90050000
189 /* Reset-Controller */
190 RST_BASE: .word 0x90030000
196 PWR_BASE: .word 0x90020000
199 cpuspeed: .word CFG_CPUSPEED
210 /* set clock speed */
216 * before relocating, we have to setup RAM timing
217 * because memory timing is board-dependend, you will
218 * find a memsetup.S in your board directory.
225 * disable MMU stuff and enable I-cache
228 bic r0, r0, #0x00002000 @ clear bit 13 (X)
229 bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
230 orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
231 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
235 * flush v4 I/D caches
238 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
239 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
245 *************************************************************************
249 *************************************************************************
255 #define S_FRAME_SIZE 72
277 #define MODE_SVC 0x13
281 * use bad_save_user_regs for abort/prefetch/undef/swi ...
282 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
285 .macro bad_save_user_regs
286 sub sp, sp, #S_FRAME_SIZE
287 stmia sp, {r0 - r12} @ Calling r0-r12
291 add r2, r2, #CONFIG_STACKSIZE
293 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
294 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
298 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
302 .macro irq_save_user_regs
303 sub sp, sp, #S_FRAME_SIZE
304 stmia sp, {r0 - r12} @ Calling r0-r12
306 stmdb r8, {sp, lr}^ @ Calling SP, LR
307 str lr, [r8, #0] @ Save calling PC
309 str r6, [r8, #4] @ Save CPSR
310 str r0, [r8, #8] @ Save OLD_R0
314 .macro irq_restore_user_regs
315 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
317 ldr lr, [sp, #S_PC] @ Get PC
318 add sp, sp, #S_FRAME_SIZE
319 subs pc, lr, #4 @ return & move spsr_svc into cpsr
323 ldr r13, _armboot_end @ setup our mode stack
324 add r13, r13, #CONFIG_STACKSIZE @ resides at top of normal stack
327 str lr, [r13] @ save caller lr / spsr
331 mov r13, #MODE_SVC @ prepare SVC-Mode
337 .macro get_irq_stack @ setup IRQ stack
338 ldr sp, IRQ_STACK_START
341 .macro get_fiq_stack @ setup FIQ stack
342 ldr sp, FIQ_STACK_START
349 undefined_instruction:
352 bl do_undefined_instruction
358 bl do_software_interrupt
378 #ifdef CONFIG_USE_IRQ
385 irq_restore_user_regs
390 /* someone ought to write a more effiction fiq_save_user_regs */
393 irq_restore_user_regs
415 mov r1, #0x0 @ set bit 3-0 ...
416 str r1, [r0, #RCSR] @ ... to clear in RCSR
418 str r1, [r0, #RSRR] @ and perform reset
419 b reset_cpu @ silly, but repeat endlessly