3 MPC8572DS is a high-performance computing, evaluation and development platform
4 supporting the mpc8572 PowerTM processor.
13 MPC8572DS board has two flash banks. They are both present on boot, but their
14 locations can be swapped using the dip-switch SW9[1:2].
16 Booting is always from the boot bank at 0xec00_0000.
22 0xe800_0000 - 0xebff_ffff Alernate bank 64MB
23 0xec00_0000 - 0xefff_ffff Boot bank 64MB
25 0xebf8_0000 - 0xebff_ffff Alternate u-boot address 512KB
26 0xeff8_0000 - 0xefff_ffff Boot u-boot address 512KB
32 To place a new u-boot image in the alternate flash bank and then reset with that
33 new image temporarily, use this:
35 tftp 1000000 u-boot.bin
36 erase ebf80000 ebffffff
37 cp.b 1000000 ebf80000 80000
41 To program the image in the boot flash bank:
43 tftp 1000000 u-boot.bin
45 erase eff80000 ffffffff
46 cp.b 1000000 eff80000 80000
49 The pixis_reset command
50 -----------------------
51 The command - "pixis_reset", is introduced to reset mpc8572ds board
52 using the FPGA sequencer. When the board restarts, it has the option
53 of using either the current or alternate flash bank as the boot
54 image, with or without the watchdog timer enabled, and finally with
55 or without frequency changes.
61 pixis_reset altbank wd
62 pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
63 pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
67 /* reset to current bank, like "reset" command */
70 /* reset board but use the to alternate flash bank */
74 Using the Device Tree Source File
75 ---------------------------------
76 To create the DTB (Device Tree Binary) image file,
77 use a command similar to this:
79 dtc -b 0 -f -I dts -O dtb mpc8572ds.dts > mpc8572ds.dtb
81 Likely, that .dts file will come from here;
83 linux-2.6/arch/powerpc/boot/dts/mpc8572ds.dts
89 Place a linux uImage in the TFTP disk area.
91 tftp 1000000 uImage.8572
92 tftp c00000 mpc8572ds.dtb
93 bootm 1000000 - c00000
96 Implementing AMP(Asymmetric MultiProcessing)
98 1. Build kernel image for core0:
100 a. $ make 85xx/mpc8572_ds_defconfig
103 - un-select "Processor support"->"Symetric multi-processing support"
107 d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core0
109 2. Build kernel image for core1:
111 a. $ make 85xx/mpc8572_ds_defconfig
114 - Un-select "Processor support"->"Symetric multi-processing support"
115 - Select "Advanced setup" -> " Prompt for advanced kernel
116 configuration options"
117 - Select "Set physical address where the kernel is loaded" and
118 set it to 0x20000000, asssuming core1 will start from 512MB.
119 - Select "Set custom page offset address"
120 - Select "Set custom kernel base address"
121 - Select "Set maximum low memory"
122 - "Exit" and save the selection.
126 d. $ cp arch/powerpc/boot/uImage /tftpboot/uImage.core1
128 3. Create dtb for core0:
130 $ dtc -I dts -O dtb -f -b 0 arch/powerpc/boot/dts/mpc8572ds_core0.dts > /tftpboot/mpc8572ds_core0.dtb
132 4. Create dtb for core1:
134 $ dtc -I dts -O dtb -f -b 1 arch/powerpc/boot/dts/mpc8572ds_core1.dts > /tftpboot/mpc8572ds_core1.dtb
136 5. Bring up two cores separately:
138 a. Power on the board, under u-boot prompt:
141 => setenv bootargs root=/dev/ram rw console=ttyS0,115200
142 b. Bring up core1's kernel first:
143 => setenv bootm_low 0x20000000
144 => setenv bootm_size 0x10000000
145 => tftp 21000000 8572/uImage.core1
146 => tftp 22000000 8572/ramdiskfile
147 => tftp 20c00000 8572/mpc8572ds_core1.dtb
149 => bootm start 21000000 22000000 20c00000
154 => fdt chosen $initrd_start $initrd_end
156 => cpu 1 release $bootm_low - $fdtaddr -
157 c. Bring up core0's kernel(on the same u-boot console):
158 => setenv bootm_low 0
159 => setenv bootm_size 0x20000000
160 => tftp 1000000 8572/uImage.core0
161 => tftp 2000000 8572/ramdiskfile
162 => tftp c00000 8572/mpc8572ds_core0.dtb
163 => bootm 1000000 2000000 c00000
165 Please note only core0 will run u-boot, core1 starts kernel directly after
166 "cpu release" command is issued.