6 The mvSMR is a 75x130mm single image processing board used
7 in automation. Power Supply is 24VDC.
12 Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
14 8 MByte Nor Flash on local bus.
15 2 serial ports. Console running on ttyS0 @ 115200 8N1.
18 PCI clock fixed at 33MHz due to old'n'slow Xilinx PCI core.
21 Xilinx Spartan-3 XC3S200 with PCI DMA engine.
22 Connects to Matrix Vision specific CCD/CMOS sensor interface.
25 EEPROM @ 0xA0 for vendor specifics.
26 image sensor interface (slave adresses depend on sensor)
30 reset vector is 0x00000100, i.e. "LOWBOOT".
33 FF806000 u-boot script image
34 FF808000 u-boot environment
35 FF840000 FPGA raw bit file
41 On startup the bootscript @ FF806000 is executed. This script can be
42 exchanged easily. Default boot mode is "boot from flash", i.e. system
45 This behaviour depends on some environment variables :
47 "netboot" : yes ->try dhcp/bootp and boot from network.
48 A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
49 DHCP server configuration, e.g. to provide different images to
52 During netboot the system tries to get 3 image files:
53 1. Kernel - name + data is given during BOOTP.
54 2. Initrd - name is stored in "initrd_name"
55 Fallback files are the flash versions.