1 \input texinfo @c -*-texinfo-*-
3 @setfilename openocd.info
4 @settitle Open On-Chip Debugger (OpenOCD)
5 @dircategory Development
8 * OpenOCD: (openocd). Open On-Chip Debugger.
17 @item Copyright @copyright{} 2008 The OpenOCD Project
18 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
19 @item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
20 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
24 Permission is granted to copy, distribute and/or modify this document
25 under the terms of the GNU Free Documentation License, Version 1.2 or
26 any later version published by the Free Software Foundation; with no
27 Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
28 Texts. A copy of the license is included in the section entitled ``GNU
29 Free Documentation License''.
34 @title Open On-Chip Debugger (OpenOCD)
35 @subtitle Edition @value{EDITION} for OpenOCD version @value{VERSION}
36 @subtitle @value{UPDATED}
38 @vskip 0pt plus 1filll
45 @node Top, About, , (dir)
48 This manual documents edition @value{EDITION} of the Open On-Chip Debugger
49 (OpenOCD) version @value{VERSION}, @value{UPDATED}.
54 * About:: About OpenOCD.
55 * Developers:: OpenOCD developers
56 * Building:: Building OpenOCD
57 * JTAG Hardware Dongles:: JTAG Hardware Dongles
58 * Running:: Running OpenOCD
59 * Simple Configuration Files:: Simple Configuration Files
60 * Config File Guidelines:: Config File Guidelines
61 * About JIM-Tcl:: About JIM-Tcl
62 * Daemon Configuration:: Daemon Configuration
63 * Interface - Dongle Configuration:: Interface - Dongle Configuration
64 * Reset Configuration:: Reset Configuration
65 * Tap Creation:: Tap Creation
66 * Target Configuration:: Target Configuration
67 * Flash Configuration:: Flash Configuration
68 * General Commands:: General Commands
69 * JTAG Commands:: JTAG Commands
70 * Sample Scripts:: Sample Target Scripts
72 * GDB and OpenOCD:: Using GDB and OpenOCD
73 * TCL scripting API:: Tcl scripting API
74 * Upgrading:: Deprecated/Removed Commands
75 * Target library:: Target library
76 * FAQ:: Frequently Asked Questions
77 * TCL Crash Course:: TCL Crash Course
78 * License:: GNU Free Documentation License
79 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
80 @comment case issue with ``Index.html'' and ``index.html''
81 @comment Occurs when creating ``--html --no-split'' output
82 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
83 * OpenOCD Index:: Main index.
90 The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
91 in-system programming and boundary-scan testing for embedded target
94 @b{JTAG:} OpenOCD uses a ``hardware interface dongle'' to communicate
95 with the JTAG (IEEE 1149.1) complient taps on your target board.
97 @b{Dongles:} OpenOCD currently many types of hardware dongles: USB
98 Based, Parallel Port Based, and other standalone boxes that run
99 OpenOCD internally. See the section titled: @xref{JTAG Hardware Dongles}.
101 @b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920t,
102 ARM922t, ARM926ej--s, ARM966e--s), XScale (PXA25x, IXP42x) and
103 Cortex-M3 (Luminary Stellaris LM3 and ST STM32) based cores to be
104 debugged via the GDB Protocol.
106 @b{Flash Programing:} Flash writing is supported for external CFI
107 compatible flashes (Intel and AMD/Spansion command set) and several
108 internal flashes (LPC2000, AT91SAM7, STR7x, STR9x, LM3 and
109 STM32x). Preliminary support for using the LPC3180's NAND flash
110 controller is included.
116 OpenOCD was created by Dominic Rath as part of a diploma thesis written at the
117 University of Applied Sciences Augsburg (@uref{http://www.fh-augsburg.de}).
118 Others interested in improving the state of free and open debug and testing technology
119 are welcome to participate.
121 Other developers have contributed support for additional targets and flashes as well
122 as numerous bugfixes and enhancements. See the AUTHORS file for regular contributors.
124 The main OpenOCD web site is available at @uref{http://openocd.berlios.de/web/}
128 @cindex building OpenOCD
130 @section Pre-Built Tools
131 If you are interested in getting actual work done rather than building
132 OpenOCD, then check if your interface supplier provides binaries for
133 you. Chances are that that binary is from some SVN version that is more
134 stable than SVN trunk where bleeding edge development takes place.
136 @section Building From Source
138 You can download the current SVN version with SVN client of your choice from the
139 following repositories:
141 (@uref{svn://svn.berlios.de/openocd/trunk})
145 (@uref{http://svn.berlios.de/svnroot/repos/openocd/trunk})
147 Using the SVN command line client, you can use the following command to fetch the
148 latest version (make sure there is no (non-svn) directory called "openocd" in the
152 svn checkout svn://svn.berlios.de/openocd/trunk openocd
155 Building OpenOCD requires a recent version of the GNU autotools.
156 On my build system, I'm using autoconf 2.13 and automake 1.9. For building on Windows,
157 you have to use Cygwin. Make sure that your @env{PATH} environment variable contains no
158 other locations with Unix utils (like UnxUtils) - these can't handle the Cygwin
159 paths, resulting in obscure dependency errors (This is an observation I've gathered
160 from the logs of one user - correct me if I'm wrong).
162 You further need the appropriate driver files, if you want to build support for
163 a FTDI FT2232 based interface:
165 @item @b{ftdi2232} libftdi (@uref{http://www.intra2net.com/opensource/ftdi/})
166 @item @b{ftd2xx} libftd2xx (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
167 @item When using the Amontec JTAGkey, you have to get the drivers from the Amontec
168 homepage (@uref{www.amontec.com}), as the JTAGkey uses a non-standard VID/PID.
171 libftdi is supported under windows. Do not use versions earlier then 0.14.
173 In general, the D2XX driver provides superior performance (several times as fast),
174 but has the draw-back of being binary-only - though that isn't that bad, as it isn't
175 a kernel module, only a user space library.
177 To build OpenOCD (on both Linux and Cygwin), use the following commands:
181 Bootstrap generates the configure script, and prepares building on your system.
183 ./configure [options, see below]
185 Configure generates the Makefiles used to build OpenOCD.
190 Make builds OpenOCD, and places the final executable in ./src/, the last step, ``make install'' is optional.
192 The configure script takes several options, specifying which JTAG interfaces
197 @option{--enable-parport} - Bit bang pc printer ports.
199 @option{--enable-parport_ppdev} - Parallel Port [see below]
201 @option{--enable-parport_giveio} - Parallel Port [see below]
203 @option{--enable-amtjtagaccel} - Parallel Port [Amontec, see below]
205 @option{--enable-ft2232_ftd2xx} - Numerous USB Type ARM JTAG dongles use the FT2232C chip from this FTDICHIP.COM chip (closed source).
207 @option{--enable-ft2232_libftdi} - An open source (free) alternate to FTDICHIP.COM ftd2xx solution (Linux, MacOS, Cygwin)
209 @option{--with-ftd2xx-win32-zipdir=PATH} - If using FTDICHIP.COM ft2232c, point at the directory where the Win32 FTDICHIP.COM 'CDM' driver zip file was unpacked.
211 @option{--with-ftd2xx-linux-tardir=PATH} - Linux only equal of @option{--with-ftd2xx-win32-zipdir}, where you unpacked the TAR.GZ file.
213 @option{--with-ftd2xx-lib=shared|static} - Linux only. Default: static, specifies how the FTDICHIP.COM libftd2xx driver should be linked. Note 'static' only works in conjunction with @option{--with-ftd2xx-linux-tardir}. Shared is supported (12/26/2008), however you must manually install the required header files and shared libraries in an appropriate place. This uses ``libusb'' internally.
215 @option{--enable-gw16012}
217 @option{--enable-usbprog}
219 @option{--enable-presto_libftdi}
221 @option{--enable-presto_ftd2xx}
223 @option{--enable-jlink} - From SEGGER
225 @option{--enable-rlink} - Raisonance.com dongle.
228 @section Parallel Port Dongles
230 If you want to access the parallel port using the PPDEV interface you have to specify
231 both the @option{--enable-parport} AND the @option{--enable-parport_ppdev} option since
232 the @option{--enable-parport_ppdev} option actually is an option to the parport driver
233 (see @uref{http://forum.sparkfun.com/viewtopic.php?t=3795} for more info).
235 @section FT2232C Based USB Dongles
237 There are 2 methods of using the FTD2232, either (1) using the
238 FTDICHIP.COM closed source driver, or (2) the open (and free) driver
239 libftdi. Some claim the (closed) FTDICHIP.COM solution is faster.
241 The FTDICHIP drivers come as either a (win32) ZIP file, or a (linux)
242 TAR.GZ file. You must unpack them ``some where'' convient. As of this
243 writing (12/26/2008) FTDICHIP does not supply means to install these
244 files ``in an appropriate place'' As a result, there are two
245 ``./configure'' options that help.
247 Below is an example build process:
249 1) Check out the latest version of ``openocd'' from SVN.
251 2) Download & Unpack either the Windows or Linux FTD2xx Drivers
252 (@uref{http://www.ftdichip.com/Drivers/D2XX.htm})
255 /home/duane/ftd2xx.win32 => the Cygwin/Win32 ZIP file contents.
256 /home/duane/libftd2xx0.4.16 => the Linux TAR file contents.
259 3) Configure with these options:
262 Cygwin FTCICHIP solution
263 ./configure --prefix=/home/duane/mytools \
264 --enable-ft2232_ftd2xx \
265 --with-ftd2xx-win32-zipdir=/home/duane/ftd2xx.win32
267 Linux FTDICHIP solution
268 ./configure --prefix=/home/duane/mytools \
269 --enable-ft2232_ftd2xx \
270 --with-ft2xx-linux-tardir=/home/duane/libftd2xx0.4.16
272 Cygwin/Linux LIBFTDI solution
274 1a) For Windows: The windows port of LIBUSB is in place.
275 1b) For Linux: libusb has been built and is inplace.
277 2) And libftdi has been built and installed
278 Note: libftdi - relies upon libusb.
280 ./configure --prefix=/home/duane/mytools \
281 --enable-ft2232_libftdi
285 4) Then just type ``make'', and perhaps ``make install''.
288 @section Miscellaneous configure options
292 @option{--enable-gccwarnings} - enable extra gcc warnings during build
295 @node JTAG Hardware Dongles
296 @chapter JTAG Hardware Dongles
305 Defined: @b{dongle}: A small device that plugins into a computer and serves as
306 an adapter .... [snip]
308 In the OpenOCD case, this generally refers to @b{a small adapater} one
309 attaches to your computer via USB or the Parallel Printer Port. The
310 execption being the Zylin ZY1000 which is a small box you attach via
314 @section Choosing a Dongle
316 There are three things you should keep in mind when choosing a dongle.
319 @item @b{Voltage} What voltage is your target? 1.8, 2.8, 3.3, or 5V? Does your dongle support it?
320 @item @b{Connection} Printer Ports - Does your computer have one?
321 @item @b{Connection} Is that long printer bit-bang cable practical?
322 @item @b{RTCK} Do you require RTCK? Also known as ``adaptive clocking''
325 @section Stand alone Systems
327 @b{ZY1000} See: @url{http://www.zylin.com/zy1000.html} Technically, not a
328 dongle, but a standalone box.
330 @section USB FT2232 Based
332 There are many USB jtag dongles on the market, many of them are based
333 on a chip from ``Future Technology Devices International'' (FTDI)
334 known as the FTDI FT2232.
336 See: @url{http://www.ftdichip.com} or @url{http://www.ftdichip.com/Products/FT2232H.htm}
338 As of 28/Nov/2008, the following are supported:
342 @* Link @url{http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html}
344 @* See: @url{http://www.amontec.com/jtagkey.shtml}
346 @* See: @url{http://www.oocdlink.com} By Joern Kaipf
348 @* See: @url{http://www.signalyzer.com}
349 @item @b{evb_lm3s811}
350 @* See: @url{http://www.luminarymicro.com} - The Luminary Micro Stellaris LM3S811 eval board has an FTD2232C chip built in.
351 @item @b{olimex-jtag}
352 @* See: @url{http://www.olimex.com}
354 @* See: @url{http://www.tincantools.com}
355 @item @b{turtelizer2}
356 @* See: @url{http://www.ethernut.de}, or @url{http://www.ethernut.de/en/hardware/turtelizer/index.html}
358 @* Link: @url{http://www.hitex.com/index.php?id=383}
360 @* Link @url{http://www.hitex.com/stm32-stick}
361 @item @b{axm0432_jtag}
362 @* Axiom AXM-0432 Link @url{http://www.axman.com}
365 @section USB JLINK based
366 There are several OEM versions of the Segger @b{JLINK} adapter. It is
367 an example of a micro controller based JTAG adapter, it uses an
368 AT91SAM764 internally.
371 @item @b{ATMEL SAMICE} Only works with ATMEL chips!
372 @* Link: @url{http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3892}
373 @item @b{SEGGER JLINK}
374 @* Link: @url{http://www.segger.com/jlink.html}
376 @* Link: @url{http://www.iar.com/website1/1.0.1.0/369/1/index.php}
379 @section USB RLINK based
380 Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer, permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for SWD and not JTAG, thus not supported.
383 @item @b{Raisonance RLink}
384 @* Link: @url{http://www.raisonance.com/products/RLink.php}
385 @item @b{STM32 Primer}
386 @* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
387 @item @b{STM32 Primer2}
388 @* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
394 @* Link: @url{http://www.embedded-projects.net/usbprog} - which uses an Atmel MEGA32 and a UBN9604
396 @item @b{USB - Presto}
397 @* Link: @url{http://tools.asix.net/prg_presto.htm}
400 @section IBM PC Parallel Printer Port Based
402 The two well known ``JTAG Parallel Ports'' cables are the Xilnx DLC5
403 and the MacGraigor Wiggler. There are many clones and variations of
408 @item @b{Wiggler} - There are many clones of this.
409 @* Link: @url{http://www.macraigor.com/wiggler.htm}
411 @item @b{DLC5} - From XILINX - There are many clones of this
412 @* Link: Search the web for: ``XILINX DLC5'' - it is no longer
413 produced, PDF schematics are easily found and it is easy to make.
415 @item @b{Amontec - JTAG Accelerator}
416 @* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
419 @* Link: @url{http://www.gateworks.com/products/avila_accessories/gw16042.php}
422 @* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
424 @item @b{Wiggler_ntrst_inverted}
425 @* Yet another variation - See the source code, src/jtag/parport.c
427 @item @b{old_amt_wiggler}
428 @* Unknown - probably not on the market today
431 @* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
434 @* Link: @url{http://www.amontec.com/chameleon.shtml}
440 @* ispDownload from Lattice Semiconductor @url{http://www.latticesemi.com/lit/docs/devtools/dlcable.pdf}
443 @* From ST Microsystems, link:
444 @url{http://www.st.com/stonline/products/literature/um/7889.pdf}
445 Title: FlashLINK JTAG programing cable for PSD and uPSD
453 @* An EP93xx based linux machine using the GPIO pins directly.
456 @* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
462 @cindex running OpenOCD
464 @cindex --debug_level
468 The @option{--help} option shows:
472 --help | -h display this help
473 --version | -v display OpenOCD version
474 --file | -f use configuration file <name>
475 --search | -s dir to search for config files and scripts
476 --debug | -d set debug level <0-3>
477 --log_output | -l redirect log output to file <name>
478 --command | -c run <command>
479 --pipe | -p use pipes when talking to gdb
482 By default OpenOCD reads the file configuration file ``openocd.cfg''
483 in the current directory. To specify a different (or multiple)
484 configuration file, you can use the ``-f'' option. For example:
487 openocd -f config1.cfg -f config2.cfg -f config3.cfg
490 Once started, OpenOCD runs as a daemon, waiting for connections from
491 clients (Telnet, GDB, Other).
493 If you are having problems, you can enable internal debug messages via
496 Also it is possible to interleave commands w/config scripts using the
497 @option{-c} command line switch.
499 To enable debug output (when reporting problems or working on OpenOCD
500 itself), use the @option{-d} command line switch. This sets the
501 @option{debug_level} to "3", outputting the most information,
502 including debug messages. The default setting is "2", outputting only
503 informational messages, warnings and errors. You can also change this
504 setting from within a telnet or gdb session using @option{debug_level
505 <n>} @xref{debug_level}.
507 You can redirect all output from the daemon to a file using the
508 @option{-l <logfile>} switch.
510 Search paths for config/script files can be added to OpenOCD by using
511 the @option{-s <search>} switch. The current directory and the OpenOCD
512 target library is in the search path by default.
514 For details on the @option{-p} option. @xref{Connecting to GDB}.
515 Option @option{-p} is not currently supported under native win32.
517 Note! OpenOCD will launch the GDB & telnet server even if it can not
518 establish a connection with the target. In general, it is possible for
519 the JTAG controller to be unresponsive until the target is set up
520 correctly via e.g. GDB monitor commands in a GDB init script.
522 @node Simple Configuration Files
523 @chapter Simple Configuration Files
524 @cindex configuration
527 There are 4 basic ways of ``configurating'' OpenOCD to run, they are:
530 @item A small openocd.cfg file which ``sources'' other configuration files
531 @item A monolithic openocd.cfg file
532 @item Many -f filename options on the command line
533 @item Your Mixed Solution
536 @section Small configuration file method
538 This is the prefered method, it is simple and is works well for many
539 people. The developers of OpenOCD would encourage you to use this
540 method. If you create a new configuration please email new
541 configurations to the development list.
543 Here is an example of an openocd.cfg file for an ATMEL at91sam7x256
546 source [find interface/signalyzer.cfg]
548 # Change the default telnet port...
552 # GDB can also flash my flash!
553 gdb_memory_map enable
554 gdb_flash_program enable
556 source [find target/sam7x256.cfg]
559 There are many example configuration scripts you can work with. You
560 should look in the directory: @t{$(INSTALLDIR)/lib/openocd}. You
564 @item @b{board} - eval board level configurations
565 @item @b{interface} - specific dongle configurations
566 @item @b{target} - the target chips
567 @item @b{tcl} - helper scripts
568 @item @b{xscale} - things specific to the xscale.
571 Look first in the ``boards'' area, then the ``targets'' area. Often a board
572 configuration is a good example to work from.
574 @section Many -f filename options
575 Some believe this is a wonderful solution, others find it painful.
577 You can use a series of ``-f filename'' options on the command line,
578 OpenOCD will read each filename in sequence, for example:
581 openocd -f file1.cfg -f file2.cfg -f file2.cfg
584 You can also intermix various commands with the ``-c'' command line
587 @section Monolithic file
588 The ``Monolithic File'' dispenses with all ``source'' statements and
589 puts everything in one self contained (monolithic) file. This is not
592 Please try to ``source'' various files or use the multiple -f
595 @section Advice for you
596 Often, one uses a ``mixed approach''. Where possible, please try to
597 ``source'' common things, and if needed cut/paste parts of the
598 standard distribution configuration files as needed.
600 @b{REMEMBER:} The ``important parts'' of your configuration file are:
603 @item @b{Interface} - Defines the dongle
604 @item @b{Taps} - Defines the JTAG Taps
605 @item @b{GDB Targets} - What GDB talks to
606 @item @b{Flash Programing} - Very Helpful
609 Some key things you should look at and understand are:
612 @item The RESET configuration of your debug environment as a hole
613 @item Is there a ``work area'' that OpenOCD can use?
614 @* For ARM - work areas mean up to 10x faster downloads.
615 @item For MMU/MPU based ARM chips (ie: ARM9 and later) will that work area still be available?
616 @item For complex targets (multiple chips) the JTAG SPEED becomes an issue.
621 @node Config File Guidelines
622 @chapter Config File Guidelines
624 This section/chapter is aimed at developers and integrators of
625 OpenOCD. These are guidelines for creating new boards and new target
626 configurations as of 28/Nov/2008.
628 However, you the user of OpenOCD should be some what familiar with
629 this section as it should help explain some of the internals of what
630 you might be looking at.
632 The user should find under @t{$(INSTALLDIR)/lib/openocd} the
633 following directories:
637 @*Think JTAG Dongle. Files that configure the jtag dongle go here.
639 @* Thing Circuit Board, PWA, PCB, they go by many names. Board files
640 contain initialization items that are specific to a board - for
641 example: The SDRAM initialization sequence for the board, or the type
642 of external flash and what address it is found at. Any initialization
643 sequence to enable that external flash or sdram should be found in the
644 board file. Boards may also contain multiple targets, ie: Two cpus, or
645 a CPU and an FPGA or CPLD.
647 @* Think CHIP. The ``target'' directory represents a jtag tap (or
648 chip) OpenOCD should control, not a board. Two common types of targets
649 are ARM chips and FPGA or CPLD chips.
652 @b{If needed...} The user in their ``openocd.cfg'' file or the board
653 file might override a specific feature in any of the above files by
654 setting a variable or two before sourcing the target file. Or adding
655 various commands specific to their situation.
657 @section Interface Config Files
659 The user should be able to source one of these files via a command like this:
662 source [find interface/FOOBAR.cfg]
664 openocd -f interface/FOOBAR.cfg
667 A preconfigured interface file should exist for every interface in use
668 today, that said, perhaps some interfaces have only been used by the
669 sole developer who created it.
671 @b{FIXME/NOTE:} We need to add support for a variable like TCL variable
672 tcl_platform(platform), it should be called jim_platform (because it
673 is jim, not real tcl) and it should contain 1 of 3 words: ``linux'',
674 ``cygwin'' or ``mingw''
676 Interface files should be found in @t{$(INSTALLDIR)/lib/openocd/interface}
678 @section Board Config Files
680 @b{Note: BOARD directory NEW as of 28/nov/2008}
682 The user should be able to source one of these files via a command like this:
685 source [find board/FOOBAR.cfg]
687 openocd -f board/FOOBAR.cfg
691 The board file should contain one or more @t{source [find
692 target/FOO.cfg]} statements along with any board specific things.
694 In summery the board files should contain (if present)
697 @item External flash configuration (ie: the flash on CS0)
698 @item SDRAM configuration (size, speed, etc)
699 @item Board specific IO configuration (ie: GPIO pins might disable a 2nd flash)
700 @item Multiple TARGET source statements
701 @item All things that are not ``inside a chip''
702 @item Things inside a chip go in a 'target' file
705 @section Target Config Files
707 The user should be able to source one of these files via a command like this:
710 source [find target/FOOBAR.cfg]
712 openocd -f target/FOOBAR.cfg
715 In summery the target files should contain
720 @item Reset Configuration
722 @item CPU/Chip/CPU-Core Specific features
726 @subsection Important variable names
728 By default, the end user should never need to set these
729 variables. However, if the user needs to override a setting they only
730 need to set the variable in a simple way.
734 @* This gives a name to the overall chip, and is used as part of the
735 tap identifier dotted name.
737 @* By default little - unless the chip or board is not normally used that way.
739 @* When OpenOCD examines the JTAG chain, it will attempt to identify
740 every chip. If the @t{-expected-id} is nonzero, OpenOCD attempts
741 to verify the tap id number verses configuration file and may issue an
742 error or warning like this. The hope is this will help pin point
743 problem OpenOCD configurations.
746 Info: JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
747 Error: ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
748 Error: ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
749 Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
752 @item @b{_TARGETNAME}
753 @* By convention, this variable is created by the target configuration
754 script. The board configuration file may make use of this variable to
755 configure things like a ``reset init'' script, or other things
756 specific to that board and that target.
758 If the chip has 2 targets, use the names @b{_TARGETNAME0},
759 @b{_TARGETNAME1}, ... etc.
761 @b{Remember:} The ``board file'' may include multiple targets.
763 At no time should the name ``target0'' (the default target name if
764 none was specified) be used. The name ``target0'' is a hard coded name
765 - the next target on the board will be some other number.
767 The user (or board file) should reasonably be able to:
770 source [find target/FOO.cfg]
771 $_TARGETNAME configure ... FOO specific parameters
773 source [find target/BAR.cfg]
774 $_TARGETNAME configure ... BAR specific parameters
779 @subsection TCL Variables Guide Line
780 The Full Tcl/Tk language supports ``namespaces'' - JIM-Tcl does not.
782 Thus the rule we follow in OpenOCD is this: Variables that begin with
783 a leading underscore are temporal in nature, and can be modified and
784 used at will within a ?TARGET? configuration file
786 @b{EXAMPLE:} The user should be able to do this:
790 # PXA270 #1 network side, big endian
791 # PXA270 #2 video side, little endian
795 source [find target/pxa270.cfg]
796 # variable: _TARGETNAME = network.cpu
797 # other commands can refer to the "network.cpu" tap.
798 $_TARGETNAME configure .... params for this cpu..
802 source [find target/pxa270.cfg]
803 # variable: _TARGETNAME = video.cpu
804 # other commands can refer to the "video.cpu" tap.
805 $_TARGETNAME configure .... params for this cpu..
809 source [find target/spartan3.cfg]
811 # Since $_TARGETNAME is temporal..
812 # these names still work!
813 network.cpu configure ... params
814 video.cpu configure ... params
818 @subsection Default Value Boiler Plate Code
820 All target configuration files should start with this (or a modified form)
824 if @{ [info exists CHIPNAME] @} @{
825 set _CHIPNAME $CHIPNAME
827 set _CHIPNAME sam7x256
830 if @{ [info exists ENDIAN] @} @{
836 if @{ [info exists CPUTAPID ] @} @{
837 set _CPUTAPID $CPUTAPID
839 set _CPUTAPID 0x3f0f0f0f
844 @subsection Creating Taps
845 After the ``defaults'' are choosen, [see above], the taps are created.
847 @b{SIMPLE example:} such as an Atmel AT91SAM7X256
851 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
852 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
857 This is an SNIP/example for an STR912 - which has 3 internal taps. Key features shown:
860 @item @b{Unform tap names} - See: Tap Naming Convention
861 @item @b{_TARGETNAME} is created at the end where used.
865 if @{ [info exists FLASHTAPID ] @} @{
866 set _FLASHTAPID $FLASHTAPID
868 set _FLASHTAPID 0x25966041
870 jtag newtap $_CHIPNAME flash -irlen 8 -ircapture 0x1 -irmask 0x1 -expected-id $_FLASHTAPID
872 if @{ [info exists CPUTAPID ] @} @{
873 set _CPUTAPID $CPUTAPID
875 set _CPUTAPID 0x25966041
877 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xf -irmask 0xe -expected-id $_CPUTAPID
880 if @{ [info exists BSTAPID ] @} @{
881 set _BSTAPID $BSTAPID
883 set _BSTAPID 0x1457f041
885 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID
887 set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
890 @b{Tap Naming Convention}
892 See the command ``jtag newtap'' for detail, but in breif the names you should use are:
900 @item @b{unknownN} - it happens :-(
903 @subsection Reset Configuration
905 Some chips have specific ways the TRST and SRST signals are
906 managed. If these are @b{CHIP SPECIFIC} they go here, if they are
907 @b{BOARD SPECIFIC} they go in the board file.
909 @subsection Work Areas
911 Work areas are small RAM areas used by OpenOCD to speed up downloads,
912 and to download small snippits of code to program flash chips.
914 If the chip includes an form of ``on-chip-ram'' - and many do - define
915 a reasonable work area and use the ``backup'' option.
917 @b{PROBLEMS:} On more complex chips, this ``work area'' may become
918 inaccessable if/when the application code enables or disables the MMU.
920 @subsection ARM Core Specific Hacks
922 If the chip has a DCC, enable it. If the chip is an arm9 with some
923 special high speed download - enable it.
925 If the chip has an ARM ``vector catch'' feature - by defeault enable
926 it for Undefined Instructions, Data Abort, and Prefetch Abort, if the
927 user is really writing a handler for those situations - they can
928 easily disable it. Experiance has shown the ``vector catch'' is
929 helpful - for common programing errors.
931 If present, the MMU, the MPU and the CACHE should be disabled.
933 @subsection Internal Flash Configuration
935 This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
937 @b{Never ever} in the ``target configuration file'' define any type of
938 flash that is external to the chip. (For example the BOOT flash on
939 Chip Select 0). The BOOT flash information goes in a board file - not
940 the TARGET (chip) file.
944 @item at91sam7x256 - has 256K flash YES enable it.
945 @item str912 - has flash internal YES enable it.
946 @item imx27 - uses boot flash on CS0 - it goes in the board file.
947 @item pxa270 - again - CS0 flash - it goes in the board file.
951 @chapter About JIM-Tcl
955 OpenOCD includes a small ``TCL Interpreter'' known as JIM-TCL. You can
956 learn more about JIM here: @url{http://jim.berlios.de}
959 @item @b{JIM vrs TCL}
960 @* JIM-TCL is a stripped down version of the well known Tcl language,
961 which can be found here: @url{http://www.tcl.tk}. JIM-Tcl has far
962 fewer features. JIM-Tcl is a single .C file and a single .H file and
963 impliments the basic TCL command set along. In contrast: Tcl 8.6 is a
964 4.2MEG zip file containing 1540 files.
966 @item @b{Missing Features}
967 @* Our practice has been: Add/clone the Real TCL feature if/when
968 needed. We welcome JIM Tcl improvements, not bloat.
971 @* OpenOCD configuration scripts are JIM Tcl Scripts. OpenOCD's
972 command interpretor today (28/nov/2008) is a mixture of (newer)
973 JIM-Tcl commands, and (older) the orginal command interpretor.
976 @* At the OpenOCD telnet command line (or via the GDB mon command) one
977 can type a Tcl for() loop, set variables, etc.
979 @item @b{Historical Note}
980 @* JIM-Tcl was introduced to OpenOCD in Spring 2008.
982 @item @b{Need a Crash Course In TCL?}
983 @* See: @xref{TCL Crash Course}.
987 @node Daemon Configuration
988 @chapter Daemon Configuration
989 The commands here are commonly found in the openocd.cfg file and are
990 used to specify what TCP/IP ports are used, and how GDB should be
994 This command terminates the configuration stage and
995 enters the normal command mode. This can be useful to add commands to
996 the startup scripts and commands such as resetting the target,
997 programming flash, etc. To reset the CPU upon startup, add "init" and
998 "reset" at the end of the config script or at the end of the OpenOCD
999 command line using the @option{-c} command line switch.
1001 If this command does not appear in any startup/configuration file
1002 OpenOCD executes the command for you after processing all
1003 configuration files and/or command line options.
1005 @b{NOTE:} This command normally occurs at or near the end of your
1006 openocd.cfg file to force OpenOCD to ``initialize'' and make the
1007 targets ready. For example: If your openocd.cfg file needs to
1008 read/write memory on your target - the init command must occur before
1009 the memory read/write commands.
1011 @section TCP/IP Ports
1013 @item @b{telnet_port} <@var{number}>
1015 @*Intended for a human. Port on which to listen for incoming telnet connections.
1017 @item @b{tcl_port} <@var{number}>
1019 @*Intended as a machine interface. Port on which to listen for
1020 incoming TCL syntax. This port is intended as a simplified RPC
1021 connection that can be used by clients to issue commands and get the
1022 output from the TCL engine.
1024 @item @b{gdb_port} <@var{number}>
1026 @*First port on which to listen for incoming GDB connections. The GDB port for the
1027 first target will be gdb_port, the second target will listen on gdb_port + 1, and so on.
1032 @item @b{gdb_breakpoint_override} <@var{hard|soft|disabled}>
1033 @cindex gdb_breakpoint_override
1034 @anchor{gdb_breakpoint_override}
1035 @*Force breakpoint type for gdb 'break' commands.
1036 The raison d'etre for this option is to support GDB GUI's without
1037 a hard/soft breakpoint concept where the default OpenOCD and
1038 GDB behaviour is not sufficient. Note that GDB will use hardware
1039 breakpoints if the memory map has been set up for flash regions.
1041 This option replaces older arm7_9 target commands that addressed
1044 @item @b{gdb_detach} <@var{resume|reset|halt|nothing}>
1046 @*Configures what OpenOCD will do when gdb detaches from the daeman.
1047 Default behaviour is <@var{resume}>
1049 @item @b{gdb_memory_map} <@var{enable|disable}>
1050 @cindex gdb_memory_map
1051 @*Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb when
1052 requested. gdb will then know when to set hardware breakpoints, and program flash
1053 using the gdb load command. @option{gdb_flash_program enable} will also need enabling
1054 for flash programming to work.
1055 Default behaviour is <@var{enable}>
1056 @xref{gdb_flash_program}.
1058 @item @b{gdb_flash_program} <@var{enable|disable}>
1059 @cindex gdb_flash_program
1060 @anchor{gdb_flash_program}
1061 @*Set to <@var{enable}> to cause OpenOCD to program the flash memory when a
1062 vFlash packet is received.
1063 Default behaviour is <@var{enable}>
1064 @comment END GDB Items
1067 @node Interface - Dongle Configuration
1068 @chapter Interface - Dongle Configuration
1069 Interface commands are normally found in an interface configuration
1070 file which is sourced by your openocd.cfg file. These commands tell
1071 OpenOCD what type of JTAG dongle you have and how to talk to it.
1072 @section Simple Complete Interface Examples
1073 @b{A Turtelizer FT2232 Based JTAG Dongle}
1077 ft2232_device_desc "Turtelizer JTAG/RS232 Adapter A"
1078 ft2232_layout turtelizer2
1079 ft2232_vid_pid 0x0403 0xbdc8
1086 @b{A Raisonance RLink}
1095 parport_cable wiggler
1098 @section Interface Conmmand
1100 The interface command tells OpenOCD what type of jtag dongle you are
1101 using. Depending upon the type of dongle, you may need to have one or
1102 more additional commands.
1106 @item @b{interface} <@var{name}>
1108 @*Use the interface driver <@var{name}> to connect to the
1109 target. Currently supported interfaces are
1114 @* PC parallel port bit-banging (Wigglers, PLD download cable, ...)
1116 @item @b{amt_jtagaccel}
1117 @* Amontec Chameleon in its JTAG Accelerator configuration connected to a PC's EPP
1121 @* FTDI FT2232 (USB) based devices using either the open-source libftdi or the binary only
1122 FTD2XX driver. The FTD2XX is superior in performance, but not available on every
1123 platform. The libftdi uses libusb, and should be portable to all systems that provide
1127 @*Cirrus Logic EP93xx based single-board computer bit-banging (in development)
1130 @* ASIX PRESTO USB JTAG programmer.
1133 @* usbprog is a freely programmable USB adapter.
1136 @* Gateworks GW16012 JTAG programmer.
1139 @* Segger jlink usb adapter
1142 @* Raisonance RLink usb adapter
1143 @comment - End parameters
1145 @comment - End Interface
1147 @subsection parport options
1150 @item @b{parport_port} <@var{number}>
1151 @cindex parport_port
1152 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of
1153 the @file{/dev/parport} device
1155 When using PPDEV to access the parallel port, use the number of the parallel port:
1156 @option{parport_port 0} (the default). If @option{parport_port 0x378} is specified
1157 you may encounter a problem.
1158 @item @b{parport_cable} <@var{name}>
1159 @cindex parport_cable
1160 @*The layout of the parallel port cable used to connect to the target.
1161 Currently supported cables are
1165 The original Wiggler layout, also supported by several clones, such
1166 as the Olimex ARM-JTAG
1169 Same as original wiggler except an led is fitted on D5.
1170 @item @b{wiggler_ntrst_inverted}
1171 @cindex wiggler_ntrst_inverted
1172 Same as original wiggler except TRST is inverted.
1173 @item @b{old_amt_wiggler}
1174 @cindex old_amt_wiggler
1175 The Wiggler configuration that comes with Amontec's Chameleon Programmer. The new
1176 version available from the website uses the original Wiggler layout ('@var{wiggler}')
1179 The Amontec Chameleon's CPLD when operated in configuration mode. This is only used to
1180 program the Chameleon itself, not a connected target.
1183 The Xilinx Parallel cable III.
1186 The parallel port adapter found on the 'Karo Triton 1 Development Board'.
1187 This is also the layout used by the HollyGates design
1188 (see @uref{http://www.lartmaker.nl/projects/jtag/}).
1191 The ST Parallel cable.
1194 Same as original wiggler except SRST and TRST connections reversed and
1195 TRST is also inverted.
1198 Altium Universal JTAG cable.
1200 @item @b{parport_write_on_exit} <@var{on}|@var{off}>
1201 @cindex parport_write_on_exit
1202 @*This will configure the parallel driver to write a known value to the parallel
1203 interface on exiting OpenOCD
1206 @subsection amt_jtagaccel options
1208 @item @b{parport_port} <@var{number}>
1209 @cindex parport_port
1210 @*Either the address of the I/O port (default: 0x378 for LPT1) or the number of the
1211 @file{/dev/parport} device
1213 @subsection ft2232 options
1216 @item @b{ft2232_device_desc} <@var{description}>
1217 @cindex ft2232_device_desc
1218 @*The USB device description of the FTDI FT2232 device. If not
1219 specified, the FTDI default value is used. This setting is only valid
1220 if compiled with FTD2XX support.
1222 @b{TODO:} Confirm the following: On windows the name needs to end with
1223 a ``space A''? Or not? It has to do with the FTD2xx driver. When must
1224 this be added and when must it not be added? Why can't the code in the
1225 interface or in OpenOCD automatically add this if needed? -- Duane.
1227 @item @b{ft2232_serial} <@var{serial-number}>
1228 @cindex ft2232_serial
1229 @*The serial number of the FTDI FT2232 device. If not specified, the FTDI default
1231 @item @b{ft2232_layout} <@var{name}>
1232 @cindex ft2232_layout
1233 @*The layout of the FT2232 GPIO signals used to control output-enables and reset
1234 signals. Valid layouts are
1237 "USBJTAG-1" layout described in the original OpenOCD diploma thesis
1239 Amontec JTAGkey and JTAGkey-tiny
1240 @item @b{signalyzer}
1242 @item @b{olimex-jtag}
1245 American Microsystems M5960
1246 @item @b{evb_lm3s811}
1247 Luminary Micro EVB_LM3S811 as a JTAG interface (not onboard processor), no TRST or
1248 SRST signals on external connector
1251 @item @b{stm32stick}
1252 Hitex STM32 Performance Stick
1253 @item @b{flyswatter}
1254 Tin Can Tools Flyswatter
1255 @item @b{turtelizer2}
1256 egnite Software turtelizer2
1259 @item @b{axm0432_jtag}
1263 @item @b{ft2232_vid_pid} <@var{vid}> <@var{pid}>
1264 @*The vendor ID and product ID of the FTDI FT2232 device. If not specified, the FTDI
1265 default values are used. Multiple <@var{vid}>, <@var{pid}> pairs may be given, eg.
1267 ft2232_vid_pid 0x0403 0xcff8 0x15ba 0x0003
1269 @item @b{ft2232_latency} <@var{ms}>
1270 @*On some systems using ft2232 based JTAG interfaces the FT_Read function call in
1271 ft2232_read() fails to return the expected number of bytes. This can be caused by
1272 USB communication delays and has proved hard to reproduce and debug. Setting the
1273 FT2232 latency timer to a larger value increases delays for short USB packages but it
1274 also reduces the risk of timeouts before receiving the expected number of bytes.
1275 The OpenOCD default value is 2 and for some systems a value of 10 has proved useful.
1278 @subsection ep93xx options
1279 @cindex ep93xx options
1280 Currently, there are no options available for the ep93xx interface.
1284 @item @b{jtag_khz} <@var{reset speed kHz}>
1287 It is debatable if this command belongs here - or in a board
1288 configuration file. In fact, in some situations the jtag speed is
1289 changed during the target initialization process (ie: (1) slow at
1290 reset, (2) program the cpu clocks, (3) run fast)
1292 Speed 0 (khz) selects RTCK method. A non-zero speed is in KHZ. Hence: 3000 is 3mhz.
1294 Not all interfaces support ``rtck''. If the interface device can not
1295 support the rate asked for, or can not translate from kHz to
1296 jtag_speed, then an error is returned.
1298 Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is
1299 especially true for synthesized cores (-S). Also see RTCK.
1301 @b{NOTE: Script writers} If the target chip requires/uses RTCK -
1302 please use the command: 'jtag_rclk FREQ'. This TCL proc (in
1303 startup.tcl) attempts to enable RTCK, if that fails it falls back to
1304 the specified frequency.
1307 # Fall back to 3mhz if RCLK is not supported
1311 @item @b{DEPRICATED} @b{jtag_speed} - please use jtag_khz above.
1313 @*Limit the maximum speed of the JTAG interface. Usually, a value of zero means maximum
1314 speed. The actual effect of this option depends on the JTAG interface used.
1316 The speed used during reset can be adjusted using setting jtag_speed during
1317 pre_reset and post_reset events.
1320 @item wiggler: maximum speed / @var{number}
1321 @item ft2232: 6MHz / (@var{number}+1)
1322 @item amt jtagaccel: 8 / 2**@var{number}
1323 @item jlink: maximum speed in kHz (0-12000), 0 will use RTCK
1324 @item rlink: 24MHz / @var{number}, but only for certain values of @var{number}
1325 @comment end speed list.
1328 @comment END command list
1331 @node Reset Configuration
1332 @chapter Reset Configuration
1333 @cindex reset configuration
1335 Every system configuration may require a different reset
1336 configuration. This can also be quite confusing. Please see the
1337 various board files for example.
1339 @section jtag_nsrst_delay <@var{ms}>
1340 @cindex jtag_nsrst_delay
1341 @*How long (in milliseconds) OpenOCD should wait after deasserting
1342 nSRST before starting new JTAG operations.
1344 @section jtag_ntrst_delay <@var{ms}>
1345 @cindex jtag_ntrst_delay
1346 @*Same @b{jtag_nsrst_delay}, but for nTRST
1348 The jtag_n[st]rst_delay options are useful if reset circuitry (like a
1349 big resistor/capacitor, reset supervisor, or on-chip features). This
1350 keeps the signal asserted for some time after the external reset got
1353 @section reset_config
1355 @b{Note:} To maintainer types and integrators. Where exactly the
1356 ``reset configuration'' goes is a good question. It touches several
1357 things at once. In the end, if you have a board file - the board file
1358 should define it and assume 100% that the DONGLE supports
1359 anything. However, that does not mean the target should not also make
1360 not of something the silicon vendor has done inside the
1361 chip. @i{Grr.... nothing is every pretty.}
1365 @item Every JTAG Dongle is slightly different, some dongles impliment reset differently.
1366 @item Every board is also slightly different; some boards tie TRST and SRST together.
1367 @item Every chip is slightly different; some chips internally tie the two signals together.
1368 @item Some may not impliment all of the signals the same way.
1369 @item Some signals might be push-pull, others open-drain/collector.
1371 @b{Best Case:} OpenOCD can hold the SRST (push-button-reset), then
1372 reset the TAP via TRST and send commands through the JTAG tap to halt
1373 the CPU at the reset vector before the 1st instruction is executed,
1374 and finally release the SRST signal.
1375 @*Depending upon your board vendor, your chip vendor, etc, these
1376 signals may have slightly different names.
1378 OpenOCD defines these signals in these terms:
1380 @item @b{TRST} - is Tap Reset - and should reset only the TAP.
1381 @item @b{SRST} - is System Reset - typically equal to a reset push button.
1387 @item @b{reset_config} <@var{signals}> [@var{combination}] [@var{trst_type}] [@var{srst_type}]
1388 @cindex reset_config
1389 @* The @t{reset_config} command tells OpenOCD the reset configuration
1390 of your combination of Dongle, Board, and Chips.
1391 If the JTAG interface provides SRST, but the target doesn't connect
1392 that signal properly, then OpenOCD can't use it. <@var{signals}> can
1393 be @option{none}, @option{trst_only}, @option{srst_only} or
1394 @option{trst_and_srst}.
1396 [@var{combination}] is an optional value specifying broken reset
1397 signal implementations. @option{srst_pulls_trst} states that the
1398 testlogic is reset together with the reset of the system (e.g. Philips
1399 LPC2000, "broken" board layout), @option{trst_pulls_srst} says that
1400 the system is reset together with the test logic (only hypothetical, I
1401 haven't seen hardware with such a bug, and can be worked around).
1402 @option{combined} imples both @option{srst_pulls_trst} and
1403 @option{trst_pulls_srst}. The default behaviour if no option given is
1406 The [@var{trst_type}] and [@var{srst_type}] parameters allow the
1407 driver type of the reset lines to be specified. Possible values are
1408 @option{trst_push_pull} (default) and @option{trst_open_drain} for the
1409 test reset signal, and @option{srst_open_drain} (default) and
1410 @option{srst_push_pull} for the system reset. These values only affect
1411 JTAG interfaces with support for different drivers, like the Amontec
1412 JTAGkey and JTAGAccelerator.
1414 @comment - end command
1420 @chapter Tap Creation
1421 @cindex tap creation
1422 @cindex tap configuration
1424 In order for OpenOCD to control a target, a JTAG tap must be
1427 Commands to create taps are normally found in a configuration file and
1428 are not normally typed by a human.
1430 When a tap is created a @b{dotted.name} is created for the tap. Other
1431 commands use that dotted.name to manipulate or refer to the tap.
1435 @item @b{Debug Target} A tap can be used by a GDB debug target
1436 @item @b{Flash Programing} Some chips program the flash via JTAG
1437 @item @b{Boundry Scan} Some chips support boundry scan.
1441 @section jtag newtap
1442 @b{@t{jtag newtap CHIPNAME TAPNAME configparams ....}}
1447 @cindex tap geometry
1449 @comment START options
1452 @* is a symbolic name of the chip.
1454 @* is a symbol name of a tap present on the chip.
1455 @item @b{Required configparams}
1456 @* Every tap has 3 required configparams, and several ``optional
1457 parameters'', the required parameters are:
1458 @comment START REQUIRED
1460 @item @b{-irlen NUMBER} - the length in bits of the instruction register
1461 @item @b{-ircapture NUMBER} - the ID code capture command.
1462 @item @b{-irmask NUMBER} - the corresponding mask for the ir register.
1463 @comment END REQUIRED
1465 An example of a FOOBAR Tap
1467 jtag newtap foobar tap -irlen 7 -ircapture 0x42 -irmask 0x55
1469 Creates the tap ``foobar.tap'' with the instruction register (IR) is 7
1470 bits long, during Capture-IR 0x42 is loaded into the IR, and bits
1471 [6,4,2,0] are checked.
1473 FIXME: The IDCODE - this was not used in the old code, it should be?
1475 @item @b{Optional configparams}
1476 @comment START Optional
1478 @item @b{-expected-id NUMBER}
1479 @* By default it is zero. If non-zero represents the
1480 expected tap ID used when the Jtag Chain is examined. See below.
1483 @* By default not specified the tap is enabled. Some chips have a
1484 jtag route controller (JRC) that is used to enable and/or disable
1485 specific jtag taps. You can later enable or disable any JTAG tap via
1486 the command @b{jtag tapenable DOTTED.NAME} or @b{jtag tapdisable
1488 @comment END Optional
1491 @comment END OPTIONS
1494 @comment START NOTES
1496 @item @b{Technically}
1497 @* newtap is a sub command of the ``jtag'' command
1498 @item @b{Big Picture Background}
1499 @*GDB Talks to OpenOCD using the GDB protocol via
1500 tcpip. OpenOCD then uses the JTAG interface (the dongle) to
1501 control the JTAG chain on your board. Your board has one or more chips
1502 in a @i{daisy chain configuration}. Each chip may have one or more
1503 jtag taps. GDB ends up talking via OpenOCD to one of the taps.
1504 @item @b{NAME Rules}
1505 @*Names follow ``C'' symbol name rules (start with alpha ...)
1506 @item @b{TAPNAME - Conventions}
1508 @item @b{tap} - should be used only FPGA or CPLD like devices with a single tap.
1509 @item @b{cpu} - the main cpu of the chip, alternatively @b{foo.arm} and @b{foo.dsp}
1510 @item @b{flash} - if the chip has a flash tap, example: str912.flash
1511 @item @b{bs} - for boundary scan if this is a seperate tap.
1512 @item @b{jrc} - for jtag route controller (example: OMAP3530 found on Beagleboards)
1513 @item @b{unknownN} - where N is a number if you have no idea what the tap is for
1514 @item @b{Other names} - Freescale IMX31 has a SDMA (smart dma) with a JTAG tap, that tap should be called the ``sdma'' tap.
1515 @item @b{When in doubt} - use the chip makers name in their data sheet.
1517 @item @b{DOTTED.NAME}
1518 @* @b{CHIPNAME}.@b{TAPNAME} creates the tap name, aka: the
1519 @b{Dotted.Name} is the @b{CHIPNAME} and @b{TAPNAME} combined with a
1520 dot (period); for example: @b{xilinx.tap}, @b{str912.flash},
1521 @b{omap3530.jrc}, or @b{stm32.cpu} The @b{dotted.name} is used in
1522 numerous other places to refer to various taps.
1524 @* The order this command appears via the config files is
1526 @item @b{Multi Tap Example}
1527 @* This example is based on the ST Microsystems STR912. See the ST
1528 document titled: @b{STR91xFAxxx, Section 3.15 Jtag Interface, Page:
1529 28/102, Figure 3: Jtag chaining inside the STR91xFA}.
1531 @url{http://eu.st.com/stonline/products/literature/ds/13495.pdf}
1532 @*@b{checked: 28/nov/2008}
1534 The diagram shows the TDO pin connects to the flash tap, flash TDI
1535 connects to the CPU debug tap, CPU TDI connects to the boundary scan
1536 tap which then connects to the TDI pin.
1540 # create tap: 'str912.flash'
1541 jtag newtap str912 flash ... params ...
1542 # create tap: 'str912.cpu'
1543 jtag newtap str912 cpu ... params ...
1544 # create tap: 'str912.bs'
1545 jtag newtap str912 bs ... params ...
1548 @item @b{Note: Deprecated} - Index Numbers
1549 @* Prior to 28/nov/2008, JTAG taps where numbered from 0..N this
1550 feature is still present, however its use is highly discouraged and
1551 should not be counted upon.
1552 @item @b{Multiple chips}
1553 @* If your board has multiple chips, you should be
1554 able to @b{source} two configuration files, in the proper order, and
1555 have the taps created in the proper order.
1558 @comment at command level
1559 @comment DOCUMENT old command
1560 @section jtag_device - REMOVED
1562 @b{jtag_device} <@var{IR length}> <@var{IR capture}> <@var{IR mask}> <@var{IDCODE instruction}>
1566 @* @b{Removed: 28/nov/2008} This command has been removed and replaced
1567 by the ``jtag newtap'' command. The documentation remains here so that
1568 one can easily convert the old syntax to the new syntax. About the old
1569 syntax: The old syntax is positional, ie: The 4th parameter is the
1570 ``irmask''. The new syntax requires named prefixes, and supports
1571 additional options, for example ``-irmask 4''. Please refer to the
1572 @b{jtag newtap} command for details.
1574 OLD: jtag_device 8 0x01 0x0e3 0xfe
1575 NEW: jtag newtap CHIPNAME TAPNAME -irlen 8 -ircapture 0xe3 -irmask 0xfe
1578 @section Enable/Disable Taps
1579 @b{Note:} These commands are intended to be used as a machine/script
1580 interface. Humans might find the ``scan_chain'' command more helpful
1581 when querying the state of the JTAG taps.
1583 @b{By default, all taps are enabled}
1586 @item @b{jtag tapenable} @var{DOTTED.NAME}
1587 @item @b{jtag tapdisable} @var{DOTTED.NAME}
1588 @item @b{jtag tapisenabled} @var{DOTTED.NAME}
1593 @cindex route controller
1595 These commands are used when your target has a JTAG Route controller
1596 that effectively adds or removes a tap from the jtag chain in a
1599 The ``standard way'' to remove a tap would be to place the tap in
1600 bypass mode. But with the advent of modern chips, this is not always a
1601 good solution. Some taps operate slowly, others operate fast, and
1602 there are other JTAG clock syncronization problems one must face. To
1603 solve that problem, the JTAG Route controller was introduced. Rather
1604 then ``bypass'' the tap, the tap is completely removed from the
1605 circuit and skipped.
1608 From OpenOCD's view point, a JTAG TAP is in one of 3 states:
1611 @item @b{Enabled - Not In ByPass} and has a variable bit length
1612 @item @b{Enabled - In ByPass} and has a length of exactly 1 bit.
1613 @item @b{Disabled} and has a length of ZERO and is removed from the circuit.
1616 The IEEE JTAG definition has no concept of a ``disabled'' tap.
1617 @b{Historical note:} this feature was added 28/nov/2008
1619 @b{jtag tapisenabled DOTTED.NAME}
1621 This command returns 1 if the named tap is currently enabled, 0 if not.
1622 This command exists so that scripts that manipulate a JRC (like the
1623 Omap3530 has) can determine if OpenOCD thinks a tap is presently
1624 enabled, or disabled.
1627 @node Target Configuration
1628 @chapter Target Configuration
1630 This chapter discusses how to create a GDB Debug Target. Before
1631 creating a ``target'' a JTAG Tap DOTTED.NAME must exist first.
1633 @section targets [NAME]
1634 @b{Note:} This command name is PLURAL - not singular.
1636 With NO parameter, this plural @b{targets} command lists all known
1637 targets in a human friendly form.
1639 With a parameter, this pural @b{targets} command sets the current
1640 target to the given name. (ie: If there are multiple debug targets)
1645 CmdName Type Endian ChainPos State
1646 -- ---------- ---------- ---------- -------- ----------
1647 0: target0 arm7tdmi little 0 halted
1650 @section target COMMANDS
1651 @b{Note:} This command name is SINGULAR - not plural. It is used to
1652 manipulate specific targets, to create targets and other things.
1654 Once a target is created, a TARGETNAME (object) command is created;
1655 see below for details.
1657 The TARGET command accepts these sub-commands:
1659 @item @b{create} .. parameters ..
1660 @* creates a new target, See below for details.
1662 @* Lists all supported target types (perhaps some are not yet in this document).
1664 @* Lists all current debug target names, for example: 'str912.cpu' or 'pxa27.cpu' example usage:
1666 foreach t [target names] {
1667 puts [format "Target: %s\n" $t]
1671 @* Returns the current target. OpenOCD always has, or refers to the ``current target'' in some way.
1672 By default, commands like: ``mww'' (used to write memory) operate on the current target.
1673 @item @b{number} @b{NUMBER}
1674 @* Internally OpenOCD maintains a list of targets - in numerical index
1675 (0..N-1) this command returns the name of the target at index N.
1678 set thename [target number $x]
1679 puts [format "Target %d is: %s\n" $x $thename]
1682 @* Returns the number of targets known to OpenOCD (see number above)
1685 set c [target count]
1686 for { set x 0 } { $x < $c } { incr x } {
1687 # Assuming you have created this function
1688 print_target_details $x
1694 @section TARGETNAME (object) commands
1695 @b{Use:} Once a target is created, an ``object name'' that represents the
1696 target is created. By convention, the target name is identical to the
1697 tap name. In a multiple target system, one can preceed many common
1698 commands with a specific target name and effect only that target.
1700 str912.cpu mww 0x1234 0x42
1701 omap3530.cpu mww 0x5555 123
1704 @b{Model:} The Tcl/Tk language has the concept of object commands. A
1705 good example is a on screen button, once a button is created a button
1706 has a name (a path in TK terms) and that name is useable as a 1st
1707 class command. For example in TK, one can create a button and later
1708 configure it like this:
1712 button .foobar -background red -command @{ foo @}
1714 .foobar configure -foreground blue
1716 set x [.foobar cget -background]
1718 puts [format "The button is %s" $x]
1721 In OpenOCD's terms, the ``target'' is an object just like a Tcl/Tk
1722 button. Commands avaialble as a ``target object'' are:
1724 @comment START targetobj commands.
1726 @item @b{configure} - configure the target; see Target Config/Cget Options below
1727 @item @b{cget} - query the target configuration; see Target Config/Cget Options below
1728 @item @b{curstate} - current target state (running, halt, etc)
1730 @* Intended for a human to see/read the currently configure target events.
1731 @item @b{Various Memory Commands} See the ``mww'' command elsewhere.
1732 @comment start memory
1742 @item @b{Memory To Array, Array To Memory}
1743 @* These are aimed at a machine interface to memory
1745 @item @b{mem2array ARRAYNAME WIDTH ADDRESS COUNT}
1746 @item @b{array2mem ARRAYNAME WIDTH ADDRESS COUNT}
1748 @* @b{ARRAYNAME} is the name of an array variable
1749 @* @b{WIDTH} is 8/16/32 - indicating the memory access size
1750 @* @b{ADDRESS} is the target memory address
1751 @* @b{COUNT} is the number of elements to process
1753 @item @b{Used during ``reset''}
1754 @* These commands are used internally by the OpenOCD scripts to deal
1755 with odd reset situations and are not documented here.
1757 @item @b{arp_examine}
1761 @item @b{arp_waitstate}
1763 @item @b{invoke-event} @b{EVENT-NAME}
1764 @* Invokes the specific event manually for the target
1767 @section Target Events
1768 At various times, certain things can happen, or you want them to happen.
1772 @item What should happen when GDB connects? Should your target reset?
1773 @item When GDB tries to flash the target, do you need to enable the flash via a special command?
1774 @item During reset, do you need to write to certain memory location to reconfigure the SDRAM?
1777 All of the above items are handled by target events.
1779 To specify an event action, either during target creation, or later
1780 via ``$_TARGETNAME configure'' see this example.
1782 Syntactially, the option is: ``-event NAME BODY'' where NAME is a
1783 target event name, and BODY is a tcl procedure or string of commands
1786 The programmers model is the ``-command'' option used in Tcl/Tk
1787 buttons and events. Below are two identical examples, the first
1788 creates and invokes small procedure. The second inlines the procedure.
1791 proc my_attach_proc @{ @} @{
1795 mychip.cpu configure -event gdb-attach my_attach_proc
1796 mychip.cpu configure -event gdb-attach @{ puts "Reset..." ; reset halt @}
1799 @section Current Events
1800 The following events are available:
1802 @item @b{debug-halted}
1803 @* The target has halted for debug reasons (ie: breakpoint)
1804 @item @b{debug-resumed}
1805 @* The target has resumed (ie: gdb said run)
1806 @item @b{early-halted}
1807 @* Occurs early in the halt process
1808 @item @b{examine-end}
1809 @* Currently not used (goal: when JTAG examine completes)
1810 @item @b{examine-start}
1811 @* Currently not used (goal: when JTAG examine starts)
1812 @item @b{gdb-attach}
1813 @* When GDB connects
1814 @item @b{gdb-detach}
1815 @* When GDB disconnects
1817 @* When the taret has halted and GDB is not doing anything (see early halt)
1818 @item @b{gdb-flash-erase-start}
1819 @* Before the GDB flash process tries to erase the flash
1820 @item @b{gdb-flash-erase-end}
1821 @* After the GDB flash process has finished erasing the flash
1822 @item @b{gdb-flash-write-start}
1823 @* Before GDB writes to the flash
1824 @item @b{gdb-flash-write-end}
1825 @* After GDB writes to the flash
1827 @* Before the taret steps, gdb is trying to start/resume the tarfget
1829 @* The target has halted
1830 @item @b{old-gdb_program_config}
1831 @* DO NOT USE THIS: Used internally
1832 @item @b{old-pre_resume}
1833 @* DO NOT USE THIS: Used internally
1834 @item @b{reset-assert-pre}
1835 @* Before reset is asserted on the tap.
1836 @item @b{reset-assert-post}
1837 @* Reset is now asserted on the tap.
1838 @item @b{reset-deassert-pre}
1839 @* Reset is about to be released on the tap
1840 @item @b{reset-deassert-post}
1841 @* Reset has been released on the tap
1843 @* Currently not used.
1844 @item @b{reset-halt-post}
1845 @* Currently not usd
1846 @item @b{reset-halt-pre}
1847 @* Currently not used
1848 @item @b{reset-init}
1849 @* Currently not used
1850 @item @b{reset-start}
1851 @* Currently not used
1852 @item @b{reset-wait-pos}
1853 @* Currently not used
1854 @item @b{reset-wait-pre}
1855 @* Currently not used
1856 @item @b{resume-start}
1857 @* Before any target is resumed
1858 @item @b{resume-end}
1859 @* After all targets have resumed
1863 @* Target has resumed
1864 @item @b{tap-enable}
1865 @* Executed by @b{jtag tapenable DOTTED.NAME} command. Example:
1867 jtag configure DOTTED.NAME -event tap-enable @{
1872 @item @b{tap-disable}
1873 @*Executed by @b{jtag tapdisable DOTTED.NAME} command. Example:
1875 jtag configure DOTTED.NAME -event tap-disable @{
1876 puts "Disabling CPU"
1883 @section target create
1885 @cindex target creation
1888 @b{target} @b{create} <@var{NAME}> <@var{TYPE}> <@var{PARAMS ...}>
1890 @*This command creates a GDB debug target that refers to a specific JTAG tap.
1891 @comment START params
1894 @* Is the name of the debug target. By convention it should be the tap
1895 DOTTED.NAME, this name is also used to create the target object
1898 @* Specifies the target type, ie: arm7tdmi, or cortexM3. Currently supported targes are:
1899 @comment START types
1916 @*PARAMs are various target configure parameters, the following are mandatory
1918 @comment START mandatory
1920 @item @b{-endian big|little}
1921 @item @b{-chain-position DOTTED.NAME}
1922 @comment end MANDATORY
1927 @section Target Config/Cget Options
1928 These options can be specified when the target is created, or later
1929 via the configure option or to query the target via cget.
1931 @item @b{-type} - returns the target type
1932 @item @b{-event NAME BODY} see Target events
1933 @item @b{-work-area-virt [ADDRESS]} specify/set the work area
1934 @item @b{-work-area-phys [ADDRESS]} specify/set the work area
1935 @item @b{-work-area-size [ADDRESS]} specify/set the work area
1936 @item @b{-work-area-backup [0|1]} does the work area get backed up
1937 @item @b{-endian [big|little]}
1938 @item @b{-variant [NAME]} some chips have varients OpenOCD needs to know about
1939 @item @b{-chain-position DOTTED.NAME} the tap name this target refers to.
1943 for @{ set x 0 @} @{ $x < [target count] @} @{ incr x @} @{
1944 set name [target number $x]
1945 set y [$name cget -endian]
1946 set z [$name cget -type]
1947 puts [format "Chip %d is %s, Endian: %s, type: %s" $x $y $z]
1951 @section Target Varients
1954 @* Unknown (please write me)
1956 @* Unknown (please write me) (simular to arm7tdmi)
1958 @* Varients: @option{arm920t}, @option{arm922t} and @option{arm940t}
1959 This enables the hardware single-stepping support found on these
1964 @* None (this is also used as the ARM946)
1966 @* use variant <@var{-variant lm3s}> when debugging luminary lm3s targets. This will cause
1967 OpenOCD to use a software reset rather than asserting SRST to avoid a issue with clearing
1968 the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
1969 be detected and the normal reset behaviour used.
1971 @* Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},@option{pxa250}, @option{pxa255}, @option{pxa26x}.
1973 @* Supported variants are @option{arm1136}, @option{arm1156}, @option{arm1176}
1975 @* Use variant @option{ejtag_srst} when debugging targets that do not
1976 provide a functional SRST line on the EJTAG connector. This causes
1977 OpenOCD to instead use an EJTAG software reset command to reset the
1978 processor. You still need to enable @option{srst} on the reset
1979 configuration command to enable OpenOCD hardware reset functionality.
1980 @comment END varients
1982 @section working_area - Command Removed
1983 @cindex working_area
1984 @*@b{Please use the ``$_TARGETNAME configure -work-area-... parameters instead}
1985 @* This documentation remains because there are existing scripts that
1986 still use this that need to be converted.
1988 working_area target# address size backup| [virtualaddress]
1990 @* The target# is a the 0 based target numerical index.
1992 This command specifies a working area for the debugger to use. This
1993 may be used to speed-up downloads to target memory and flash
1994 operations, or to perform otherwise unavailable operations (some
1995 coprocessor operations on ARM7/9 systems, for example). The last
1996 parameter decides whether the memory should be preserved
1997 (<@var{backup}>) or can simply be overwritten (<@var{nobackup}>). If
1998 possible, use a working_area that doesn't need to be backed up, as
1999 performing a backup slows down operation.
2001 @node Flash Configuration
2002 @chapter Flash Programing
2003 @cindex Flash Configuration
2005 @b{Note:} As of 28/nov/2008 OpenOCD does not know how to program a SPI
2006 flash that a micro may boot from. Perhaps you the reader would like to
2007 contribute support for this.
2011 @item Configure via the command @b{flash bank}
2012 @* Normally this is done in a configuration file.
2013 @item Operate on the flash via @b{flash SOMECOMMAND}
2014 @* Often commands to manipulate the flash are typed by a human, or run
2015 via a script in some automated way. For example: To program the boot
2016 flash on your board.
2018 @* Flashing via GDB requires the flash be configured via ``flash
2019 bank'', and the GDB flash features be enabled. See the Daemon
2020 configuration section for more details.
2023 @section Flash commands
2024 @cindex Flash commands
2025 @subsection flash banks
2028 @*List configured flash banks
2029 @*@b{NOTE:} the singular form: 'flash bank' is used to configure the flash banks.
2030 @subsection flash info
2031 @b{flash info} <@var{num}>
2033 @*Print info about flash bank <@option{num}>
2034 @subsection flash probe
2035 @b{flash probe} <@var{num}>
2037 @*Identify the flash, or validate the parameters of the configured flash. Operation
2038 depends on the flash type.
2039 @subsection flash erase_check
2040 @b{flash erase_check} <@var{num}>
2041 @cindex flash erase_check
2042 @*Check erase state of sectors in flash bank <@var{num}>. This is the only operation that
2043 updates the erase state information displayed by @option{flash info}. That means you have
2044 to issue an @option{erase_check} command after erasing or programming the device to get
2045 updated information.
2046 @subsection flash protect_check
2047 @b{flash protect_check} <@var{num}>
2048 @cindex flash protect_check
2049 @*Check protection state of sectors in flash bank <num>.
2050 @option{flash erase_sector} using the same syntax.
2051 @subsection flash erase_sector
2052 @b{flash erase_sector} <@var{num}> <@var{first}> <@var{last}>
2053 @cindex flash erase_sector
2054 @anchor{flash erase_sector}
2055 @*Erase sectors at bank <@var{num}>, starting at sector <@var{first}> up to and including
2056 <@var{last}>. Sector numbering starts at 0. Depending on the flash type, erasing may
2057 require the protection to be disabled first (e.g. Intel Advanced Bootblock flash using
2059 @subsection flash erase_address
2060 @b{flash erase_address} <@var{address}> <@var{length}>
2061 @cindex flash erase_address
2062 @*Erase sectors starting at <@var{address}> for <@var{length}> bytes
2063 @subsection flash write_bank
2064 @b{flash write_bank} <@var{num}> <@var{file}> <@var{offset}>
2065 @cindex flash write_bank
2066 @anchor{flash write_bank}
2067 @*Write the binary <@var{file}> to flash bank <@var{num}>, starting at
2068 <@option{offset}> bytes from the beginning of the bank.
2069 @subsection flash write_image
2070 @b{flash write_image} [@var{erase}] <@var{file}> [@var{offset}] [@var{type}]
2071 @cindex flash write_image
2072 @anchor{flash write_image}
2073 @*Write the image <@var{file}> to the current target's flash bank(s). A relocation
2074 [@var{offset}] can be specified and the file [@var{type}] can be specified
2075 explicitly as @option{bin} (binary), @option{ihex} (Intel hex), @option{elf}
2076 (ELF file) or @option{s19} (Motorola s19). Flash memory will be erased prior to programming
2077 if the @option{erase} parameter is given.
2078 @subsection flash protect
2079 @b{flash protect} <@var{num}> <@var{first}> <@var{last}> <@option{on}|@option{off}>
2080 @cindex flash protect
2081 @*Enable (@var{on}) or disable (@var{off}) protection of flash sectors <@var{first}> to
2082 <@var{last}> of @option{flash bank} <@var{num}>.
2084 @subsection mFlash commands
2085 @cindex mFlash commands
2087 @item @b{mflash probe}
2088 @cindex mflash probe
2090 @item @b{mflash write} <@var{num}> <@var{file}> <@var{offset}>
2091 @cindex mflash write
2092 Write the binary <@var{file}> to mflash bank <@var{num}>, starting at
2093 <@var{offset}> bytes from the beginning of the bank.
2094 @item @b{mflash dump} <@var{num}> <@var{file}> <@var{offset}> <@var{size}>
2096 Dump <size> bytes, starting at <@var{offset}> bytes from the beginning of the <@var{num}> bank
2100 @section flash bank command
2101 The @b{flash bank} command is used to configure one or more flash chips (or banks in OpenOCD terms)
2104 @b{flash bank} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}>
2105 <@var{bus_width}> <@var{target#}> [@var{driver_options ...}]
2108 @*Configures a flash bank at <@var{base}> of <@var{size}> bytes and <@var{chip_width}>
2109 and <@var{bus_width}> bytes using the selected flash <driver>.
2111 @subsection External Flash - cfi options
2113 CFI flash are external flash chips - often they are connected to a
2114 specific chip select on the micro. By default at hard reset most
2115 micros have the ablity to ``boot'' from some flash chip - typically
2116 attached to the chips CS0 pin.
2118 For other chip selects: OpenOCD does not know how to configure, or
2119 access a specific chip select. Instead you the human might need to via
2120 other commands (like: mww) configure additional chip selects, or
2121 perhaps configure a GPIO pin that controls the ``write protect'' pin
2124 @b{flash bank cfi} <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}>
2125 <@var{target#}> [@var{jedec_probe}|@var{x16_as_x8}]
2126 @*CFI flashes require the number of the target they're connected to as an additional
2127 argument. The CFI driver makes use of a working area (specified for the target)
2128 to significantly speed up operation.
2130 @var{chip_width} and @var{bus_width} are specified in bytes.
2132 The @var{jedec_probe} option is used to detect certain non-CFI flash roms, like AM29LV010 and similar types.
2136 @subsection Internal Flash (Micro Controllers)
2137 @subsubsection lpc2000 options
2138 @cindex lpc2000 options
2140 @b{flash bank lpc2000} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2141 <@var{clock}> [@var{calc_checksum}]
2142 @*LPC flashes don't require the chip and bus width to be specified. Additional
2143 parameters are the <@var{variant}>, which may be @var{lpc2000_v1} (older LPC21xx and LPC22xx)
2144 or @var{lpc2000_v2} (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx), the number
2145 of the target this flash belongs to (first is 0), the frequency at which the core
2146 is currently running (in kHz - must be an integral number), and the optional keyword
2147 @var{calc_checksum}, telling the driver to calculate a valid checksum for the exception
2151 @subsubsection at91sam7 options
2152 @cindex at91sam7 options
2154 @b{flash bank at91sam7} 0 0 0 0 <@var{target#}>
2155 @*AT91SAM7 flashes only require the @var{target#}, all other values are looked up after
2156 reading the chip-id and type.
2158 @subsubsection str7 options
2159 @cindex str7 options
2161 @b{flash bank str7x} <@var{base}> <@var{size}> 0 0 <@var{target#}> <@var{variant}>
2162 @*variant can be either STR71x, STR73x or STR75x.
2164 @subsubsection str9 options
2165 @cindex str9 options
2167 @b{flash bank str9x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2168 @*The str9 needs the flash controller to be configured prior to Flash programming, eg.
2170 str9x flash_config 0 4 2 0 0x80000
2172 This will setup the BBSR, NBBSR, BBADR and NBBADR registers respectively.
2174 @subsubsection str9 options (str9xpec driver)
2176 @b{flash bank str9xpec} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2177 @*Before using the flash commands the turbo mode will need enabling using str9xpec
2178 @option{enable_turbo} <@var{num>.}
2180 Only use this driver for locking/unlocking the device or configuring the option bytes.
2181 Use the standard str9 driver for programming. @xref{STR9 specific commands}.
2183 @subsubsection stellaris (LM3Sxxx) options
2184 @cindex stellaris (LM3Sxxx) options
2186 @b{flash bank stellaris} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2187 @*stellaris flash plugin only require the @var{target#}.
2189 @subsubsection stm32x options
2190 @cindex stm32x options
2192 @b{flash bank stm32x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2193 @*stm32x flash plugin only require the @var{target#}.
2195 @subsubsection aduc702x options
2196 @cindex aduc702x options
2198 @b{flash bank aduc702x} <@var{base}> <@var{size}> 0 0 <@var{target#}>
2199 @*aduc702x flash plugin require the flash @var{base}, @var{size} and @var{target#}.
2201 @subsection mFlash configuration
2202 @cindex mFlash configuration
2203 @b{mflash bank} <@var{soc}> <@var{base}> <@var{chip_width}> <@var{bus_width}>
2204 <@var{RST pin}> <@var{WP pin}> <@var{DPD pin}> <@var{target #}>
2206 @*Configures a mflash for <@var{soc}> host bank at
2207 <@var{base}>. <@var{chip_width}> and <@var{bus_width}> are bytes
2208 order. Pin number format is dependent on host GPIO calling convention.
2209 If WP or DPD pin was not used, write -1. Currently, mflash bank
2210 support s3c2440 and pxa270.
2212 (ex. of s3c2440) mflash <@var{RST pin}> is GPIO B1, <@var{WP pin}> and <@var{DPD pin}> are not used.
2214 mflash bank s3c2440 0x10000000 2 2 1b -1 -1 0
2216 (ex. of pxa270) mflash <@var{RST pin}> is GPIO 43, <@var{DPD pin}> is not used and <@var{DPD pin}> is GPIO 51.
2218 mflash bank pxa270 0x08000000 2 2 43 -1 51 0
2221 @section Micro Controller Specific Flash Commands
2223 @subsection AT91SAM7 specific commands
2224 @cindex AT91SAM7 specific commands
2225 The flash configuration is deduced from the chip identification register. The flash
2226 controller handles erases automatically on a page (128/265 byte) basis so erase is
2227 not necessary for flash programming. AT91SAM7 processors with less than 512K flash
2228 only have a single flash bank embedded on chip. AT91SAM7xx512 have two flash planes
2229 that can be erased separatly. Only an EraseAll command is supported by the controller
2230 for each flash plane and this is called with
2232 @item @b{flash erase} <@var{num}> @var{first_plane} @var{last_plane}
2233 @*bulk erase flash planes first_plane to last_plane.
2234 @item @b{at91sam7 gpnvm} <@var{num}> <@var{bit}> <@option{set}|@option{clear}>
2235 @cindex at91sam7 gpnvm
2236 @*set or clear a gpnvm bit for the processor
2239 @subsection STR9 specific commands
2240 @cindex STR9 specific commands
2241 @anchor{STR9 specific commands}
2242 These are flash specific commands when using the str9xpec driver.
2244 @item @b{str9xpec enable_turbo} <@var{num}>
2245 @cindex str9xpec enable_turbo
2246 @*enable turbo mode, simply this will remove the str9 from the chain and talk
2247 directly to the embedded flash controller.
2248 @item @b{str9xpec disable_turbo} <@var{num}>
2249 @cindex str9xpec disable_turbo
2250 @*restore the str9 into jtag chain.
2251 @item @b{str9xpec lock} <@var{num}>
2252 @cindex str9xpec lock
2253 @*lock str9 device. The str9 will only respond to an unlock command that will
2255 @item @b{str9xpec unlock} <@var{num}>
2256 @cindex str9xpec unlock
2257 @*unlock str9 device.
2258 @item @b{str9xpec options_read} <@var{num}>
2259 @cindex str9xpec options_read
2260 @*read str9 option bytes.
2261 @item @b{str9xpec options_write} <@var{num}>
2262 @cindex str9xpec options_write
2263 @*write str9 option bytes.
2266 Note: Before using the str9xpec driver here is some background info to help
2267 you better understand how the drivers works. OpenOCD has two flash drivers for
2271 Standard driver @option{str9x} programmed via the str9 core. Normally used for
2272 flash programming as it is faster than the @option{str9xpec} driver.
2274 Direct programming @option{str9xpec} using the flash controller, this is
2275 ISC compilant (IEEE 1532) tap connected in series with the str9 core. The str9
2276 core does not need to be running to program using this flash driver. Typical use
2277 for this driver is locking/unlocking the target and programming the option bytes.
2280 Before we run any cmds using the @option{str9xpec} driver we must first disable
2281 the str9 core. This example assumes the @option{str9xpec} driver has been
2282 configured for flash bank 0.
2284 # assert srst, we do not want core running
2285 # while accessing str9xpec flash driver
2287 # turn off target polling
2290 str9xpec enable_turbo 0
2292 str9xpec options_read 0
2293 # re-enable str9 core
2294 str9xpec disable_turbo 0
2298 The above example will read the str9 option bytes.
2299 When performing a unlock remember that you will not be able to halt the str9 - it
2300 has been locked. Halting the core is not required for the @option{str9xpec} driver
2301 as mentioned above, just issue the cmds above manually or from a telnet prompt.
2303 @subsection STR9 configuration
2304 @cindex STR9 configuration
2306 @item @b{str9x flash_config} <@var{bank}> <@var{BBSR}> <@var{NBBSR}>
2307 <@var{BBADR}> <@var{NBBADR}>
2308 @cindex str9x flash_config
2309 @*Configure str9 flash controller.
2311 eg. str9x flash_config 0 4 2 0 0x80000
2313 BBSR - Boot Bank Size register
2314 NBBSR - Non Boot Bank Size register
2315 BBADR - Boot Bank Start Address register
2316 NBBADR - Boot Bank Start Address register
2320 @subsection STR9 option byte configuration
2321 @cindex STR9 option byte configuration
2323 @item @b{str9xpec options_cmap} <@var{num}> <@option{bank0}|@option{bank1}>
2324 @cindex str9xpec options_cmap
2325 @*configure str9 boot bank.
2326 @item @b{str9xpec options_lvdthd} <@var{num}> <@option{2.4v}|@option{2.7v}>
2327 @cindex str9xpec options_lvdthd
2328 @*configure str9 lvd threshold.
2329 @item @b{str9xpec options_lvdsel} <@var{num}> <@option{vdd}|@option{vdd_vddq}>
2330 @cindex str9xpec options_lvdsel
2331 @*configure str9 lvd source.
2332 @item @b{str9xpec options_lvdwarn} <@var{bank}> <@option{vdd}|@option{vdd_vddq}>
2333 @cindex str9xpec options_lvdwarn
2334 @*configure str9 lvd reset warning source.
2337 @subsection STM32x specific commands
2338 @cindex STM32x specific commands
2340 These are flash specific commands when using the stm32x driver.
2342 @item @b{stm32x lock} <@var{num}>
2344 @*lock stm32 device.
2345 @item @b{stm32x unlock} <@var{num}>
2346 @cindex stm32x unlock
2347 @*unlock stm32 device.
2348 @item @b{stm32x options_read} <@var{num}>
2349 @cindex stm32x options_read
2350 @*read stm32 option bytes.
2351 @item @b{stm32x options_write} <@var{num}> <@option{SWWDG}|@option{HWWDG}>
2352 <@option{RSTSTNDBY}|@option{NORSTSTNDBY}> <@option{RSTSTOP}|@option{NORSTSTOP}>
2353 @cindex stm32x options_write
2354 @*write stm32 option bytes.
2355 @item @b{stm32x mass_erase} <@var{num}>
2356 @cindex stm32x mass_erase
2357 @*mass erase flash memory.
2360 @subsection Stellaris specific commands
2361 @cindex Stellaris specific commands
2363 These are flash specific commands when using the Stellaris driver.
2365 @item @b{stellaris mass_erase} <@var{num}>
2366 @cindex stellaris mass_erase
2367 @*mass erase flash memory.
2371 @node General Commands
2372 @chapter General Commands
2375 The commands documented in this chapter here are common commands that
2376 you a human may want to type and see the output of. Configuration type
2377 commands are documented elsewhere.
2381 @item @b{Source Of Commands}
2382 @* OpenOCD commands can occur in a configuration script (discussed
2383 elsewhere) or typed manually by a human or supplied programatically,
2384 or via one of several Tcp/Ip Ports.
2386 @item @b{From the human}
2387 @* A human should interact with the Telnet interface (default port: 4444,
2388 or via GDB, default port 3333)
2390 To issue commands from within a GDB session, use the @option{monitor}
2391 command, e.g. use @option{monitor poll} to issue the @option{poll}
2392 command. All output is relayed through the GDB session.
2394 @item @b{Machine Interface}
2395 The TCL interface intent is to be a machine interface. The default TCL
2400 @section Daemon Commands
2402 @subsection sleep [@var{msec}]
2404 @*Wait for n milliseconds before resuming. Useful in connection with script files
2405 (@var{script} command and @var{target_script} configuration).
2407 @subsection shutdown
2409 @*Close the OpenOCD daemon, disconnecting all clients (GDB, Telnet, Other).
2411 @subsection debug_level [@var{n}]
2413 @anchor{debug_level}
2414 @*Display or adjust debug level to n<0-3>
2416 @subsection fast [@var{enable|disable}]
2418 @*Default disabled. Set default behaviour of OpenOCD to be "fast and dangerous". For instance ARM7/9 DCC memory
2419 downloads and fast memory access will work if the JTAG interface isn't too fast and
2420 the core doesn't run at a too low frequency. Note that this option only changes the default
2421 and that the indvidual options, like DCC memory downloads, can be enabled and disabled
2424 The target specific "dangerous" optimisation tweaking options may come and go
2425 as more robust and user friendly ways are found to ensure maximum throughput
2426 and robustness with a minimum of configuration.
2428 Typically the "fast enable" is specified first on the command line:
2431 openocd -c "fast enable" -c "interface dummy" -f target/str710.cfg
2434 @subsection log_output <@var{file}>
2436 @*Redirect logging to <file> (default: stderr)
2438 @subsection script <@var{file}>
2440 @*Execute commands from <file>
2441 Also see: ``source [find FILENAME]''
2443 @section Target state handling
2444 @subsection power <@var{on}|@var{off}>
2446 @*Turn power switch to target on/off.
2447 No arguments: print status.
2448 Not all interfaces support this.
2450 @subsection reg [@option{#}|@option{name}] [value]
2452 @*Access a single register by its number[@option{#}] or by its [@option{name}].
2453 No arguments: list all available registers for the current target.
2454 Number or name argument: display a register
2455 Number or name and value arguments: set register value
2457 @subsection poll [@option{on}|@option{off}]
2459 @*Poll the target for its current state. If the target is in debug mode, architecture
2460 specific information about the current state is printed. An optional parameter
2461 allows continuous polling to be enabled and disabled.
2463 @subsection halt [@option{ms}]
2465 @*Send a halt request to the target and wait for it to halt for up to [@option{ms}] milliseconds.
2466 Default [@option{ms}] is 5 seconds if no arg given.
2467 Optional arg @option{ms} is a timeout in milliseconds. Using 0 as the [@option{ms}]
2468 will stop OpenOCD from waiting.
2470 @subsection wait_halt [@option{ms}]
2472 @*Wait for the target to enter debug mode. Optional [@option{ms}] is
2473 a timeout in milliseconds. Default [@option{ms}] is 5 seconds if no
2476 @subsection resume [@var{address}]
2478 @*Resume the target at its current code position, or at an optional address.
2479 OpenOCD will wait 5 seconds for the target to resume.
2481 @subsection step [@var{address}]
2483 @*Single-step the target at its current code position, or at an optional address.
2485 @subsection reset [@option{run}|@option{halt}|@option{init}]
2487 @*Perform a hard-reset. The optional parameter specifies what should happen after the reset.
2489 With no arguments a "reset run" is executed
2493 @*Let the target run.
2496 @*Immediately halt the target (works only with certain configurations).
2499 @*Immediately halt the target, and execute the reset script (works only with certain
2503 @subsection soft_reset_halt
2505 @*Requesting target halt and executing a soft reset. This often used
2506 when a target cannot be reset and halted. The target, after reset is
2507 released begins to execute code. OpenOCD attempts to stop the CPU and
2508 then sets the Program counter back at the reset vector. Unfortunatlly
2509 that code that was executed may have left hardware in an unknown
2513 @section Memory access commands
2515 display available ram memory.
2516 @subsection Memory Peek/Poke type commands
2517 These commands allow accesses of a specific size to the memory
2518 system. Often these are used to configure the current target in some
2519 special way. For example - one may need to write certian values to the
2520 SDRAM controller to enable SDRAM.
2523 @item To change the current target see the ``targets'' (plural) command
2524 @item In system level scripts these commands are depricated, please use the TARGET object versions.
2528 @item @b{mdw} <@var{addr}> [@var{count}]
2530 @*display memory words (32bit)
2531 @item @b{mdh} <@var{addr}> [@var{count}]
2533 @*display memory half-words (16bit)
2534 @item @b{mdb} <@var{addr}> [@var{count}]
2536 @*display memory bytes (8bit)
2537 @item @b{mww} <@var{addr}> <@var{value}>
2539 @*write memory word (32bit)
2540 @item @b{mwh} <@var{addr}> <@var{value}>
2542 @*write memory half-word (16bit)
2543 @item @b{mwb} <@var{addr}> <@var{value}>
2545 @*write memory byte (8bit)
2548 @section Image Loading Commands
2549 @subsection load_image
2550 @b{load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2553 @*Load image <@var{file}> to target memory at <@var{address}>
2554 @subsection fast_load_image
2555 @b{fast_load_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2556 @cindex fast_load_image
2557 @anchor{fast_load_image}
2558 @*Normally you should be using @b{load_image} or GDB load. However, for
2559 testing purposes or when IO overhead is significant(OpenOCD running on embedded
2560 host), then storing the image in memory and uploading the image to the target
2561 can be a way to upload e.g. multiple debug sessions when the binary does not change.
2562 Arguments as @b{load_image}, but image is stored in OpenOCD host
2563 memory, i.e. does not affect target. This approach is also useful when profiling
2564 target programming performance as IO and target programming can easily be profiled
2566 @subsection fast_load
2570 @*Loads image stored in memory by @b{fast_load_image} to current target. Must be preceeded by fast_load_image.
2571 @subsection dump_image
2572 @b{dump_image} <@var{file}> <@var{address}> <@var{size}>
2575 @*Dump <@var{size}> bytes of target memory starting at <@var{address}> to a
2576 (binary) <@var{file}>.
2577 @subsection verify_image
2578 @b{verify_image} <@var{file}> <@var{address}> [@option{bin}|@option{ihex}|@option{elf}]
2579 @cindex verify_image
2580 @*Verify <@var{file}> against target memory starting at <@var{address}>.
2581 This will first attempt comparison using a crc checksum, if this fails it will try a binary compare.
2584 @section Breakpoint commands
2585 @cindex Breakpoint commands
2587 @item @b{bp} <@var{addr}> <@var{len}> [@var{hw}]
2589 @*set breakpoint <address> <length> [hw]
2590 @item @b{rbp} <@var{addr}>
2592 @*remove breakpoint <adress>
2593 @item @b{wp} <@var{addr}> <@var{len}> <@var{r}|@var{w}|@var{a}> [@var{value}] [@var{mask}]
2595 @*set watchpoint <address> <length> <r/w/a> [value] [mask]
2596 @item @b{rwp} <@var{addr}>
2598 @*remove watchpoint <adress>
2601 @section Misc Commands
2602 @cindex Other Target Commands
2604 @item @b{profile} <@var{seconds}> <@var{gmon.out}>
2606 Profiling samples the CPU PC as quickly as OpenOCD is able, which will be used as a random sampling of PC.
2609 @section Target Specific Commands
2610 @cindex Target Specific Commands
2614 @section Architecture Specific Commands
2615 @cindex Architecture Specific Commands
2617 @subsection ARMV4/5 specific commands
2618 @cindex ARMV4/5 specific commands
2620 These commands are specific to ARM architecture v4 and v5, like all ARM7/9 systems
2621 or Intel XScale (XScale isn't supported yet).
2623 @item @b{armv4_5 reg}
2625 @*Display a list of all banked core registers, fetching the current value from every
2626 core mode if necessary. OpenOCD versions before rev. 60 didn't fetch the current
2628 @item @b{armv4_5 core_mode} [@var{arm}|@var{thumb}]
2629 @cindex armv4_5 core_mode
2630 @*Displays the core_mode, optionally changing it to either ARM or Thumb mode.
2631 The target is resumed in the currently set @option{core_mode}.
2634 @subsection ARM7/9 specific commands
2635 @cindex ARM7/9 specific commands
2637 These commands are specific to ARM7 and ARM9 targets, like ARM7TDMI, ARM720t,
2638 ARM920t or ARM926EJ-S.
2640 @item @b{arm7_9 dbgrq} <@var{enable}|@var{disable}>
2641 @cindex arm7_9 dbgrq
2642 @*Enable use of the DBGRQ bit to force entry into debug mode. This should be
2643 safe for all but ARM7TDMI--S cores (like Philips LPC).
2644 @item @b{arm7_9 fast_memory_access} <@var{enable}|@var{disable}>
2645 @cindex arm7_9 fast_memory_access
2646 @anchor{arm7_9 fast_memory_access}
2647 @*Allow OpenOCD to read and write memory without checking completion of
2648 the operation. This provides a huge speed increase, especially with USB JTAG
2649 cables (FT2232), but might be unsafe if used with targets running at a very low
2650 speed, like the 32kHz startup clock of an AT91RM9200.
2651 @item @b{arm7_9 dcc_downloads} <@var{enable}|@var{disable}>
2652 @cindex arm7_9 dcc_downloads
2653 @*Enable the use of the debug communications channel (DCC) to write larger (>128 byte)
2654 amounts of memory. DCC downloads offer a huge speed increase, but might be potentially
2655 unsafe, especially with targets running at a very low speed. This command was introduced
2656 with OpenOCD rev. 60.
2659 @subsection ARM720T specific commands
2660 @cindex ARM720T specific commands
2663 @item @b{arm720t cp15} <@var{num}> [@var{value}]
2664 @cindex arm720t cp15
2665 @*display/modify cp15 register <@option{num}> [@option{value}].
2666 @item @b{arm720t md<bhw>_phys} <@var{addr}> [@var{count}]
2667 @cindex arm720t md<bhw>_phys
2668 @*Display memory at physical address addr.
2669 @item @b{arm720t mw<bhw>_phys} <@var{addr}> <@var{value}>
2670 @cindex arm720t mw<bhw>_phys
2671 @*Write memory at physical address addr.
2672 @item @b{arm720t virt2phys} <@var{va}>
2673 @cindex arm720t virt2phys
2674 @*Translate a virtual address to a physical address.
2677 @subsection ARM9TDMI specific commands
2678 @cindex ARM9TDMI specific commands
2681 @item @b{arm9tdmi vector_catch} <@var{all}|@var{none}>
2682 @cindex arm9tdmi vector_catch
2683 @*Catch arm9 interrupt vectors, can be @option{all} @option{none} or any of the following:
2684 @option{reset} @option{undef} @option{swi} @option{pabt} @option{dabt} @option{reserved}
2685 @option{irq} @option{fiq}.
2687 Can also be used on other arm9 based cores, arm966, arm920t and arm926ejs.
2690 @subsection ARM966E specific commands
2691 @cindex ARM966E specific commands
2694 @item @b{arm966e cp15} <@var{num}> [@var{value}]
2695 @cindex arm966e cp15
2696 @*display/modify cp15 register <@option{num}> [@option{value}].
2699 @subsection ARM920T specific commands
2700 @cindex ARM920T specific commands
2703 @item @b{arm920t cp15} <@var{num}> [@var{value}]
2704 @cindex arm920t cp15
2705 @*display/modify cp15 register <@option{num}> [@option{value}].
2706 @item @b{arm920t cp15i} <@var{num}> [@var{value}] [@var{address}]
2707 @cindex arm920t cp15i
2708 @*display/modify cp15 (interpreted access) <@option{opcode}> [@option{value}] [@option{address}]
2709 @item @b{arm920t cache_info}
2710 @cindex arm920t cache_info
2711 @*Print information about the caches found. This allows you to see if your target
2712 is a ARM920T (2x16kByte cache) or ARM922T (2x8kByte cache).
2713 @item @b{arm920t md<bhw>_phys} <@var{addr}> [@var{count}]
2714 @cindex arm920t md<bhw>_phys
2715 @*Display memory at physical address addr.
2716 @item @b{arm920t mw<bhw>_phys} <@var{addr}> <@var{value}>
2717 @cindex arm920t mw<bhw>_phys
2718 @*Write memory at physical address addr.
2719 @item @b{arm920t read_cache} <@var{filename}>
2720 @cindex arm920t read_cache
2721 @*Dump the content of ICache and DCache to a file.
2722 @item @b{arm920t read_mmu} <@var{filename}>
2723 @cindex arm920t read_mmu
2724 @*Dump the content of the ITLB and DTLB to a file.
2725 @item @b{arm920t virt2phys} <@var{va}>
2726 @cindex arm920t virt2phys
2727 @*Translate a virtual address to a physical address.
2730 @subsection ARM926EJS specific commands
2731 @cindex ARM926EJS specific commands
2734 @item @b{arm926ejs cp15} <@var{num}> [@var{value}]
2735 @cindex arm926ejs cp15
2736 @*display/modify cp15 register <@option{num}> [@option{value}].
2737 @item @b{arm926ejs cache_info}
2738 @cindex arm926ejs cache_info
2739 @*Print information about the caches found.
2740 @item @b{arm926ejs md<bhw>_phys} <@var{addr}> [@var{count}]
2741 @cindex arm926ejs md<bhw>_phys
2742 @*Display memory at physical address addr.
2743 @item @b{arm926ejs mw<bhw>_phys} <@var{addr}> <@var{value}>
2744 @cindex arm926ejs mw<bhw>_phys
2745 @*Write memory at physical address addr.
2746 @item @b{arm926ejs virt2phys} <@var{va}>
2747 @cindex arm926ejs virt2phys
2748 @*Translate a virtual address to a physical address.
2751 @subsection CORTEX_M3 specific commands
2752 @cindex CORTEX_M3 specific commands
2755 @item @b{cortex_m3 maskisr} <@var{on}|@var{off}>
2756 @cindex cortex_m3 maskisr
2757 @*Enable masking (disabling) interrupts during target step/resume.
2761 @section Debug commands
2762 @cindex Debug commands
2763 The following commands give direct access to the core, and are most likely
2764 only useful while debugging OpenOCD.
2766 @item @b{arm7_9 write_xpsr} <@var{32-bit value}> <@option{0=cpsr}, @option{1=spsr}>
2767 @cindex arm7_9 write_xpsr
2768 @*Immediately write either the current program status register (CPSR) or the saved
2769 program status register (SPSR), without changing the register cache (as displayed
2770 by the @option{reg} and @option{armv4_5 reg} commands).
2771 @item @b{arm7_9 write_xpsr_im8} <@var{8-bit value}> <@var{rotate 4-bit}>
2772 <@var{0=cpsr},@var{1=spsr}>
2773 @cindex arm7_9 write_xpsr_im8
2774 @*Write the 8-bit value rotated right by 2*rotate bits, using an immediate write
2775 operation (similar to @option{write_xpsr}).
2776 @item @b{arm7_9 write_core_reg} <@var{num}> <@var{mode}> <@var{value}>
2777 @cindex arm7_9 write_core_reg
2778 @*Write a core register, without changing the register cache (as displayed by the
2779 @option{reg} and @option{armv4_5 reg} commands). The <@var{mode}> argument takes the
2780 encoding of the [M4:M0] bits of the PSR.
2783 @section Target Requests
2784 @cindex Target Requests
2785 OpenOCD can handle certain target requests, currently debugmsg are only supported for arm7_9 and cortex_m3.
2786 See libdcc in the contrib dir for more details.
2788 @item @b{target_request debugmsgs} <@var{enable}|@var{disable}>
2789 @cindex target_request debugmsgs
2790 @*Enable/disable target debugmsgs requests. debugmsgs enable messages to be sent to the debugger while the target is running.
2794 @chapter JTAG Commands
2795 @cindex JTAG commands
2796 Generally most people will not use the bulk of these commands. They
2797 are mostly used by the OpenOCD developers or those who need to
2798 directly manipulate the JTAG taps.
2800 In general these commands control JTAG taps at a very low level. For
2801 example if you need to control a JTAG Route Controller (ie: the
2802 OMAP3530 on the Beagle Board has one) you might use these commands in
2803 a script or an event procedure.
2807 @item @b{scan_chain}
2809 @*Print current scan chain configuration.
2810 @item @b{jtag_reset} <@var{trst}> <@var{srst}>
2812 @*Toggle reset lines.
2813 @item @b{endstate} <@var{tap_state}>
2815 @*Finish JTAG operations in <@var{tap_state}>.
2816 @item @b{runtest} <@var{num_cycles}>
2818 @*Move to Run-Test/Idle, and execute <@var{num_cycles}>
2819 @item @b{statemove} [@var{tap_state}]
2821 @*Move to current endstate or [@var{tap_state}]
2822 @item @b{irscan} <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2824 @*Execute IR scan <@var{device}> <@var{instr}> [@var{dev2}] [@var{instr2}] ...
2825 @item @b{drscan} <@var{device}> [@var{dev2}] [@var{var2}] ...
2827 @*Execute DR scan <@var{device}> [@var{dev2}] [@var{var2}] ...
2828 @item @b{verify_ircapture} <@option{enable}|@option{disable}>
2829 @cindex verify_ircapture
2830 @*Verify value captured during Capture-IR. Default is enabled.
2831 @item @b{var} <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2833 @*Allocate, display or delete variable <@var{name}> [@var{num_fields}|@var{del}] [@var{size1}] ...
2834 @item @b{field} <@var{var}> <@var{field}> [@var{value}|@var{flip}]
2836 Display/modify variable field <@var{var}> <@var{field}> [@var{value}|@var{flip}].
2841 Available tap_states are:
2881 If OpenOCD runs on an embedded host(as ZY1000 does), then tftp can
2882 be used to access files on PCs(either developer PC or some other PC).
2884 The way this works on the ZY1000 is to prefix a filename by
2885 "/tftp/ip/" and append the tftp path on the tftp
2886 server(tftpd). E.g. "load_image /tftp/10.0.0.96/c:\temp\abc.elf" will
2887 load c:\temp\abc.elf from the developer pc (10.0.0.96) into memory as
2888 if the file was hosted on the embedded host.
2890 In order to achieve decent performance, you must choose a tftp server
2891 that supports a packet size bigger than the default packet size(512 bytes). There
2892 are numerous tftp servers out there(free and commercial) and you will have to do
2893 a bit of googling to find something that fits your requirements.
2895 @node Sample Scripts
2896 @chapter Sample Scripts
2899 This page shows how to use the target library.
2901 The configuration script can be divided in the following section:
2903 @item daemon configuration
2905 @item jtag scan chain
2906 @item target configuration
2907 @item flash configuration
2910 Detailed information about each section can be found at OpenOCD configuration.
2912 @section AT91R40008 example
2913 @cindex AT91R40008 example
2914 To start OpenOCD with a target script for the AT91R40008 CPU and reset
2915 the CPU upon startup of the OpenOCD daemon.
2917 openocd -f interface/parport.cfg -f target/at91r40008.cfg -c init -c reset
2921 @node GDB and OpenOCD
2922 @chapter GDB and OpenOCD
2923 @cindex GDB and OpenOCD
2924 OpenOCD complies with the remote gdbserver protocol, and as such can be used
2925 to debug remote targets.
2927 @section Connecting to GDB
2928 @cindex Connecting to GDB
2929 @anchor{Connecting to GDB}
2930 Use GDB 6.7 or newer with OpenOCD if you run into trouble. For
2931 instance 6.3 has a known bug where it produces bogus memory access
2932 errors, which has since been fixed: look up 1836 in
2933 @url{http://sourceware.org/cgi-bin/gnatsweb.pl?database=gdb}
2935 @*OpenOCD can communicate with GDB in two ways:
2938 A socket (tcp) connection is typically started as follows:
2940 target remote localhost:3333
2942 This would cause GDB to connect to the gdbserver on the local pc using port 3333.
2944 A pipe connection is typically started as follows:
2946 target remote openocd --pipe
2948 This would cause GDB to run OpenOCD and communicate using pipes (stdin/stdout).
2949 Using this method has the advantage of GDB starting/stopping OpenOCD for debug session.
2952 @*To see a list of available OpenOCD commands type @option{monitor help} on the
2955 OpenOCD supports the gdb @option{qSupported} packet, this enables information
2956 to be sent by the gdb server (OpenOCD) to GDB. Typical information includes
2957 packet size and device memory map.
2959 Previous versions of OpenOCD required the following GDB options to increase
2960 the packet size and speed up GDB communication.
2962 set remote memory-write-packet-size 1024
2963 set remote memory-write-packet-size fixed
2964 set remote memory-read-packet-size 1024
2965 set remote memory-read-packet-size fixed
2967 This is now handled in the @option{qSupported} PacketSize and should not be required.
2969 @section Programming using GDB
2970 @cindex Programming using GDB
2972 By default the target memory map is sent to GDB, this can be disabled by
2973 the following OpenOCD config option:
2975 gdb_memory_map disable
2977 For this to function correctly a valid flash config must also be configured
2978 in OpenOCD. For faster performance you should also configure a valid
2981 Informing GDB of the memory map of the target will enable GDB to protect any
2982 flash area of the target and use hardware breakpoints by default. This means
2983 that the OpenOCD option @option{gdb_breakpoint_override} is not required when
2984 using a memory map. @xref{gdb_breakpoint_override}.
2986 To view the configured memory map in GDB, use the gdb command @option{info mem}
2987 All other unasigned addresses within GDB are treated as RAM.
2989 GDB 6.8 and higher set any memory area not in the memory map as inaccessible,
2990 this can be changed to the old behaviour by using the following GDB command.
2992 set mem inaccessible-by-default off
2995 If @option{gdb_flash_program enable} is also used, GDB will be able to
2996 program any flash memory using the vFlash interface.
2998 GDB will look at the target memory map when a load command is given, if any
2999 areas to be programmed lie within the target flash area the vFlash packets
3002 If the target needs configuring before GDB programming, an event
3003 script can be executed.
3005 $_TARGETNAME configure -event EVENTNAME BODY
3008 To verify any flash programming the GDB command @option{compare-sections}
3011 @node TCL scripting API
3012 @chapter TCL scripting API
3013 @cindex TCL scripting API
3016 The commands are stateless. E.g. the telnet command line has a concept
3017 of currently active target, the Tcl API proc's take this sort of state
3018 information as an argument to each proc.
3020 There are three main types of return values: single value, name value
3021 pair list and lists.
3023 Name value pair. The proc 'foo' below returns a name/value pair
3029 > set foo(you) Oyvind
3030 > set foo(mouse) Micky
3031 > set foo(duck) Donald
3039 me Duane you Oyvind mouse Micky duck Donald
3041 Thus, to get the names of the associative array is easy:
3043 foreach { name value } [set foo] {
3044 puts "Name: $name, Value: $value"
3048 Lists returned must be relatively small. Otherwise a range
3049 should be passed in to the proc in question.
3051 Low level commands are prefixed with "openocd_", e.g. openocd_flash_banks
3052 is the low level API upon which "flash banks" is implemented.
3055 @item @b{ocd_mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3057 Read memory and return as a TCL array for script processing
3058 @item @b{ocd_array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
3060 Convert a TCL array to memory locations and write the values
3061 @item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
3063 Return information about the flash banks
3066 OpenOCD commands can consist of two words, e.g. "flash banks". The
3067 startup.tcl "unknown" proc will translate this into a tcl proc
3068 called "flash_banks".
3072 @chapter Deprecated/Removed Commands
3073 @cindex Deprecated/Removed Commands
3074 Certain OpenOCD commands have been deprecated/removed during the various revisions.
3077 @item @b{arm7_9 fast_writes}
3078 @cindex arm7_9 fast_writes
3079 @*use @option{arm7_9 fast_memory_access} command with same args. @xref{arm7_9 fast_memory_access}.
3080 @item @b{arm7_9 force_hw_bkpts}
3081 @cindex arm7_9 force_hw_bkpts
3082 @*Use @option{gdb_breakpoint_override} instead. Note that GDB will use hardware breakpoints
3083 for flash if the gdb memory map has been set up(default when flash is declared in
3084 target configuration). @xref{gdb_breakpoint_override}.
3085 @item @b{arm7_9 sw_bkpts}
3086 @cindex arm7_9 sw_bkpts
3087 @*On by default. See also @option{gdb_breakpoint_override}. @xref{gdb_breakpoint_override}.
3088 @item @b{daemon_startup}
3089 @cindex daemon_startup
3090 @*this config option has been removed, simply adding @option{init} and @option{reset halt} to
3091 the end of your config script will give the same behaviour as using @option{daemon_startup reset}
3092 and @option{target cortex_m3 little reset_halt 0}.
3093 @item @b{dump_binary}
3095 @*use @option{dump_image} command with same args. @xref{dump_image}.
3096 @item @b{flash erase}
3098 @*use @option{flash erase_sector} command with same args. @xref{flash erase_sector}.
3099 @item @b{flash write}
3101 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3102 @item @b{flash write_binary}
3103 @cindex flash write_binary
3104 @*use @option{flash write_bank} command with same args. @xref{flash write_bank}.
3105 @item @b{flash auto_erase}
3106 @cindex flash auto_erase
3107 @*use @option{flash write_image} command passing @option{erase} as the first parameter. @xref{flash write_image}.
3108 @item @b{load_binary}
3110 @*use @option{load_image} command with same args. @xref{load_image}.
3111 @item @b{run_and_halt_time}
3112 @cindex run_and_halt_time
3113 @*This command has been removed for simpler reset behaviour, it can be simulated with the
3120 @item @b{target} <@var{type}> <@var{endian}> <@var{jtag-position}>
3122 @*use the create subcommand of @option{target}.
3123 @item @b{target_script} <@var{target#}> <@var{eventname}> <@var{scriptname}>
3124 @cindex target_script
3125 @*use <@var{target_name}> configure -event <@var{eventname}> "script <@var{scriptname}>"
3126 @item @b{working_area}
3127 @cindex working_area
3128 @*use the @option{configure} subcommand of @option{target} to set the work-area-virt, work-area-phy, work-area-size, and work-area-backup properties of the target.
3135 @item @b{RTCK, also known as: Adaptive Clocking - What is it?}
3137 @cindex adaptive clocking
3140 In digital circuit design it is often refered to as ``clock
3141 syncronization'' the JTAG interface uses one clock (TCK or TCLK)
3142 operating at some speed, your target is operating at another. The two
3143 clocks are not syncronized, they are ``asynchronous''
3145 In order for the two to work together they must syncronize. Otherwise
3146 the two systems will get out of sync with each other and nothing will
3147 work. There are 2 basic options. @b{1.} use a special circuit or
3148 @b{2.} one clock must be some multile slower the the other.
3150 @b{Does this really matter?} For some chips and some situations, this
3151 is a non-issue (ie: A 500mhz ARM926) but for others - for example some
3152 ATMEL SAM7 and SAM9 chips start operation from reset at 32khz -
3153 program/enable the oscillators and eventually the main clock. It is in
3154 those critical times you must slow the jtag clock to sometimes 1 to
3157 Imagine debugging that 500mhz arm926 hand held battery powered device
3158 that ``deep sleeps'' at 32khz between every keystroke. It can be
3161 @b{Solution #1 - A special circuit}
3163 In order to make use of this your jtag dongle must support the RTCK
3164 feature. Not all dongles support this - keep reading!
3166 The RTCK signal often found in some ARM chips is used to help with
3167 this problem. ARM has a good description of the problem described at
3168 this link: @url{http://www.arm.com/support/faqdev/4170.html} [checked
3169 28/nov/2008]. Link title: ``How does the jtag synchronisation logic
3170 work? / how does adaptive clocking working?''.
3172 The nice thing about adaptive clocking is that ``battery powered hand
3173 held device example'' - the adaptiveness works perfectly all the
3174 time. One can set a break point or halt the system in the deep power
3175 down code, slow step out until the system speeds up.
3177 @b{Solution #2 - Always works - but is slower}
3179 Often this is a perfectly acceptable solution.
3181 In the most simple terms: Often the JTAG clock must be 1/10 to 1/12 of
3182 the target clock speed. But what is that ``magic division'' it varies
3183 depending upon the chips on your board. @b{ARM Rule of thumb} Most ARM
3184 based systems require an 8:1 division. @b{Xilinx Rule of thumb} is
3185 1/12 the clock speed.
3187 Note: Many FTDI2232C based JTAG dongles are limited to 6mhz.
3189 You can still debug the 'lower power' situations - you just need to
3190 manually adjust the clock speed at every step. While painful and
3191 teadious, it is not always practical.
3193 It is however easy to ``code your way around it'' - ie: Cheat a little
3194 have a special debug mode in your application that does a ``high power
3195 sleep''. If you are careful - 98% of your problems can be debugged
3198 To set the JTAG frequency use the command:
3206 @item @b{Win32 Pathnames} Why does not backslashes in paths under Windows doesn't work?
3208 OpenOCD uses Tcl and a backslash is an escape char. Use @{ and @}
3209 around Windows filenames.
3222 @item @b{Missing: cygwin1.dll} OpenOCD complains about a missing cygwin1.dll.
3224 Make sure you have Cygwin installed, or at least a version of OpenOCD that
3225 claims to come with all the necessary dlls. When using Cygwin, try launching
3226 OpenOCD from the Cygwin shell.
3228 @item @b{Breakpoint Issue} I'm trying to set a breakpoint using GDB (or a frontend like Insight or
3229 Eclipse), but OpenOCD complains that "Info: arm7_9_common.c:213
3230 arm7_9_add_breakpoint(): sw breakpoint requested, but software breakpoints not enabled".
3232 GDB issues software breakpoints when a normal breakpoint is requested, or to implement
3233 source-line single-stepping. On ARMv4T systems, like ARM7TDMI, ARM720t or ARM920t,
3234 software breakpoints consume one of the two available hardware breakpoints.
3236 @item @b{LPC2000 Flash} When erasing or writing LPC2000 on-chip flash, the operation fails sometimes
3237 and works sometimes fine.
3239 Make sure the core frequency specified in the @option{flash lpc2000} line matches the
3240 clock at the time you're programming the flash. If you've specified the crystal's
3241 frequency, make sure the PLL is disabled, if you've specified the full core speed
3242 (e.g. 60MHz), make sure the PLL is enabled.
3244 @item @b{Amontec Chameleon} When debugging using an Amontec Chameleon in its JTAG Accelerator configuration,
3245 I keep getting "Error: amt_jtagaccel.c:184 amt_wait_scan_busy(): amt_jtagaccel timed
3246 out while waiting for end of scan, rtck was disabled".
3248 Make sure your PC's parallel port operates in EPP mode. You might have to try several
3249 settings in your PC BIOS (ECP, EPP, and different versions of those).
3251 @item @b{Data Aborts} When debugging with OpenOCD and GDB (plain GDB, Insight, or Eclipse),
3252 I get lots of "Error: arm7_9_common.c:1771 arm7_9_read_memory():
3253 memory read caused data abort".
3255 The errors are non-fatal, and are the result of GDB trying to trace stack frames
3256 beyond the last valid frame. It might be possible to prevent this by setting up
3257 a proper "initial" stack frame, if you happen to know what exactly has to
3258 be done, feel free to add this here.
3260 @b{Simple:} In your startup code - push 8 registers of ZEROs onto the
3261 stack before calling main(). What GDB is doing is ``climbing'' the run
3262 time stack by reading various values on the stack using the standard
3263 call frame for the target. GDB keeps going - until one of 2 things
3264 happen @b{#1} an invalid frame is found, or @b{#2} some huge number of
3265 stackframes have been processed. By pushing ZEROs on the stack, GDB
3268 @b{Debugging Interrupt Service Routines} - In your ISR before you call
3269 your C code, do the same, artifically push some zeros on to the stack,
3270 remember to pop them off when the ISR is done.
3272 @b{Also note:} If you have a multi-threaded operating system, they
3273 often do not @b{in the intrest of saving memory} waste these few
3277 @item @b{JTAG Reset Config} I get the following message in the OpenOCD console (or log file):
3278 "Warning: arm7_9_common.c:679 arm7_9_assert_reset(): srst resets test logic, too".
3280 This warning doesn't indicate any serious problem, as long as you don't want to
3281 debug your core right out of reset. Your .cfg file specified @option{jtag_reset
3282 trst_and_srst srst_pulls_trst} to tell OpenOCD that either your board,
3283 your debugger or your target uC (e.g. LPC2000) can't assert the two reset signals
3284 independently. With this setup, it's not possible to halt the core right out of
3285 reset, everything else should work fine.
3287 @item @b{USB Power} When using OpenOCD in conjunction with Amontec JTAGkey and the Yagarto
3288 Toolchain (Eclipse, arm-elf-gcc, arm-elf-gdb), the debugging seems to be
3289 unstable. When single-stepping over large blocks of code, GDB and OpenOCD
3290 quit with an error message. Is there a stability issue with OpenOCD?
3292 No, this is not a stability issue concerning OpenOCD. Most users have solved
3293 this issue by simply using a self-powered USB hub, which they connect their
3294 Amontec JTAGkey to. Apparently, some computers do not provide a USB power
3295 supply stable enough for the Amontec JTAGkey to be operated.
3297 @b{Laptops running on battery have this problem too...}
3299 @item @b{USB Power} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the
3300 following error messages: "Error: ft2232.c:201 ft2232_read(): FT_Read returned:
3301 4" and "Error: ft2232.c:365 ft2232_send_and_recv(): couldn't read from FT2232".
3302 What does that mean and what might be the reason for this?
3304 First of all, the reason might be the USB power supply. Try using a self-powered
3305 hub instead of a direct connection to your computer. Secondly, the error code 4
3306 corresponds to an FT_IO_ERROR, which means that the driver for the FTDI USB
3307 chip ran into some sort of error - this points us to a USB problem.
3309 @item @b{GDB Disconnects} When using the Amontec JTAGkey, sometimes OpenOCD crashes with the following
3310 error message: "Error: gdb_server.c:101 gdb_get_char(): read: 10054".
3311 What does that mean and what might be the reason for this?
3313 Error code 10054 corresponds to WSAECONNRESET, which means that the debugger (GDB)
3314 has closed the connection to OpenOCD. This might be a GDB issue.
3316 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
3317 are described, there is a parameter for specifying the clock frequency
3318 for LPC2000 internal flash devices (e.g. @option{flash bank lpc2000
3319 0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
3320 specified in kilohertz. However, I do have a quartz crystal of a
3321 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
3322 i.e. 14,745.600 kHz). Is it possible to specify real numbers for the
3325 No. The clock frequency specified here must be given as an integral number.
3326 However, this clock frequency is used by the In-Application-Programming (IAP)
3327 routines of the LPC2000 family only, which seems to be very tolerant concerning
3328 the given clock frequency, so a slight difference between the specified clock
3329 frequency and the actual clock frequency will not cause any trouble.
3331 @item @b{Command Order} Do I have to keep a specific order for the commands in the configuration file?
3333 Well, yes and no. Commands can be given in arbitrary order, yet the
3334 devices listed for the JTAG scan chain must be given in the right
3335 order (jtag newdevice), with the device closest to the TDO-Pin being
3336 listed first. In general, whenever objects of the same type exist
3337 which require an index number, then these objects must be given in the
3338 right order (jtag newtap, targets and flash banks - a target
3339 references a jtag newtap and a flash bank references a target).
3341 You can use the ``scan_chain'' command to verify and display the tap order.
3343 @item @b{JTAG Tap Order} JTAG Tap Order - Command Order
3345 Many newer devices have multiple JTAG taps. For example: ST
3346 Microsystems STM32 chips have two taps, a ``boundary scan tap'' and
3347 ``cortexM3'' tap. Example: The STM32 reference manual, Document ID:
3348 RM0008, Section 26.5, Figure 259, page 651/681, the ``TDI'' pin is
3349 connected to the Boundary Scan Tap, which then connects to the
3350 CortexM3 Tap, which then connects to the TDO pin.
3352 Thus, the proper order for the STM32 chip is: (1) The CortexM3, then
3353 (2) The Boundary Scan Tap. If your board includes an additional JTAG
3354 chip in the scan chain (for example a Xilinx CPLD or FPGA) you could
3355 place it before or after the stm32 chip in the chain. For example:
3358 @item OpenOCD_TDI(output) -> STM32 TDI Pin (BS Input)
3359 @item STM32 BS TDO (output) -> STM32 CortexM3 TDI (input)
3360 @item STM32 CortexM3 TDO (output) -> SM32 TDO Pin
3361 @item STM32 TDO Pin (output) -> Xilinx TDI Pin (input)
3362 @item Xilinx TDO Pin -> OpenOCD TDO (input)
3365 The ``jtag device'' commands would thus be in the order shown below. Note
3368 @item jtag newtap Xilinx tap -irlen ...
3369 @item jtag newtap stm32 cpu -irlen ...
3370 @item jtag newtap stm32 bs -irlen ...
3371 @item # Create the debug target and say where it is
3372 @item target create stm32.cpu -chain-position stm32.cpu ...
3376 @item @b{SYSCOMP} Sometimes my debugging session terminates with an error. When I look into the
3377 log file, I can see these error messages: Error: arm7_9_common.c:561
3378 arm7_9_execute_sys_speed(): timeout waiting for SYSCOMP
3384 @node TCL Crash Course
3385 @chapter TCL Crash Course
3388 Not everyone knows TCL - this is not intended to be a replacement for
3389 learning TCL, the intent of this chapter is to give you some idea of
3390 how the TCL Scripts work.
3392 This chapter is written with two audiences in mind. (1) OpenOCD users
3393 who need to understand a bit more of how JIM-Tcl works so they can do
3394 something useful, and (2) those that want to add a new command to
3397 @section TCL Rule #1
3398 There is a famous joke, it goes like this:
3400 @item Rule #1: The wife is always correct
3401 @item Rule #2: If you think otherwise, See Rule #1
3404 The TCL equal is this:
3407 @item Rule #1: Everything is a string
3408 @item Rule #2: If you think otherwise, See Rule #1
3411 As in the famous joke, the consequences of Rule #1 are profound. Once
3412 you understand Rule #1, you will understand TCL.
3414 @section TCL Rule #1b
3415 There is a second pair of rules.
3417 @item Rule #1: Control flow does not exist. Only commands
3418 @* For example: the classic FOR loop or IF statement is not a control
3419 flow item, they are commands, there is no such thing as control flow
3421 @item Rule #2: If you think otherwise, See Rule #1
3422 @* Actually what happens is this: There are commands that by
3423 convention, act like control flow key words in other languages. One of
3424 those commands is the word ``for'', another command is ``if''.
3427 @section Per Rule #1 - All Results are strings
3428 Every TCL command results in a string. The word ``result'' is used
3429 deliberatly. No result is just an empty string. Remember: @i{Rule #1 -
3430 Everything is a string}
3432 @section TCL Quoting Operators
3433 In life of a TCL script, there are two important periods of time, the
3434 difference is subtle.
3437 @item Evaluation Time
3440 The two key items here are how ``quoted things'' work in TCL. TCL has
3441 three primary quoting constructs, the [square-brackets] the
3442 @{curly-braces@} and ``double-quotes''
3444 By now you should know $VARIABLES always start with a $DOLLAR
3445 sign. BTW, to set a variable, you actually use the command ``set'', as
3446 in ``set VARNAME VALUE'' much like the ancient BASIC langauge ``let x
3447 = 1'' statement, but without the equal sign.
3450 @item @b{[square-brackets]}
3451 @* @b{[square-brackets]} are command subsitution. It operates much
3452 like Unix Shell `back-ticks`. The result of a [square-bracket]
3453 operation is exactly 1 string. @i{Remember Rule #1 - Everything is a
3454 string}. These two statments are roughly identical.
3458 echo "The Date is: $X"
3461 puts "The Date is: $X"
3463 @item @b{``double-quoted-things''}
3464 @* @b{``double-quoted-things''} are just simply quoted
3465 text. $VARIABLES and [square-brackets] are expanded in place - the
3466 result however is exactly 1 string. @i{Remember Rule #1 - Everything
3470 puts "It is now \"[date]\", $x is in 1 hour"
3472 @item @b{@{Curly-Braces@}}
3473 @*@b{@{Curly-Braces@}} are magic: $VARIABLES and [square-brackets] are
3474 parsed, but are NOT expanded or executed. @{Curly-Braces@} are like
3475 'single-quote' operators in BASH shell scripts, with the added
3476 feature: @{curly-braces@} nest, single quotes can not. @{@{@{this is
3477 nested 3 times@}@}@} NOTE: [date] is perhaps a bad example, as of
3478 28/nov/2008, Jim/OpenOCD does not have a date command.
3481 @section Consequences of Rule 1/2/3/4
3483 The consequences of Rule 1 is profound.
3485 @subsection Tokenizing & Execution.
3487 Of course, whitespace, blank lines and #comment lines are handled in
3490 As a script is parsed, each (multi) line in the script file is
3491 tokenized and according to the quoting rules. After tokenizing, that
3492 line is immedatly executed.
3494 Multi line statements end with one or more ``still-open''
3495 @{curly-braces@} which - eventually - a few lines later closes.
3497 @subsection Command Execution
3499 Remember earlier: There is no such thing as ``control flow''
3500 statements in TCL. Instead there are COMMANDS that simpily act like
3501 control flow operators.
3503 Commands are executed like this:
3506 @item Parse the next line into (argc) and (argv[]).
3507 @item Look up (argv[0]) in a table and call its function.
3508 @item Repeat until End Of File.
3511 It sort of works like this:
3514 ReadAndParse( &argc, &argv );
3516 cmdPtr = LookupCommand( argv[0] );
3518 (*cmdPtr->Execute)( argc, argv );
3522 When the command ``proc'' is parsed (which creates a procedure
3523 function) it gets 3 parameters on the command line. @b{1} the name of
3524 the proc (function), @b{2} the list of parameters, and @b{3} the body
3525 of the function. Not the choice of words: LIST and BODY. The PROC
3526 command stores these items in a table somewhere so it can be found by
3529 @subsection The FOR Command
3531 The most interesting command to look at is the FOR command. In TCL,
3532 the FOR command is normally implimented in C. Remember, FOR is a
3533 command just like any other command.
3535 When the ascii text containing the FOR command is parsed, the parser
3536 produces 5 parameter strings, @i{(If in doubt: Refer to Rule #1)} they
3540 @item The ascii text 'for'
3541 @item The start text
3542 @item The test expression
3547 Sort of reminds you of ``main( int argc, char **argv )'' does it not?
3548 Remember @i{Rule #1 - Everything is a string.} The key point is this:
3549 Often many of those parameters are in @{curly-braces@} - thus the
3550 variables inside are not expanded or replaced until later.
3552 Remember that every TCL command looks like the classic ``main( argc,
3553 argv )'' function in C. In JimTCL - they actually look like this:
3557 MyCommand( Jim_Interp *interp,
3559 Jim_Obj * const *argvs );
3562 Real TCL is nearly identical. Although the newer versions have
3563 introduced a byte-code parser and intepreter, but at the core, it
3564 still operates in the same basic way.
3566 @subsection FOR Command Implimentation
3568 To understand TCL it is perhaps most helpful to see the FOR
3569 command. Remember, it is a COMMAND not a control flow structure.
3571 In TCL there are two underying C helper functions.
3573 Remember Rule #1 - You are a string.
3575 The @b{first} helper parses and executes commands found in an ascii
3576 string. Commands can be seperated by semi-colons, or newlines. While
3577 parsing, variables are expanded per the quoting rules
3579 The @b{second} helper evaluates an ascii string as a numerical
3580 expression and returns a value.
3582 Here is an example of how the @b{FOR} command could be
3583 implimented. The pseudo code below does not show error handling.
3585 void Execute_AsciiString( void *interp, const char *string );
3587 int Evaluate_AsciiExpression( void *interp, const char *string );
3590 MyForCommand( void *interp,
3595 SetResult( interp, "WRONG number of parameters");
3599 // argv[0] = the ascii string just like C
3601 // Execute the start statement.
3602 Execute_AsciiString( interp, argv[1] );
3606 i = Evaluate_AsciiExpression(interp, argv[2]);
3611 Execute_AsciiString( interp, argv[3] );
3613 // Execute the LOOP part
3614 Execute_AsciiString( interp, argv[4] );
3618 SetResult( interp, "" );
3623 Every other command IF, WHILE, FORMAT, PUTS, EXPR, everything works
3624 in the same basic way.
3626 @section OpenOCD TCL Usage
3628 @subsection source and find commands
3629 @b{Where:} In many configuration files
3630 @* Example: @b{ source [find FILENAME] }
3631 @*Remember the parsing rules
3633 @item The FIND command is in square brackets.
3634 @* The FIND command is executed with the parameter FILENAME. It should
3635 find the full path to the named file. The RESULT is a string, which is
3636 subsituted on the orginal command line.
3637 @item The command source is executed with the resulting filename.
3638 @* SOURCE reads a file and executes as a script.
3640 @subsection format command
3641 @b{Where:} Generally occurs in numerous places.
3642 @* TCL no command like @b{printf()}, intead it has @b{format}, which is really more like
3648 puts [format "The answer: %d" [expr $x * $y]]
3651 @item The SET command creates 2 variables, X and Y.
3652 @item The double [nested] EXPR command performs math
3653 @* The EXPR command produces numerical result as a string.
3655 @item The format command is executed, producing a single string
3656 @* Refer to Rule #1.
3657 @item The PUTS command outputs the text.
3659 @subsection Body Or Inlined Text
3660 @b{Where:} Various TARGET scripts.
3663 proc someproc @{@} @{
3664 ... multiple lines of stuff ...
3666 $_TARGETNAME configure -event FOO someproc
3667 #2 Good - no variables
3668 $_TARGETNAME confgure -event foo "this ; that;"
3669 #3 Good Curly Braces
3670 $_TARGETNAME configure -event FOO @{
3673 #4 DANGER DANGER DANGER
3674 $_TARGETNAME configure -event foo "puts \"Time: [date]\""
3677 @item The $_TARGETNAME is an OpenOCD variable convention.
3678 @*@b{$_TARGETNAME} represents the last target created, the value changes
3679 each time a new target is created. Remember the parsing rules. When
3680 the ascii text is parsed, the @b{$_TARGETNAME} becomes a simple string,
3681 the name of the target which happens to be a TARGET (object)
3683 @item The 2nd parameter to the @option{-event} parameter is a TCBODY
3684 @*There are 4 examples:
3686 @item The TCLBODY is a simple string that happens to be a proc name
3687 @item The TCLBODY is several simple commands semi-colon seperated
3688 @item The TCLBODY is a multi-line @{curly-brace@} quoted string
3689 @item The TCLBODY is a string with variables that get expanded.
3692 In the end, when the target event FOO occurs the TCLBODY is
3693 evaluated. Method @b{#1} and @b{#2} are functionally identical. For
3694 Method @b{#3} and @b{#4} it is more interesting. What is the TCLBODY?
3696 Remember the parsing rules. In case #3, @{curly-braces@} mean the
3697 $VARS and [square-brackets] are expanded later, when the EVENT occurs,
3698 and the text is evaluated. In case #4, they are replaced before the
3699 ``Target Object Command'' is executed. This occurs at the same time
3700 $_TARGETNAME is replaced. In case #4 the date will never
3701 change. @{BTW: [date] is perhaps a bad example, as of 28/nov/2008,
3702 Jim/OpenOCD does not have a date command@}
3704 @subsection Global Variables
3705 @b{Where:} You might discover this when writing your own procs @* In
3706 simple terms: Inside a PROC, if you need to access a global variable
3707 you must say so. Also see ``upvar''. Example:
3709 proc myproc @{ @} @{
3710 set y 0 #Local variable Y
3711 global x #Global variable X
3712 puts [format "X=%d, Y=%d" $x $y]
3715 @section Other Tcl Hacks
3716 @b{Dynamic Variable Creation}
3718 # Dynamically create a bunch of variables.
3719 for @{ set x 0 @} @{ $x < 32 @} @{ set x [expr $x + 1]@} @{
3721 set vn [format "BIT%d" $x]
3725 set $vn [expr (1 << $x)]
3728 @b{Dynamic Proc/Command Creation}
3730 # One "X" function - 5 uart functions.
3731 foreach who @{A B C D E@}
3732 proc [format "show_uart%c" $who] @{ @} "show_UARTx $who"
3736 @node Target library
3737 @chapter Target library
3738 @cindex Target library
3740 OpenOCD comes with a target configuration script library. These scripts can be
3741 used as-is or serve as a starting point.
3743 The target library is published together with the OpenOCD executable and
3744 the path to the target library is in the OpenOCD script search path.
3745 Similarly there are example scripts for configuring the JTAG interface.
3747 The command line below uses the example parport configuration scripts
3748 that ship with OpenOCD, then configures the str710.cfg target and
3749 finally issues the init and reset command. The communication speed
3750 is set to 10kHz for reset and 8MHz for post reset.
3754 openocd -f interface/parport.cfg -f target/str710.cfg -c "init" -c "reset"
3758 To list the target scripts available:
3761 $ ls /usr/local/lib/openocd/target
3763 arm7_fast.cfg lm3s6965.cfg pxa255.cfg stm32.cfg xba_revA3.cfg
3764 at91eb40a.cfg lpc2148.cfg pxa255_sst.cfg str710.cfg zy1000.cfg
3765 at91r40008.cfg lpc2294.cfg sam7s256.cfg str912.cfg
3766 at91sam9260.cfg nslu2.cfg sam7x256.cfg wi-9c.cfg
3774 @comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
3775 @comment case issue with ``Index.html'' and ``index.html''
3776 @comment Occurs when creating ``--html --no-split'' output
3777 @comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
3778 @unnumbered OpenOCD Index