4 * Synopsys DesignWare Cores (DWC) SATA host driver
6 * Author: Mark Miesfeld <mmiesfeld@amcc.com>
8 * Ported from 2.6.19.2 to 2.6.25/26 by Stefan Roese <sr@denx.de>
9 * Copyright 2008 DENX Software Engineering
11 * Based on versions provided by AMCC and Synopsys which are:
12 * Copyright 2006 Applied Micro Circuits Corporation
13 * COPYRIGHT (C) 2005 SYNOPSYS, INC. ALL RIGHTS RESERVED
15 * This program is free software; you can redistribute
16 * it and/or modify it under the terms of the GNU
17 * General Public License as published by the
18 * Free Software Foundation; either version 2 of the License,
19 * or (at your option) any later version.
23 * SATA support based on the chip canyonlands.
26 * The local version of this driver for the canyonlands board
27 * does not use interrupts but polls the chip instead.
33 #include <asm/processor.h>
34 #include <asm/errno.h>
38 #include <linux/ctype.h>
42 #define DMA_NUM_CHANS 1
43 #define DMA_NUM_CHAN_REGS 8
45 #define AHB_DMA_BRST_DFLT 16
52 struct dma_chan_regs {
59 struct dmareg sstatar;
60 struct dmareg dstatar;
66 struct dma_interrupt_regs {
69 struct dmareg srctran;
70 struct dmareg dsttran;
75 struct dma_chan_regs chan_regs[DMA_NUM_CHAN_REGS];
76 struct dma_interrupt_regs interrupt_raw;
77 struct dma_interrupt_regs interrupt_status;
78 struct dma_interrupt_regs interrupt_mask;
79 struct dma_interrupt_regs interrupt_clear;
80 struct dmareg statusInt;
81 struct dmareg rq_srcreg;
82 struct dmareg rq_dstreg;
83 struct dmareg rq_sgl_srcreg;
84 struct dmareg rq_sgl_dstreg;
85 struct dmareg rq_lst_srcreg;
86 struct dmareg rq_lst_dstreg;
87 struct dmareg dma_cfg;
88 struct dmareg dma_chan_en;
90 struct dmareg dma_test;
94 * Param 6 = dma_param[0], Param 5 = dma_param[1],
95 * Param 4 = dma_param[2] ...
97 struct dmareg dma_params[6];
100 #define DMA_EN 0x00000001
101 #define DMA_DI 0x00000000
102 #define DMA_CHANNEL(ch) (0x00000001 << (ch))
103 #define DMA_ENABLE_CHAN(ch) ((0x00000001 << (ch)) | \
104 ((0x000000001 << (ch)) << 8))
105 #define DMA_DISABLE_CHAN(ch) (0x00000000 | \
106 ((0x000000001 << (ch)) << 8))
108 #define SATA_DWC_MAX_PORTS 1
109 #define SATA_DWC_SCR_OFFSET 0x24
110 #define SATA_DWC_REG_OFFSET 0x64
112 struct sata_dwc_regs {
142 #define SATA_DWC_TXFIFO_DEPTH 0x01FF
143 #define SATA_DWC_RXFIFO_DEPTH 0x01FF
145 #define SATA_DWC_DBTSR_MWR(size) ((size / 4) & SATA_DWC_TXFIFO_DEPTH)
146 #define SATA_DWC_DBTSR_MRD(size) (((size / 4) & \
147 SATA_DWC_RXFIFO_DEPTH) << 16)
148 #define SATA_DWC_INTPR_DMAT 0x00000001
149 #define SATA_DWC_INTPR_NEWFP 0x00000002
150 #define SATA_DWC_INTPR_PMABRT 0x00000004
151 #define SATA_DWC_INTPR_ERR 0x00000008
152 #define SATA_DWC_INTPR_NEWBIST 0x00000010
153 #define SATA_DWC_INTPR_IPF 0x10000000
154 #define SATA_DWC_INTMR_DMATM 0x00000001
155 #define SATA_DWC_INTMR_NEWFPM 0x00000002
156 #define SATA_DWC_INTMR_PMABRTM 0x00000004
157 #define SATA_DWC_INTMR_ERRM 0x00000008
158 #define SATA_DWC_INTMR_NEWBISTM 0x00000010
160 #define SATA_DWC_DMACR_TMOD_TXCHEN 0x00000004
161 #define SATA_DWC_DMACR_TXRXCH_CLEAR SATA_DWC_DMACR_TMOD_TXCHEN
163 #define SATA_DWC_QCMD_MAX 32
165 #define SATA_DWC_SERROR_ERR_BITS 0x0FFF0F03
167 #define HSDEVP_FROM_AP(ap) (struct sata_dwc_device_port*) \
170 struct sata_dwc_device {
172 struct ata_probe_ent *pe;
173 struct ata_host *host;
175 struct sata_dwc_regs *sata_dwc_regs;
179 struct sata_dwc_device_port {
180 struct sata_dwc_device *hsdev;
181 int cmd_issued[SATA_DWC_QCMD_MAX];
182 u32 dma_chan[SATA_DWC_QCMD_MAX];
183 int dma_pending[SATA_DWC_QCMD_MAX];
187 SATA_DWC_CMD_ISSUED_NOT = 0,
188 SATA_DWC_CMD_ISSUED_PEND = 1,
189 SATA_DWC_CMD_ISSUED_EXEC = 2,
190 SATA_DWC_CMD_ISSUED_NODATA = 3,
192 SATA_DWC_DMA_PENDING_NONE = 0,
193 SATA_DWC_DMA_PENDING_TX = 1,
194 SATA_DWC_DMA_PENDING_RX = 2,
197 #define msleep(a) udelay(a * 1000)
198 #define ssleep(a) msleep(a * 1000)
200 static int ata_probe_timeout = (ATA_TMOUT_INTERNAL / 100);
202 enum sata_dev_state {
208 enum sata_dev_state dev_state = SATA_INIT;
210 static struct ahb_dma_regs *sata_dma_regs = 0;
211 static struct ata_host *phost;
212 static struct ata_port ap;
213 static struct ata_port *pap = ≈
214 static struct ata_device ata_device;
215 static struct sata_dwc_device_port dwc_devp;
217 static void *scr_addr_sstatus;
218 static u32 temp_n_block = 0;
220 static unsigned ata_exec_internal(struct ata_device *dev,
221 struct ata_taskfile *tf, const u8 *cdb,
222 int dma_dir, unsigned int buflen,
223 unsigned long timeout);
224 static unsigned int ata_dev_set_feature(struct ata_device *dev,
225 u8 enable,u8 feature);
226 static unsigned int ata_dev_init_params(struct ata_device *dev,
227 u16 heads, u16 sectors);
228 static u8 ata_irq_on(struct ata_port *ap);
229 static struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,
231 static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
232 u8 status, int in_wq);
233 static void ata_tf_to_host(struct ata_port *ap,
234 const struct ata_taskfile *tf);
235 static void ata_exec_command(struct ata_port *ap,
236 const struct ata_taskfile *tf);
237 static unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc);
238 static u8 ata_check_altstatus(struct ata_port *ap);
239 static u8 ata_check_status(struct ata_port *ap);
240 static void ata_dev_select(struct ata_port *ap, unsigned int device,
241 unsigned int wait, unsigned int can_sleep);
242 static void ata_qc_issue(struct ata_queued_cmd *qc);
243 static void ata_tf_load(struct ata_port *ap,
244 const struct ata_taskfile *tf);
245 static int ata_dev_read_sectors(unsigned char* pdata,
246 unsigned long datalen, u32 block, u32 n_block);
247 static int ata_dev_write_sectors(unsigned char* pdata,
248 unsigned long datalen , u32 block, u32 n_block);
249 static void ata_std_dev_select(struct ata_port *ap, unsigned int device);
250 static void ata_qc_complete(struct ata_queued_cmd *qc);
251 static void __ata_qc_complete(struct ata_queued_cmd *qc);
252 static void fill_result_tf(struct ata_queued_cmd *qc);
253 static void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf);
254 static void ata_mmio_data_xfer(struct ata_device *dev,
256 unsigned int buflen,int do_write);
257 static void ata_pio_task(struct ata_port *arg_ap);
258 static void __ata_port_freeze(struct ata_port *ap);
259 static int ata_port_freeze(struct ata_port *ap);
260 static void ata_qc_free(struct ata_queued_cmd *qc);
261 static void ata_pio_sectors(struct ata_queued_cmd *qc);
262 static void ata_pio_sector(struct ata_queued_cmd *qc);
263 static void ata_pio_queue_task(struct ata_port *ap,
264 void *data,unsigned long delay);
265 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq);
266 static int sata_dwc_softreset(struct ata_port *ap);
267 static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
268 unsigned int flags, u16 *id);
269 static int check_sata_dev_state(void);
271 extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
273 static const struct ata_port_info sata_dwc_port_info[] = {
275 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
276 ATA_FLAG_MMIO | ATA_FLAG_PIO_POLLING |
277 ATA_FLAG_SRST | ATA_FLAG_NCQ,
284 int init_sata(int dev)
286 struct sata_dwc_device hsdev;
287 struct ata_host host;
288 struct ata_port_info pi = sata_dwc_port_info[0];
289 struct ata_link *link;
290 struct sata_dwc_device_port hsdevp = dwc_devp;
292 u8 *sata_dma_regs_addr = 0;
294 unsigned long base_addr = 0;
301 base = (u8*)SATA_BASE_ADDR;
303 hsdev.sata_dwc_regs = (void *__iomem)(base + SATA_DWC_REG_OFFSET);
305 host.n_ports = SATA_DWC_MAX_PORTS;
307 for (i = 0; i < SATA_DWC_MAX_PORTS; i++) {
308 ap.pflags |= ATA_PFLAG_INITIALIZING;
309 ap.flags = ATA_FLAG_DISABLED;
311 ap.ctl = ATA_DEVCTL_OBS;
318 link->active_tag = ATA_TAG_POISON;
319 link->hw_sata_spd_limit = 0;
325 ap.pio_mask = pi.pio_mask;
326 ap.mwdma_mask = pi.mwdma_mask;
327 ap.udma_mask = pi.udma_mask;
328 ap.flags |= pi.flags;
329 ap.link.flags |= pi.link_flags;
331 host.ports[0]->ioaddr.cmd_addr = base;
332 host.ports[0]->ioaddr.scr_addr = base + SATA_DWC_SCR_OFFSET;
333 scr_addr_sstatus = base + SATA_DWC_SCR_OFFSET;
335 base_addr = (unsigned long)base;
337 host.ports[0]->ioaddr.cmd_addr = (void *)base_addr + 0x00;
338 host.ports[0]->ioaddr.data_addr = (void *)base_addr + 0x00;
340 host.ports[0]->ioaddr.error_addr = (void *)base_addr + 0x04;
341 host.ports[0]->ioaddr.feature_addr = (void *)base_addr + 0x04;
343 host.ports[0]->ioaddr.nsect_addr = (void *)base_addr + 0x08;
345 host.ports[0]->ioaddr.lbal_addr = (void *)base_addr + 0x0c;
346 host.ports[0]->ioaddr.lbam_addr = (void *)base_addr + 0x10;
347 host.ports[0]->ioaddr.lbah_addr = (void *)base_addr + 0x14;
349 host.ports[0]->ioaddr.device_addr = (void *)base_addr + 0x18;
350 host.ports[0]->ioaddr.command_addr = (void *)base_addr + 0x1c;
351 host.ports[0]->ioaddr.status_addr = (void *)base_addr + 0x1c;
353 host.ports[0]->ioaddr.altstatus_addr = (void *)base_addr + 0x20;
354 host.ports[0]->ioaddr.ctl_addr = (void *)base_addr + 0x20;
356 sata_dma_regs_addr = (u8*)SATA_DMA_REG_ADDR;
357 sata_dma_regs = (void *__iomem)sata_dma_regs_addr;
359 status = ata_check_altstatus(&ap);
361 if (status == 0x7f) {
362 printf("Hard Disk not found.\n");
363 dev_state = SATA_NODEVICE;
368 printf("Waiting for device...");
373 status = ata_check_altstatus(&ap);
375 if ((status & ATA_BUSY) == 0) {
381 if (i > (ATA_RESET_TIME * 100)) {
382 printf("** TimeOUT **\n");
384 dev_state = SATA_NODEVICE;
388 if ((i >= 100) && ((i % 100) == 0))
392 rc = sata_dwc_softreset(&ap);
395 printf("sata_dwc : error. soft reset failed\n");
399 for (chan = 0; chan < DMA_NUM_CHANS; chan++) {
400 out_le32(&(sata_dma_regs->interrupt_mask.error.low),
401 DMA_DISABLE_CHAN(chan));
403 out_le32(&(sata_dma_regs->interrupt_mask.tfr.low),
404 DMA_DISABLE_CHAN(chan));
407 out_le32(&(sata_dma_regs->dma_cfg.low), DMA_DI);
409 out_le32(&hsdev.sata_dwc_regs->intmr,
410 SATA_DWC_INTMR_ERRM |
411 SATA_DWC_INTMR_PMABRTM);
413 /* Unmask the error bits that should trigger
414 * an error interrupt by setting the error mask register.
416 out_le32(&hsdev.sata_dwc_regs->errmr, SATA_DWC_SERROR_ERR_BITS);
418 hsdev.host = ap.host;
419 memset(&hsdevp, 0, sizeof(hsdevp));
420 hsdevp.hsdev = &hsdev;
422 for (i = 0; i < SATA_DWC_QCMD_MAX; i++)
423 hsdevp.cmd_issued[i] = SATA_DWC_CMD_ISSUED_NOT;
425 out_le32((void __iomem *)scr_addr_sstatus + 4,
426 in_le32((void __iomem *)scr_addr_sstatus + 4));
432 static u8 ata_check_altstatus(struct ata_port *ap)
435 val = readb(ap->ioaddr.altstatus_addr);
439 static int sata_dwc_softreset(struct ata_port *ap)
443 struct ata_ioports *ioaddr = &ap->ioaddr;
445 in_le32((void *)ap->ioaddr.scr_addr + (SCR_ERROR * 4));
447 writeb(0x55, ioaddr->nsect_addr);
448 writeb(0xaa, ioaddr->lbal_addr);
449 writeb(0xaa, ioaddr->nsect_addr);
450 writeb(0x55, ioaddr->lbal_addr);
451 writeb(0x55, ioaddr->nsect_addr);
452 writeb(0xaa, ioaddr->lbal_addr);
454 nsect = readb(ioaddr->nsect_addr);
455 lbal = readb(ioaddr->lbal_addr);
457 if ((nsect == 0x55) && (lbal == 0xaa)) {
458 printf("Device found\n");
460 printf("No device found\n");
461 dev_state = SATA_NODEVICE;
465 tmp = ATA_DEVICE_OBS;
466 writeb(tmp, ioaddr->device_addr);
467 writeb(ap->ctl, ioaddr->ctl_addr);
471 writeb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
474 writeb(ap->ctl, ioaddr->ctl_addr);
477 ata_check_status(ap);
480 ata_check_status(ap);
483 u8 status = ata_check_status(ap);
485 if (!(status & ATA_BUSY))
488 printf("Hard Disk status is BUSY.\n");
492 tmp = ATA_DEVICE_OBS;
493 writeb(tmp, ioaddr->device_addr);
495 nsect = readb(ioaddr->nsect_addr);
496 lbal = readb(ioaddr->lbal_addr);
501 static u8 ata_check_status(struct ata_port *ap)
504 val = readb(ap->ioaddr.status_addr);
508 static int ata_id_has_hipm(const u16 *id)
512 if (val == 0 || val == 0xffff)
515 return val & (1 << 9);
518 static int ata_id_has_dipm(const u16 *id)
522 if (val == 0 || val == 0xffff)
525 return val & (1 << 3);
528 int scan_sata(int dev)
534 struct ata_device *ata_dev = &ata_device;
535 unsigned long pio_mask, mwdma_mask;
537 u16 iobuf[ATA_SECTOR_WORDS];
539 memset(iobuf, 0, sizeof(iobuf));
541 if (dev_state == SATA_NODEVICE)
544 printf("Waiting for device...");
549 status = ata_check_altstatus(&ap);
551 if ((status & ATA_BUSY) == 0) {
557 if (i > (ATA_RESET_TIME * 100)) {
558 printf("** TimeOUT **\n");
560 dev_state = SATA_NODEVICE;
563 if ((i >= 100) && ((i % 100) == 0))
569 rc = ata_dev_read_id(ata_dev, &ata_dev->class,
570 ATA_READID_POSTRESET,ata_dev->id);
572 printf("sata_dwc : error. failed sata scan\n");
576 /* SATA drives indicate we have a bridge. We don't know which
577 * end of the link the bridge is which is a problem
579 if (ata_id_is_sata(ata_dev->id))
580 ap.cbl = ATA_CBL_SATA;
584 ata_dev->flags &= ~ATA_DFLAG_CFG_MASK;
585 ata_dev->max_sectors = 0;
586 ata_dev->cdb_len = 0;
587 ata_dev->n_sectors = 0;
588 ata_dev->cylinders = 0;
590 ata_dev->sectors = 0;
592 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
593 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
597 /* If word 64 isn't valid then Word 51 high byte holds
598 * the PIO timing number for the maximum. Turn it into
601 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
603 pio_mask = (2 << mode) - 1;
609 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
611 if (ata_id_is_cfa(id)) {
612 int pio = id[163] & 0x7;
613 int dma = (id[163] >> 3) & 7;
616 pio_mask |= (1 << 5);
618 pio_mask |= (1 << 6);
620 mwdma_mask |= (1 << 3);
622 mwdma_mask |= (1 << 4);
625 if (ata_dev->class == ATA_DEV_ATA) {
626 if (ata_id_is_cfa(id)) {
628 printf("supports DRM functions and may "
629 "not be fully accessable.\n");
630 sprintf(revbuf, "%s", "CFA");
632 if (ata_id_has_tpm(id))
633 printf("supports DRM functions and may "
634 "not be fully accessable.\n");
637 ata_dev->n_sectors = ata_id_n_sectors((u16*)id);
639 if (ata_dev->id[59] & 0x100)
640 ata_dev->multi_count = ata_dev->id[59] & 0xff;
642 if (ata_id_has_lba(id)) {
645 ata_dev->flags |= ATA_DFLAG_LBA;
646 if (ata_id_has_lba48(id)) {
647 ata_dev->flags |= ATA_DFLAG_LBA48;
649 if (ata_dev->n_sectors >= (1UL << 28) &&
650 ata_id_has_flush_ext(id))
651 ata_dev->flags |= ATA_DFLAG_FLUSH_EXT;
653 if (!ata_id_has_ncq(ata_dev->id))
656 if (ata_dev->horkage & ATA_HORKAGE_NONCQ)
657 sprintf(ncq_desc, "%s", "NCQ (not used)");
659 if (ap.flags & ATA_FLAG_NCQ)
660 ata_dev->flags |= ATA_DFLAG_NCQ;
662 ata_dev->cdb_len = 16;
664 ata_dev->max_sectors = ATA_MAX_SECTORS;
665 if (ata_dev->flags & ATA_DFLAG_LBA48)
666 ata_dev->max_sectors = ATA_MAX_SECTORS_LBA48;
668 if (!(ata_dev->horkage & ATA_HORKAGE_IPM)) {
669 if (ata_id_has_hipm(ata_dev->id))
670 ata_dev->flags |= ATA_DFLAG_HIPM;
671 if (ata_id_has_dipm(ata_dev->id))
672 ata_dev->flags |= ATA_DFLAG_DIPM;
675 if ((ap.cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ata_dev->id))) {
676 ata_dev->udma_mask &= ATA_UDMA5;
677 ata_dev->max_sectors = ATA_MAX_SECTORS;
680 if (ata_dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
681 printf("Drive reports diagnostics failure."
682 "This may indicate a drive\n");
683 printf("fault or invalid emulation."
684 "Contact drive vendor for information.\n");
687 rc = check_sata_dev_state();
689 ata_id_c_string(ata_dev->id,
690 (unsigned char *)sata_dev_desc[dev].revision,
691 ATA_ID_FW_REV, sizeof(sata_dev_desc[dev].revision));
692 ata_id_c_string(ata_dev->id,
693 (unsigned char *)sata_dev_desc[dev].vendor,
694 ATA_ID_PROD, sizeof(sata_dev_desc[dev].vendor));
695 ata_id_c_string(ata_dev->id,
696 (unsigned char *)sata_dev_desc[dev].product,
697 ATA_ID_SERNO, sizeof(sata_dev_desc[dev].product));
699 sata_dev_desc[dev].lba = (u32) ata_dev->n_sectors;
702 if (ata_dev->id[83] & (1 << 10)) {
703 sata_dev_desc[dev].lba48 = 1;
705 sata_dev_desc[dev].lba48 = 0;
712 static u8 ata_busy_wait(struct ata_port *ap,
713 unsigned int bits,unsigned int max)
719 status = ata_check_status(ap);
721 } while (status != 0xff && (status & bits) && (max > 0));
726 static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
727 unsigned int flags, u16 *id)
729 struct ata_port *ap = pap;
730 unsigned int class = *p_class;
731 struct ata_taskfile tf;
732 unsigned int err_mask = 0;
734 int may_fallback = 1, tried_spinup = 0;
738 status = ata_busy_wait(ap, ATA_BUSY, 30000);
739 if (status & ATA_BUSY) {
740 printf("BSY = 0 check. timeout.\n");
745 ata_dev_select(ap, dev->devno, 1, 1);
748 memset(&tf, 0, sizeof(tf));
750 ap->flags &= ~ATA_FLAG_DISABLED;
752 tf.device = ATA_DEVICE_OBS;
753 tf.command = ATA_CMD_ID_ATA;
754 tf.protocol = ATA_PROT_PIO;
756 /* Some devices choke if TF registers contain garbage. Make
757 * sure those are properly initialized.
759 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
761 /* Device presence detection is unreliable on some
762 * controllers. Always poll IDENTIFY if available.
764 tf.flags |= ATA_TFLAG_POLLING;
768 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
769 sizeof(id[0]) * ATA_ID_WORDS, 0);
772 if (err_mask & AC_ERR_NODEV_HINT) {
773 printf("NODEV after polling detection\n");
777 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
778 /* Device or controller might have reported
779 * the wrong device class. Give a shot at the
780 * other IDENTIFY if the current one is
781 * aborted by the device.
786 if (class == ATA_DEV_ATA) {
787 class = ATA_DEV_ATAPI;
793 /* Control reaches here iff the device aborted
794 * both flavors of IDENTIFYs which happens
795 * sometimes with phantom devices.
797 printf("both IDENTIFYs aborted, assuming NODEV\n");
801 reason = "I/O error";
805 /* Falling back doesn't make sense if ID data was read
806 * successfully at least once.
812 for (id_cnt = 0; id_cnt < ATA_ID_WORDS; id_cnt++)
813 id[id_cnt] = le16_to_cpu(id[id_cnt]);
817 reason = "device reports invalid type";
819 if (class == ATA_DEV_ATA) {
820 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
823 if (ata_id_is_ata(id))
826 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
829 * Drive powered-up in standby mode, and requires a specific
830 * SET_FEATURES spin-up subcommand before it will accept
831 * anything other than the original IDENTIFY command.
833 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
834 if (err_mask && id[2] != 0x738c) {
836 reason = "SPINUP failed";
840 * If the drive initially returned incomplete IDENTIFY info,
841 * we now must reissue the IDENTIFY command.
847 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
849 * The exact sequence expected by certain pre-ATA4 drives is:
851 * IDENTIFY (optional in early ATA)
852 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
854 * Some drives were very specific about that exact sequence.
856 * Note that ATA4 says lba is mandatory so the second check
857 * shoud never trigger.
859 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
860 err_mask = ata_dev_init_params(dev, id[3], id[6]);
863 reason = "INIT_DEV_PARAMS failed";
867 /* current CHS translation info (id[53-58]) might be
868 * changed. reread the identify device info.
870 flags &= ~ATA_READID_POSTRESET;
879 printf("failed to READ ID (%s, err_mask=0x%x)\n", reason, err_mask);
883 static u8 ata_wait_idle(struct ata_port *ap)
885 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
889 static void ata_dev_select(struct ata_port *ap, unsigned int device,
890 unsigned int wait, unsigned int can_sleep)
895 ata_std_dev_select(ap, device);
901 static void ata_std_dev_select(struct ata_port *ap, unsigned int device)
906 tmp = ATA_DEVICE_OBS;
908 tmp = ATA_DEVICE_OBS | ATA_DEV1;
911 writeb(tmp, ap->ioaddr.device_addr);
913 readb(ap->ioaddr.altstatus_addr);
918 static int waiting_for_reg_state(volatile u8 *offset,
925 for (i = 0; i < timeout_msec; i++) {
926 status = readl(offset);
927 if ((status & sign) != 0)
932 return (i < timeout_msec) ? 0 : -1;
935 static void ata_qc_reinit(struct ata_queued_cmd *qc)
937 qc->dma_dir = DMA_NONE;
939 qc->nbytes = qc->extrabytes = qc->curbytes = 0;
942 qc->sect_size = ATA_SECT_SIZE;
943 qc->nbytes = ATA_SECT_SIZE * temp_n_block;
945 memset(&qc->tf, 0, sizeof(qc->tf));
947 qc->tf.device = ATA_DEVICE_OBS;
949 qc->result_tf.command = ATA_DRDY;
950 qc->result_tf.feature = 0;
953 struct ata_queued_cmd *__ata_qc_from_tag(struct ata_port *ap,
956 if (tag < ATA_MAX_QUEUE)
957 return &ap->qcmd[tag];
961 static void __ata_port_freeze(struct ata_port *ap)
963 printf("set port freeze.\n");
964 ap->pflags |= ATA_PFLAG_FROZEN;
967 static int ata_port_freeze(struct ata_port *ap)
969 __ata_port_freeze(ap);
973 unsigned ata_exec_internal(struct ata_device *dev,
974 struct ata_taskfile *tf, const u8 *cdb,
975 int dma_dir, unsigned int buflen,
976 unsigned long timeout)
978 struct ata_link *link = dev->link;
979 struct ata_port *ap = pap;
980 struct ata_queued_cmd *qc;
981 unsigned int tag, preempted_tag;
982 u32 preempted_sactive, preempted_qc_active;
983 int preempted_nr_active_links;
984 unsigned int err_mask;
988 status = ata_busy_wait(ap, ATA_BUSY, 300000);
989 if (status & ATA_BUSY) {
990 printf("BSY = 0 check. timeout.\n");
995 if (ap->pflags & ATA_PFLAG_FROZEN)
996 return AC_ERR_SYSTEM;
998 tag = ATA_TAG_INTERNAL;
1000 if (test_and_set_bit(tag, &ap->qc_allocated)) {
1005 qc = __ata_qc_from_tag(ap, tag);
1012 preempted_tag = link->active_tag;
1013 preempted_sactive = link->sactive;
1014 preempted_qc_active = ap->qc_active;
1015 preempted_nr_active_links = ap->nr_active_links;
1016 link->active_tag = ATA_TAG_POISON;
1019 ap->nr_active_links = 0;
1023 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1024 qc->flags |= ATA_QCFLAG_RESULT_TF;
1025 qc->dma_dir = dma_dir;
1026 qc->private_data = 0;
1031 timeout = ata_probe_timeout * 1000 / HZ;
1033 status = ata_busy_wait(ap, ATA_BUSY, 30000);
1034 if (status & ATA_BUSY) {
1035 printf("BSY = 0 check. timeout.\n");
1036 printf("altstatus = 0x%x.\n", status);
1037 qc->err_mask |= AC_ERR_OTHER;
1038 return qc->err_mask;
1041 if (waiting_for_reg_state(ap->ioaddr.altstatus_addr, 1000, 0x8)) {
1045 status = readb(ap->ioaddr.altstatus_addr);
1046 if ((status & 0x01) != 0) {
1047 errorStatus = readb(ap->ioaddr.feature_addr);
1048 if (errorStatus == 0x04 &&
1049 qc->tf.command == ATA_CMD_PIO_READ_EXT){
1050 printf("Hard Disk doesn't support LBA48\n");
1051 dev_state = SATA_ERROR;
1052 qc->err_mask |= AC_ERR_OTHER;
1053 return qc->err_mask;
1056 qc->err_mask |= AC_ERR_OTHER;
1057 return qc->err_mask;
1060 status = ata_busy_wait(ap, ATA_BUSY, 10);
1061 if (status & ATA_BUSY) {
1062 printf("BSY = 0 check. timeout.\n");
1063 qc->err_mask |= AC_ERR_OTHER;
1064 return qc->err_mask;
1070 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1071 qc->err_mask |= AC_ERR_TIMEOUT;
1072 ata_port_freeze(ap);
1076 if (qc->flags & ATA_QCFLAG_FAILED) {
1077 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1078 qc->err_mask |= AC_ERR_DEV;
1081 qc->err_mask |= AC_ERR_OTHER;
1083 if (qc->err_mask & ~AC_ERR_OTHER)
1084 qc->err_mask &= ~AC_ERR_OTHER;
1087 *tf = qc->result_tf;
1088 err_mask = qc->err_mask;
1090 link->active_tag = preempted_tag;
1091 link->sactive = preempted_sactive;
1092 ap->qc_active = preempted_qc_active;
1093 ap->nr_active_links = preempted_nr_active_links;
1095 if (ap->flags & ATA_FLAG_DISABLED) {
1096 err_mask |= AC_ERR_SYSTEM;
1097 ap->flags &= ~ATA_FLAG_DISABLED;
1103 static void ata_qc_issue(struct ata_queued_cmd *qc)
1105 struct ata_port *ap = qc->ap;
1106 struct ata_link *link = qc->dev->link;
1107 u8 prot = qc->tf.protocol;
1109 if (ata_is_ncq(prot)) {
1111 ap->nr_active_links++;
1112 link->sactive |= 1 << qc->tag;
1114 ap->nr_active_links++;
1115 link->active_tag = qc->tag;
1118 qc->flags |= ATA_QCFLAG_ACTIVE;
1119 ap->qc_active |= 1 << qc->tag;
1121 if (qc->dev->flags & ATA_DFLAG_SLEEPING) {
1126 qc->err_mask |= ata_qc_issue_prot(qc);
1132 ata_qc_complete(qc);
1135 static unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1137 struct ata_port *ap = qc->ap;
1139 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1140 switch (qc->tf.protocol) {
1142 case ATA_PROT_NODATA:
1143 case ATAPI_PROT_PIO:
1144 case ATAPI_PROT_NODATA:
1145 qc->tf.flags |= ATA_TFLAG_POLLING;
1152 ata_dev_select(ap, qc->dev->devno, 1, 0);
1154 switch (qc->tf.protocol) {
1156 if (qc->tf.flags & ATA_TFLAG_POLLING)
1157 qc->tf.ctl |= ATA_NIEN;
1159 ata_tf_to_host(ap, &qc->tf);
1161 ap->hsm_task_state = HSM_ST;
1163 if (qc->tf.flags & ATA_TFLAG_POLLING)
1164 ata_pio_queue_task(ap, qc, 0);
1169 return AC_ERR_SYSTEM;
1175 static void ata_tf_to_host(struct ata_port *ap,
1176 const struct ata_taskfile *tf)
1178 ata_tf_load(ap, tf);
1179 ata_exec_command(ap, tf);
1182 static void ata_tf_load(struct ata_port *ap,
1183 const struct ata_taskfile *tf)
1185 struct ata_ioports *ioaddr = &ap->ioaddr;
1186 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
1188 if (tf->ctl != ap->last_ctl) {
1189 if (ioaddr->ctl_addr)
1190 writeb(tf->ctl, ioaddr->ctl_addr);
1191 ap->last_ctl = tf->ctl;
1195 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
1196 writeb(tf->hob_feature, ioaddr->feature_addr);
1197 writeb(tf->hob_nsect, ioaddr->nsect_addr);
1198 writeb(tf->hob_lbal, ioaddr->lbal_addr);
1199 writeb(tf->hob_lbam, ioaddr->lbam_addr);
1200 writeb(tf->hob_lbah, ioaddr->lbah_addr);
1204 writeb(tf->feature, ioaddr->feature_addr);
1205 writeb(tf->nsect, ioaddr->nsect_addr);
1206 writeb(tf->lbal, ioaddr->lbal_addr);
1207 writeb(tf->lbam, ioaddr->lbam_addr);
1208 writeb(tf->lbah, ioaddr->lbah_addr);
1211 if (tf->flags & ATA_TFLAG_DEVICE)
1212 writeb(tf->device, ioaddr->device_addr);
1217 static void ata_exec_command(struct ata_port *ap,
1218 const struct ata_taskfile *tf)
1220 writeb(tf->command, ap->ioaddr.command_addr);
1222 readb(ap->ioaddr.altstatus_addr);
1227 static void ata_pio_queue_task(struct ata_port *ap,
1228 void *data,unsigned long delay)
1230 ap->port_task_data = data;
1233 static unsigned int ac_err_mask(u8 status)
1235 if (status & (ATA_BUSY | ATA_DRQ))
1237 if (status & (ATA_ERR | ATA_DF))
1242 static unsigned int __ac_err_mask(u8 status)
1244 unsigned int mask = ac_err_mask(status);
1246 return AC_ERR_OTHER;
1250 static void ata_pio_task(struct ata_port *arg_ap)
1252 struct ata_port *ap = arg_ap;
1253 struct ata_queued_cmd *qc = ap->port_task_data;
1259 * This is purely heuristic. This is a fast path.
1260 * Sometimes when we enter, BSY will be cleared in
1261 * a chk-status or two. If not, the drive is probably seeking
1262 * or something. Snooze for a couple msecs, then
1263 * chk-status again. If still busy, queue delayed work.
1265 status = ata_busy_wait(ap, ATA_BUSY, 5);
1266 if (status & ATA_BUSY) {
1268 status = ata_busy_wait(ap, ATA_BUSY, 10);
1269 if (status & ATA_BUSY) {
1270 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1275 poll_next = ata_hsm_move(ap, qc, status, 1);
1277 /* another command or interrupt handler
1278 * may be running at this point.
1284 static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1285 u8 status, int in_wq)
1290 switch (ap->hsm_task_state) {
1292 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1294 if ((status & ATA_DRQ) == 0) {
1295 if (status & (ATA_ERR | ATA_DF)) {
1296 qc->err_mask |= AC_ERR_DEV;
1298 qc->err_mask |= AC_ERR_HSM;
1300 ap->hsm_task_state = HSM_ST_ERR;
1304 /* Device should not ask for data transfer (DRQ=1)
1305 * when it finds something wrong.
1306 * We ignore DRQ here and stop the HSM by
1307 * changing hsm_task_state to HSM_ST_ERR and
1308 * let the EH abort the command or reset the device.
1310 if (status & (ATA_ERR | ATA_DF)) {
1311 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
1312 printf("DRQ=1 with device error, "
1313 "dev_stat 0x%X\n", status);
1314 qc->err_mask |= AC_ERR_HSM;
1315 ap->hsm_task_state = HSM_ST_ERR;
1320 if (qc->tf.protocol == ATA_PROT_PIO) {
1321 /* PIO data out protocol.
1322 * send first data block.
1324 /* ata_pio_sectors() might change the state
1325 * to HSM_ST_LAST. so, the state is changed here
1326 * before ata_pio_sectors().
1328 ap->hsm_task_state = HSM_ST;
1329 ata_pio_sectors(qc);
1331 printf("protocol is not ATA_PROT_PIO \n");
1336 if ((status & ATA_DRQ) == 0) {
1337 if (status & (ATA_ERR | ATA_DF)) {
1338 qc->err_mask |= AC_ERR_DEV;
1340 /* HSM violation. Let EH handle this.
1341 * Phantom devices also trigger this
1342 * condition. Mark hint.
1344 qc->err_mask |= AC_ERR_HSM | AC_ERR_NODEV_HINT;
1347 ap->hsm_task_state = HSM_ST_ERR;
1350 /* For PIO reads, some devices may ask for
1351 * data transfer (DRQ=1) alone with ERR=1.
1352 * We respect DRQ here and transfer one
1353 * block of junk data before changing the
1354 * hsm_task_state to HSM_ST_ERR.
1356 * For PIO writes, ERR=1 DRQ=1 doesn't make
1357 * sense since the data block has been
1358 * transferred to the device.
1360 if (status & (ATA_ERR | ATA_DF)) {
1361 qc->err_mask |= AC_ERR_DEV;
1363 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1364 ata_pio_sectors(qc);
1365 status = ata_wait_idle(ap);
1368 if (status & (ATA_BUSY | ATA_DRQ))
1369 qc->err_mask |= AC_ERR_HSM;
1371 /* ata_pio_sectors() might change the
1372 * state to HSM_ST_LAST. so, the state
1373 * is changed after ata_pio_sectors().
1375 ap->hsm_task_state = HSM_ST_ERR;
1379 ata_pio_sectors(qc);
1380 if (ap->hsm_task_state == HSM_ST_LAST &&
1381 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1382 status = ata_wait_idle(ap);
1390 if (!ata_ok(status)) {
1391 qc->err_mask |= __ac_err_mask(status);
1392 ap->hsm_task_state = HSM_ST_ERR;
1396 ap->hsm_task_state = HSM_ST_IDLE;
1398 ata_hsm_qc_complete(qc, in_wq);
1404 /* make sure qc->err_mask is available to
1405 * know what's wrong and recover
1407 ap->hsm_task_state = HSM_ST_IDLE;
1409 ata_hsm_qc_complete(qc, in_wq);
1420 static void ata_pio_sectors(struct ata_queued_cmd *qc)
1422 struct ata_port *ap;
1424 qc->pdata = ap->pdata;
1428 readb(qc->ap->ioaddr.altstatus_addr);
1432 static void ata_pio_sector(struct ata_queued_cmd *qc)
1434 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
1435 struct ata_port *ap = qc->ap;
1436 unsigned int offset;
1438 char temp_data_buf[512];
1440 if (qc->curbytes == qc->nbytes - qc->sect_size)
1441 ap->hsm_task_state = HSM_ST_LAST;
1443 offset = qc->curbytes;
1445 switch (qc->tf.command) {
1446 case ATA_CMD_ID_ATA:
1447 buf = (unsigned char *)&ata_device.id[0];
1449 case ATA_CMD_PIO_READ_EXT:
1450 case ATA_CMD_PIO_READ:
1451 case ATA_CMD_PIO_WRITE_EXT:
1452 case ATA_CMD_PIO_WRITE:
1453 buf = qc->pdata + offset;
1456 buf = (unsigned char *)&temp_data_buf[0];
1459 ata_mmio_data_xfer(qc->dev, buf, qc->sect_size, do_write);
1461 qc->curbytes += qc->sect_size;
1465 static void ata_mmio_data_xfer(struct ata_device *dev, unsigned char *buf,
1466 unsigned int buflen, int do_write)
1468 struct ata_port *ap = pap;
1469 void __iomem *data_addr = ap->ioaddr.data_addr;
1470 unsigned int words = buflen >> 1;
1471 u16 *buf16 = (u16 *)buf;
1476 for (i = 0; i < words; i++)
1477 writew(le16_to_cpu(buf16[i]), data_addr);
1479 for (i = 0; i < words; i++)
1480 buf16[i] = cpu_to_le16(readw(data_addr));
1483 if (buflen & 0x01) {
1484 __le16 align_buf[1] = { 0 };
1485 unsigned char *trailing_buf = buf + buflen - 1;
1488 memcpy(align_buf, trailing_buf, 1);
1489 writew(le16_to_cpu(align_buf[0]), data_addr);
1491 align_buf[0] = cpu_to_le16(readw(data_addr));
1492 memcpy(trailing_buf, align_buf, 1);
1497 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
1499 struct ata_port *ap = qc->ap;
1502 /* EH might have kicked in while host lock is
1505 qc = &ap->qcmd[qc->tag];
1507 if (!(qc->err_mask & AC_ERR_HSM)) {
1509 ata_qc_complete(qc);
1511 ata_port_freeze(ap);
1515 if (!(qc->err_mask & AC_ERR_HSM)) {
1516 ata_qc_complete(qc);
1518 ata_port_freeze(ap);
1523 static u8 ata_irq_on(struct ata_port *ap)
1525 struct ata_ioports *ioaddr = &ap->ioaddr;
1528 ap->ctl &= ~ATA_NIEN;
1529 ap->last_ctl = ap->ctl;
1531 if (ioaddr->ctl_addr)
1532 writeb(ap->ctl, ioaddr->ctl_addr);
1534 tmp = ata_wait_idle(ap);
1539 static unsigned int ata_tag_internal(unsigned int tag)
1541 return tag == ATA_MAX_QUEUE - 1;
1544 static void ata_qc_complete(struct ata_queued_cmd *qc)
1546 struct ata_device *dev = qc->dev;
1548 qc->flags |= ATA_QCFLAG_FAILED;
1550 if (qc->flags & ATA_QCFLAG_FAILED) {
1551 if (!ata_tag_internal(qc->tag)) {
1556 if (qc->flags & ATA_QCFLAG_RESULT_TF)
1559 /* Some commands need post-processing after successful
1562 switch (qc->tf.command) {
1563 case ATA_CMD_SET_FEATURES:
1564 if (qc->tf.feature != SETFEATURES_WC_ON &&
1565 qc->tf.feature != SETFEATURES_WC_OFF)
1567 case ATA_CMD_INIT_DEV_PARAMS:
1568 case ATA_CMD_SET_MULTI:
1572 dev->flags |= ATA_DFLAG_SLEEPING;
1576 __ata_qc_complete(qc);
1579 static void fill_result_tf(struct ata_queued_cmd *qc)
1581 struct ata_port *ap = qc->ap;
1583 qc->result_tf.flags = qc->tf.flags;
1584 ata_tf_read(ap, &qc->result_tf);
1587 static void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
1589 struct ata_ioports *ioaddr = &ap->ioaddr;
1591 tf->command = ata_check_status(ap);
1592 tf->feature = readb(ioaddr->error_addr);
1593 tf->nsect = readb(ioaddr->nsect_addr);
1594 tf->lbal = readb(ioaddr->lbal_addr);
1595 tf->lbam = readb(ioaddr->lbam_addr);
1596 tf->lbah = readb(ioaddr->lbah_addr);
1597 tf->device = readb(ioaddr->device_addr);
1599 if (tf->flags & ATA_TFLAG_LBA48) {
1600 if (ioaddr->ctl_addr) {
1601 writeb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
1603 tf->hob_feature = readb(ioaddr->error_addr);
1604 tf->hob_nsect = readb(ioaddr->nsect_addr);
1605 tf->hob_lbal = readb(ioaddr->lbal_addr);
1606 tf->hob_lbam = readb(ioaddr->lbam_addr);
1607 tf->hob_lbah = readb(ioaddr->lbah_addr);
1609 writeb(tf->ctl, ioaddr->ctl_addr);
1610 ap->last_ctl = tf->ctl;
1612 printf("sata_dwc warnning register read.\n");
1617 static void __ata_qc_complete(struct ata_queued_cmd *qc)
1619 struct ata_port *ap = qc->ap;
1620 struct ata_link *link = qc->dev->link;
1622 link->active_tag = ATA_TAG_POISON;
1623 ap->nr_active_links--;
1625 if (qc->flags & ATA_QCFLAG_CLEAR_EXCL && ap->excl_link == link)
1626 ap->excl_link = NULL;
1628 qc->flags &= ~ATA_QCFLAG_ACTIVE;
1629 ap->qc_active &= ~(1 << qc->tag);
1632 static void ata_qc_free(struct ata_queued_cmd *qc)
1634 struct ata_port *ap = qc->ap;
1638 if (tag < ATA_MAX_QUEUE) {
1639 qc->tag = ATA_TAG_POISON;
1640 clear_bit(tag, &ap->qc_allocated);
1644 static int check_sata_dev_state(void)
1646 unsigned long datalen;
1647 unsigned char *pdata;
1650 char temp_data_buf[512];
1655 pdata = (unsigned char*)&temp_data_buf[0];
1658 ret = ata_dev_read_sectors(pdata, datalen, 0, 1);
1664 if (i > (ATA_RESET_TIME * 100)) {
1665 printf("** TimeOUT **\n");
1666 dev_state = SATA_NODEVICE;
1670 if ((i >= 100) && ((i % 100) == 0))
1674 dev_state = SATA_READY;
1679 static unsigned int ata_dev_set_feature(struct ata_device *dev,
1680 u8 enable, u8 feature)
1682 struct ata_taskfile tf;
1683 struct ata_port *ap;
1685 unsigned int err_mask;
1687 memset(&tf, 0, sizeof(tf));
1690 tf.device = ATA_DEVICE_OBS;
1691 tf.command = ATA_CMD_SET_FEATURES;
1692 tf.feature = enable;
1693 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1694 tf.protocol = ATA_PROT_NODATA;
1697 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, 0, 0);
1702 static unsigned int ata_dev_init_params(struct ata_device *dev,
1703 u16 heads, u16 sectors)
1705 struct ata_taskfile tf;
1706 struct ata_port *ap;
1708 unsigned int err_mask;
1710 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
1711 return AC_ERR_INVALID;
1713 memset(&tf, 0, sizeof(tf));
1715 tf.device = ATA_DEVICE_OBS;
1716 tf.command = ATA_CMD_INIT_DEV_PARAMS;
1717 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1718 tf.protocol = ATA_PROT_NODATA;
1720 tf.device |= (heads - 1) & 0x0f;
1722 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, 0, 0);
1724 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1730 #if defined(CONFIG_SATA_DWC) && !defined(CONFIG_LBA48)
1731 #define SATA_MAX_READ_BLK 0xFF
1733 #define SATA_MAX_READ_BLK 0xFFFF
1736 ulong sata_read(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
1738 ulong start,blks, buf_addr;
1739 unsigned short smallblks;
1740 unsigned long datalen;
1741 unsigned char *pdata;
1747 if (dev_state != SATA_READY)
1750 buf_addr = (unsigned long)buffer;
1754 pdata = (unsigned char *)buf_addr;
1755 if (blks > SATA_MAX_READ_BLK) {
1756 datalen = sata_dev_desc[device].blksz * SATA_MAX_READ_BLK;
1757 smallblks = SATA_MAX_READ_BLK;
1760 n_block = (u32)smallblks;
1762 start += SATA_MAX_READ_BLK;
1763 blks -= SATA_MAX_READ_BLK;
1765 datalen = sata_dev_desc[device].blksz * SATA_MAX_READ_BLK;
1766 datalen = sata_dev_desc[device].blksz * blks;
1767 smallblks = (unsigned short)blks;
1770 n_block = (u32)smallblks;
1776 if (ata_dev_read_sectors(pdata, datalen, block, n_block) != TRUE) {
1777 printf("sata_dwc : Hard disk read error.\n");
1781 buf_addr += datalen;
1782 } while (blks != 0);
1787 static int ata_dev_read_sectors(unsigned char *pdata, unsigned long datalen,
1788 u32 block, u32 n_block)
1790 struct ata_port *ap = pap;
1791 struct ata_device *dev = &ata_device;
1792 struct ata_taskfile tf;
1793 unsigned int class = ATA_DEV_ATA;
1794 unsigned int err_mask = 0;
1796 int may_fallback = 1;
1798 if (dev_state == SATA_ERROR)
1801 ata_dev_select(ap, dev->devno, 1, 1);
1804 memset(&tf, 0, sizeof(tf));
1807 ap->flags &= ~ATA_FLAG_DISABLED;
1811 tf.device = ATA_DEVICE_OBS;
1813 temp_n_block = n_block;
1816 tf.command = ATA_CMD_PIO_READ_EXT;
1817 tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
1819 tf.hob_feature = 31;
1821 tf.hob_nsect = (n_block >> 8) & 0xff;
1822 tf.nsect = n_block & 0xff;
1826 tf.hob_lbal = (block >> 24) & 0xff;
1827 tf.lbah = (block >> 16) & 0xff;
1828 tf.lbam = (block >> 8) & 0xff;
1829 tf.lbal = block & 0xff;
1832 if (tf.flags & ATA_TFLAG_FUA)
1833 tf.device |= 1 << 7;
1835 tf.command = ATA_CMD_PIO_READ;
1836 tf.flags |= ATA_TFLAG_LBA ;
1839 tf.nsect = n_block & 0xff;
1841 tf.lbah = (block >> 16) & 0xff;
1842 tf.lbam = (block >> 8) & 0xff;
1843 tf.lbal = block & 0xff;
1845 tf.device = (block >> 24) & 0xf;
1847 tf.device |= 1 << 6;
1848 if (tf.flags & ATA_TFLAG_FUA)
1849 tf.device |= 1 << 7;
1853 tf.protocol = ATA_PROT_PIO;
1855 /* Some devices choke if TF registers contain garbage. Make
1856 * sure those are properly initialized.
1858 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1859 tf.flags |= ATA_TFLAG_POLLING;
1861 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 0, 0);
1864 if (err_mask & AC_ERR_NODEV_HINT) {
1865 printf("READ_SECTORS NODEV after polling detection\n");
1869 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1870 /* Device or controller might have reported
1871 * the wrong device class. Give a shot at the
1872 * other IDENTIFY if the current one is
1873 * aborted by the device.
1878 if (class == ATA_DEV_ATA) {
1879 class = ATA_DEV_ATAPI;
1881 class = ATA_DEV_ATA;
1885 /* Control reaches here iff the device aborted
1886 * both flavors of IDENTIFYs which happens
1887 * sometimes with phantom devices.
1889 printf("both IDENTIFYs aborted, assuming NODEV\n");
1893 reason = "I/O error";
1900 printf("failed to READ SECTORS (%s, err_mask=0x%x)\n", reason, err_mask);
1904 #if defined(CONFIG_SATA_DWC) && !defined(CONFIG_LBA48)
1905 #define SATA_MAX_WRITE_BLK 0xFF
1907 #define SATA_MAX_WRITE_BLK 0xFFFF
1910 ulong sata_write(int device, ulong blknr, lbaint_t blkcnt, void *buffer)
1912 ulong start,blks, buf_addr;
1913 unsigned short smallblks;
1914 unsigned long datalen;
1915 unsigned char *pdata;
1922 if (dev_state != SATA_READY)
1925 buf_addr = (unsigned long)buffer;
1929 pdata = (unsigned char *)buf_addr;
1930 if (blks > SATA_MAX_WRITE_BLK) {
1931 datalen = sata_dev_desc[device].blksz * SATA_MAX_WRITE_BLK;
1932 smallblks = SATA_MAX_WRITE_BLK;
1935 n_block = (u32)smallblks;
1937 start += SATA_MAX_WRITE_BLK;
1938 blks -= SATA_MAX_WRITE_BLK;
1940 datalen = sata_dev_desc[device].blksz * blks;
1941 smallblks = (unsigned short)blks;
1944 n_block = (u32)smallblks;
1950 if (ata_dev_write_sectors(pdata, datalen, block, n_block) != TRUE) {
1951 printf("sata_dwc : Hard disk read error.\n");
1955 buf_addr += datalen;
1956 } while (blks != 0);
1961 static int ata_dev_write_sectors(unsigned char* pdata, unsigned long datalen,
1962 u32 block, u32 n_block)
1964 struct ata_port *ap = pap;
1965 struct ata_device *dev = &ata_device;
1966 struct ata_taskfile tf;
1967 unsigned int class = ATA_DEV_ATA;
1968 unsigned int err_mask = 0;
1970 int may_fallback = 1;
1972 if (dev_state == SATA_ERROR)
1975 ata_dev_select(ap, dev->devno, 1, 1);
1978 memset(&tf, 0, sizeof(tf));
1981 ap->flags &= ~ATA_FLAG_DISABLED;
1985 tf.device = ATA_DEVICE_OBS;
1987 temp_n_block = n_block;
1991 tf.command = ATA_CMD_PIO_WRITE_EXT;
1992 tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48 | ATA_TFLAG_WRITE;
1994 tf.hob_feature = 31;
1996 tf.hob_nsect = (n_block >> 8) & 0xff;
1997 tf.nsect = n_block & 0xff;
2001 tf.hob_lbal = (block >> 24) & 0xff;
2002 tf.lbah = (block >> 16) & 0xff;
2003 tf.lbam = (block >> 8) & 0xff;
2004 tf.lbal = block & 0xff;
2007 if (tf.flags & ATA_TFLAG_FUA)
2008 tf.device |= 1 << 7;
2010 tf.command = ATA_CMD_PIO_WRITE;
2011 tf.flags |= ATA_TFLAG_LBA | ATA_TFLAG_WRITE;
2014 tf.nsect = n_block & 0xff;
2016 tf.lbah = (block >> 16) & 0xff;
2017 tf.lbam = (block >> 8) & 0xff;
2018 tf.lbal = block & 0xff;
2020 tf.device = (block >> 24) & 0xf;
2022 tf.device |= 1 << 6;
2023 if (tf.flags & ATA_TFLAG_FUA)
2024 tf.device |= 1 << 7;
2028 tf.protocol = ATA_PROT_PIO;
2030 /* Some devices choke if TF registers contain garbage. Make
2031 * sure those are properly initialized.
2033 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2034 tf.flags |= ATA_TFLAG_POLLING;
2036 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, 0, 0);
2039 if (err_mask & AC_ERR_NODEV_HINT) {
2040 printf("READ_SECTORS NODEV after polling detection\n");
2044 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
2045 /* Device or controller might have reported
2046 * the wrong device class. Give a shot at the
2047 * other IDENTIFY if the current one is
2048 * aborted by the device.
2053 if (class == ATA_DEV_ATA) {
2054 class = ATA_DEV_ATAPI;
2056 class = ATA_DEV_ATA;
2060 /* Control reaches here iff the device aborted
2061 * both flavors of IDENTIFYs which happens
2062 * sometimes with phantom devices.
2064 printf("both IDENTIFYs aborted, assuming NODEV\n");
2068 reason = "I/O error";
2075 printf("failed to WRITE SECTORS (%s, err_mask=0x%x)\n", reason, err_mask);