3 * Gary Jennejohn, DENX Software Engineering, garyj@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
7 /* sil680.c - ide support functions for the Sil0680A controller */
10 * The following parameters must be defined in the configuration file
11 * of the target board:
13 * #define CONFIG_IDE_SIL680
15 * #define CONFIG_PCI_PNP
16 * NOTE it may also be necessary to define this if the default of 8 is
17 * incorrect for the target board (e.g. the sequoia board requires 0).
18 * #define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0
21 * #undef CONFIG_IDE_LED
22 * #undef CONFIG_IDE_RESET
23 * #define CONFIG_IDE_PREINIT
24 * #define CONFIG_SYS_IDE_MAXBUS 2 - modify to suit
25 * #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS*2) - modify to suit
26 * #define CONFIG_SYS_ATA_BASE_ADDR 0
27 * #define CONFIG_SYS_ATA_IDE0_OFFSET 0
28 * #define CONFIG_SYS_ATA_IDE1_OFFSET 0
29 * #define CONFIG_SYS_ATA_DATA_OFFSET 0
30 * #define CONFIG_SYS_ATA_REG_OFFSET 0
31 * #define CONFIG_SYS_ATA_ALT_OFFSET 0x0004
33 * The mapping for PCI IO-space.
34 * NOTE this is the value for the sequoia board. Modify to suit.
35 * #define CONFIG_SYS_PCI0_IO_SPACE 0xE8000000
43 extern ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS];
45 int ide_preinit (void)
52 for (l = 0; l < CONFIG_SYS_IDE_MAXBUS; l++) {
53 ide_bus_offset[l] = -ATA_STATUS;
55 devbusfn = pci_find_device (0x1095, 0x0680, 0);
59 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
60 (u32 *) &ide_bus_offset[0]);
61 ide_bus_offset[0] &= 0xfffffff8;
62 ide_bus_offset[0] += CONFIG_SYS_PCI0_IO_SPACE;
63 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
64 (u32 *) &ide_bus_offset[1]);
65 ide_bus_offset[1] &= 0xfffffff8;
66 ide_bus_offset[1] += CONFIG_SYS_PCI0_IO_SPACE;
67 /* init various things - taken from the Linux driver */
69 pci_write_config_byte(devbusfn, 0x80, 0x00);
70 pci_write_config_byte(devbusfn, 0x84, 0x00);
72 pci_write_config_byte(devbusfn, 0xA1, 0x02);
73 pci_write_config_word(devbusfn, 0xA2, 0x328A);
74 pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD);
75 pci_write_config_dword(devbusfn, 0xA8, 0x43924392);
76 pci_write_config_dword(devbusfn, 0xAC, 0x40094009);
78 pci_write_config_byte(devbusfn, 0xB1, 0x02);
79 pci_write_config_word(devbusfn, 0xB2, 0x328A);
80 pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD);
81 pci_write_config_dword(devbusfn, 0xB8, 0x43924392);
82 pci_write_config_dword(devbusfn, 0xBC, 0x40094009);
87 void ide_set_reset (int flag) {