git.sur5r.net Git - u-boot/blob - drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <linux/byteorder/swab.h>
  51 #include <environment.h>
  52 #ifdef  CFG_FLASH_CFI_DRIVER
  53
  54 /*
  55  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  56  * The width of the port and the width of the chips are determined at initialization.
  57  * These widths are used to calculate the address for access CFI data structures.
  58  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  59  *
  60  * References
  61  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  62  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  63  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  64  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  65  *
  66  * TODO
  67  *
  68  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  69  * Table (ALT) to determine if protection is available
  70  *
  71  * Add support for other command sets Use the PRI and ALT to determine command set
  72  * Verify erase and program timeouts.
  73  */
  74
  75 #ifndef CFG_FLASH_BANKS_LIST
  76 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  77 #endif
  78
  79 #define FLASH_CMD_CFI                   0x98
  80 #define FLASH_CMD_READ_ID               0x90
  81 #define FLASH_CMD_RESET                 0xff
  82 #define FLASH_CMD_BLOCK_ERASE           0x20
  83 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  84 #define FLASH_CMD_WRITE                 0x40
  85 #define FLASH_CMD_PROTECT               0x60
  86 #define FLASH_CMD_PROTECT_SET           0x01
  87 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  88 #define FLASH_CMD_CLEAR_STATUS          0x50
  89 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  90 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  91
  92 #define FLASH_STATUS_DONE               0x80
  93 #define FLASH_STATUS_ESS                0x40
  94 #define FLASH_STATUS_ECLBS              0x20
  95 #define FLASH_STATUS_PSLBS              0x10
  96 #define FLASH_STATUS_VPENS              0x08
  97 #define FLASH_STATUS_PSS                0x04
  98 #define FLASH_STATUS_DPS                0x02
  99 #define FLASH_STATUS_R                  0x01
 100 #define FLASH_STATUS_PROTECT            0x01
 101
 102 #define AMD_CMD_RESET                   0xF0
 103 #define AMD_CMD_WRITE                   0xA0
 104 #define AMD_CMD_ERASE_START             0x80
 105 #define AMD_CMD_ERASE_SECTOR            0x30
 106 #define AMD_CMD_UNLOCK_START            0xAA
 107 #define AMD_CMD_UNLOCK_ACK              0x55
 108
 109 #define AMD_STATUS_TOGGLE               0x40
 110 #define AMD_STATUS_ERROR                0x20
 111 #define AMD_ADDR_ERASE_START            0x555
 112 #define AMD_ADDR_START                  0x555
 113 #define AMD_ADDR_ACK                    0x2AA
 114
 115 #define FLASH_OFFSET_CFI                0x55
 116 #define FLASH_OFFSET_CFI_RESP           0x10
 117 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 118 #define FLASH_OFFSET_WTOUT              0x1F
 119 #define FLASH_OFFSET_WBTOUT             0x20
 120 #define FLASH_OFFSET_ETOUT              0x21
 121 #define FLASH_OFFSET_CETOUT             0x22
 122 #define FLASH_OFFSET_WMAX_TOUT          0x23
 123 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 124 #define FLASH_OFFSET_EMAX_TOUT          0x25
 125 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 126 #define FLASH_OFFSET_SIZE               0x27
 127 #define FLASH_OFFSET_INTERFACE          0x28
 128 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 129 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 130 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 131 #define FLASH_OFFSET_PROTECT            0x02
 132 #define FLASH_OFFSET_USER_PROTECTION    0x85
 133 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 134
 135
 136 #define FLASH_MAN_CFI                   0x01000000
 137
 138 #define CFI_CMDSET_NONE             0
 139 #define CFI_CMDSET_INTEL_EXTENDED   1
 140 #define CFI_CMDSET_AMD_STANDARD     2
 141 #define CFI_CMDSET_INTEL_STANDARD   3
 142 #define CFI_CMDSET_AMD_EXTENDED     4
 143 #define CFI_CMDSET_MITSU_STANDARD   256
 144 #define CFI_CMDSET_MITSU_EXTENDED   257
 145 #define CFI_CMDSET_SST              258
 146
 147
 148 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 149 # undef  FLASH_CMD_RESET
 150 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 151 #endif
 152
 153
 154 typedef union {
 155         unsigned char c;
 156         unsigned short w;
 157         unsigned long l;
 158         unsigned long long ll;
 159 } cfiword_t;
 160
 161 typedef union {
 162         volatile unsigned char *cp;
 163         volatile unsigned short *wp;
 164         volatile unsigned long *lp;
 165         volatile unsigned long long *llp;
 166 } cfiptr_t;
 167
 168 #define NUM_ERASE_REGIONS 4
 169
 170 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 171
 172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];   /* info for FLASH chips   */
 173
 174 /*-----------------------------------------------------------------------
 175  * Functions
 176  */
 177
 178 typedef unsigned long flash_sect_t;
 179
 180 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 181 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 182 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 183 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 184 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 185 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 186 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 187 static int flash_detect_cfi (flash_info_t * info);
 188 static ulong flash_get_size (ulong base, int banknum);
 189 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 190 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 191                                     ulong tout, char *prompt);
 192 static flash_info_t *flash_get_info(ulong base);
 193 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 194 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 195 #endif
 196
 197 /*-----------------------------------------------------------------------
 198  * create an address based on the offset and the port width
 199  */
 200 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 201 {
 202         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 203 }
 204
 205 #ifdef DEBUG
 206 /*-----------------------------------------------------------------------
 207  * Debug support
 208  */
 209 void print_longlong (char *str, unsigned long long data)
 210 {
 211         int i;
 212         char *cp;
 213
 214         cp = (unsigned char *) &data;
 215         for (i = 0; i < 8; i++)
 216                 sprintf (&str[i * 2], "%2.2x", *cp++);
 217 }
 218 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 219 {
 220         cfiptr_t cptr;
 221         int x, y;
 222
 223         for (x = 0; x < 0x40; x += 16 / info->portwidth) {
 224                 cptr.cp =
 225                         flash_make_addr (info, sect,
 226                                          x + FLASH_OFFSET_CFI_RESP);
 227                 debug ("%p : ", cptr.cp);
 228                 for (y = 0; y < 16; y++) {
 229                         debug ("%2.2x ", cptr.cp[y]);
 230                 }
 231                 debug (" ");
 232                 for (y = 0; y < 16; y++) {
 233                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 234                                 debug ("%c", cptr.cp[y]);
 235                         } else {
 236                                 debug (".");
 237                         }
 238                 }
 239                 debug ("\n");
 240         }
 241 }
 242 #endif
 243
 244
 245 /*-----------------------------------------------------------------------
 246  * read a character at a port width address
 247  */
 248 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 249 {
 250         uchar *cp;
 251
 252         cp = flash_make_addr (info, 0, offset);
 253 #if defined(__LITTLE_ENDIAN)
 254         return (cp[0]);
 255 #else
 256         return (cp[info->portwidth - 1]);
 257 #endif
 258 }
 259
 260 /*-----------------------------------------------------------------------
 261  * read a short word by swapping for ppc format.
 262  */
 263 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 264 {
 265         uchar *addr;
 266         ushort retval;
 267
 268 #ifdef DEBUG
 269         int x;
 270 #endif
 271         addr = flash_make_addr (info, sect, offset);
 272
 273 #ifdef DEBUG
 274         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 275                info->portwidth);
 276         for (x = 0; x < 2 * info->portwidth; x++) {
 277                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 278         }
 279 #endif
 280 #if defined(__LITTLE_ENDIAN)
 281         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 282 #else
 283         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 284                   addr[info->portwidth - 1]);
 285 #endif
 286
 287         debug ("retval = 0x%x\n", retval);
 288         return retval;
 289 }
 290
 291 /*-----------------------------------------------------------------------
 292  * read a long word by picking the least significant byte of each maiximum
 293  * port size word. Swap for ppc format.
 294  */
 295 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 296 {
 297         uchar *addr;
 298         ulong retval;
 299
 300 #ifdef DEBUG
 301         int x;
 302 #endif
 303         addr = flash_make_addr (info, sect, offset);
 304
 305 #ifdef DEBUG
 306         debug ("long addr is at %p info->portwidth = %d\n", addr,
 307                info->portwidth);
 308         for (x = 0; x < 4 * info->portwidth; x++) {
 309                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 310         }
 311 #endif
 312 #if defined(__LITTLE_ENDIAN)
 313         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 314                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 315 #else
 316         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 317                 (addr[(info->portwidth) - 1] << 16) |
 318                 (addr[(4 * info->portwidth) - 1] << 8) |
 319                 addr[(3 * info->portwidth) - 1];
 320 #endif
 321         return retval;
 322 }
 323
 324 /*-----------------------------------------------------------------------
 325  */
 326 unsigned long flash_init (void)
 327 {
 328         unsigned long size = 0;
 329         int i;
 330
 331         /* Init: no FLASHes known */
 332         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 333                 flash_info[i].flash_id = FLASH_UNKNOWN;
 334                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 335                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 336                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 337                                 i, flash_info[i].size, flash_info[i].size << 20);
 338                 }
 339         }
 340
 341         /* Monitor protection ON by default */
 342 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 343         flash_protect (FLAG_PROTECT_SET,
 344                        CFG_MONITOR_BASE,
 345                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 346                        flash_get_info(CFG_MONITOR_BASE));
 347 #endif
 348
 349         /* Environment protection ON by default */
 350 #ifdef CFG_ENV_IS_IN_FLASH
 351         flash_protect (FLAG_PROTECT_SET,
 352                        CFG_ENV_ADDR,
 353                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 354                        flash_get_info(CFG_ENV_ADDR));
 355 #endif
 356
 357         /* Redundant environment protection ON by default */
 358 #ifdef CFG_ENV_ADDR_REDUND
 359         flash_protect (FLAG_PROTECT_SET,
 360                        CFG_ENV_ADDR_REDUND,
 361                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 362                        flash_get_info(CFG_ENV_ADDR_REDUND));
 363 #endif
 364         return (size);
 365 }
 366
 367 /*-----------------------------------------------------------------------
 368  */
 369 static flash_info_t *flash_get_info(ulong base)
 370 {
 371         int i;
 372         flash_info_t * info;
 373
 374         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 375                 info = & flash_info[i];
 376                 if (info->size && info->start[0] <= base &&
 377                     base <= info->start[0] + info->size - 1)
 378                         break;
 379         }
 380
 381         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 382 }
 383
 384 /*-----------------------------------------------------------------------
 385  */
 386 int flash_erase (flash_info_t * info, int s_first, int s_last)
 387 {
 388         int rcode = 0;
 389         int prot;
 390         flash_sect_t sect;
 391
 392         if (info->flash_id != FLASH_MAN_CFI) {
 393                 puts ("Can't erase unknown flash type - aborted\n");
 394                 return 1;
 395         }
 396         if ((s_first < 0) || (s_first > s_last)) {
 397                 puts ("- no sectors to erase\n");
 398                 return 1;
 399         }
 400
 401         prot = 0;
 402         for (sect = s_first; sect <= s_last; ++sect) {
 403                 if (info->protect[sect]) {
 404                         prot++;
 405                 }
 406         }
 407         if (prot) {
 408                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 409         } else {
 410                 putc ('\n');
 411         }
 412
 413
 414         for (sect = s_first; sect <= s_last; sect++) {
 415                 if (info->protect[sect] == 0) { /* not protected */
 416                         switch (info->vendor) {
 417                         case CFI_CMDSET_INTEL_STANDARD:
 418                         case CFI_CMDSET_INTEL_EXTENDED:
 419                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 420                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 421                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 422                                 break;
 423                         case CFI_CMDSET_AMD_STANDARD:
 424                         case CFI_CMDSET_AMD_EXTENDED:
 425                                 flash_unlock_seq (info, sect);
 426                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 427                                                         AMD_CMD_ERASE_START);
 428                                 flash_unlock_seq (info, sect);
 429                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 430                                 break;
 431                         default:
 432                                 debug ("Unkown flash vendor %d\n",
 433                                        info->vendor);
 434                                 break;
 435                         }
 436
 437                         if (flash_full_status_check
 438                             (info, sect, info->erase_blk_tout, "erase")) {
 439                                 rcode = 1;
 440                         } else
 441                                 putc ('.');
 442                 }
 443         }
 444         puts (" done\n");
 445         return rcode;
 446 }
 447
 448 /*-----------------------------------------------------------------------
 449  */
 450 void flash_print_info (flash_info_t * info)
 451 {
 452         int i;
 453
 454         if (info->flash_id != FLASH_MAN_CFI) {
 455                 puts ("missing or unknown FLASH type\n");
 456                 return;
 457         }
 458
 459         printf ("CFI conformant FLASH (%d x %d)",
 460                 (info->portwidth << 3), (info->chipwidth << 3));
 461         printf ("  Size: %ld MB in %d Sectors\n",
 462                 info->size >> 20, info->sector_count);
 463         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 464                 info->erase_blk_tout,
 465                 info->write_tout,
 466                 info->buffer_write_tout,
 467                 info->buffer_size);
 468
 469         puts ("  Sector Start Addresses:");
 470         for (i = 0; i < info->sector_count; ++i) {
 471 #ifdef CFG_FLASH_EMPTY_INFO
 472                 int k;
 473                 int size;
 474                 int erased;
 475                 volatile unsigned long *flash;
 476
 477                 /*
 478                  * Check if whole sector is erased
 479                  */
 480                 if (i != (info->sector_count - 1))
 481                         size = info->start[i + 1] - info->start[i];
 482                 else
 483                         size = info->start[0] + info->size - info->start[i];
 484                 erased = 1;
 485                 flash = (volatile unsigned long *) info->start[i];
 486                 size = size >> 2;       /* divide by 4 for longword access */
 487                 for (k = 0; k < size; k++) {
 488                         if (*flash++ != 0xffffffff) {
 489                                 erased = 0;
 490                                 break;
 491                         }
 492                 }
 493
 494                 if ((i % 5) == 0)
 495                         printf ("\n");
 496                 /* print empty and read-only info */
 497                 printf (" %08lX%s%s",
 498                         info->start[i],
 499                         erased ? " E" : "  ",
 500                         info->protect[i] ? "RO " : "   ");
 501 #else
 502                 if ((i % 5) == 0)
 503                         printf ("\n   ");
 504                 printf (" %08lX%s",
 505                         info->start[i], info->protect[i] ? " (RO)  " : "     ");
 506 #endif
 507         }
 508         putc ('\n');
 509         return;
 510 }
 511
 512 /*-----------------------------------------------------------------------
 513  * Copy memory to flash, returns:
 514  * 0 - OK
 515  * 1 - write timeout
 516  * 2 - Flash not erased
 517  */
 518 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 519 {
 520         ulong wp;
 521         ulong cp;
 522         int aln;
 523         cfiword_t cword;
 524         int i, rc;
 525
 526 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 527         int buffered_size;
 528 #endif
 529         /* get lower aligned address */
 530         /* get lower aligned address */
 531         wp = (addr & ~(info->portwidth - 1));
 532
 533         /* handle unaligned start */
 534         if ((aln = addr - wp) != 0) {
 535                 cword.l = 0;
 536                 cp = wp;
 537                 for (i = 0; i < aln; ++i, ++cp)
 538                         flash_add_byte (info, &cword, (*(uchar *) cp));
 539
 540                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 541                         flash_add_byte (info, &cword, *src++);
 542                         cnt--;
 543                         cp++;
 544                 }
 545                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 546                         flash_add_byte (info, &cword, (*(uchar *) cp));
 547                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 548                         return rc;
 549                 wp = cp;
 550         }
 551
 552         /* handle the aligned part */
 553 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 554         buffered_size = (info->portwidth / info->chipwidth);
 555         buffered_size *= info->buffer_size;
 556         while (cnt >= info->portwidth) {
 557                 i = buffered_size > cnt ? cnt : buffered_size;
 558                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 559                         return rc;
 560                 i -= (i % info->portwidth);
 561                 wp += i;
 562                 src += i;
 563                 cnt -= i;
 564         }
 565 #else
 566         while (cnt >= info->portwidth) {
 567                 cword.l = 0;
 568                 for (i = 0; i < info->portwidth; i++) {
 569                         flash_add_byte (info, &cword, *src++);
 570                 }
 571                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 572                         return rc;
 573                 wp += info->portwidth;
 574                 cnt -= info->portwidth;
 575         }
 576 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 577         if (cnt == 0) {
 578                 return (0);
 579         }
 580
 581         /*
 582          * handle unaligned tail bytes
 583          */
 584         cword.l = 0;
 585         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 586                 flash_add_byte (info, &cword, *src++);
 587                 --cnt;
 588         }
 589         for (; i < info->portwidth; ++i, ++cp) {
 590                 flash_add_byte (info, &cword, (*(uchar *) cp));
 591         }
 592
 593         return flash_write_cfiword (info, wp, cword);
 594 }
 595
 596 /*-----------------------------------------------------------------------
 597  */
 598 #ifdef CFG_FLASH_PROTECTION
 599
 600 int flash_real_protect (flash_info_t * info, long sector, int prot)
 601 {
 602         int retcode = 0;
 603
 604         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 605         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 606         if (prot)
 607                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 608         else
 609                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 610
 611         if ((retcode =
 612              flash_full_status_check (info, sector, info->erase_blk_tout,
 613                                       prot ? "protect" : "unprotect")) == 0) {
 614
 615                 info->protect[sector] = prot;
 616                 /* Intel's unprotect unprotects all locking */
 617                 if (prot == 0) {
 618                         flash_sect_t i;
 619
 620                         for (i = 0; i < info->sector_count; i++) {
 621                                 if (info->protect[i])
 622                                         flash_real_protect (info, i, 1);
 623                         }
 624                 }
 625         }
 626         return retcode;
 627 }
 628
 629 /*-----------------------------------------------------------------------
 630  * flash_read_user_serial - read the OneTimeProgramming cells
 631  */
 632 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 633                              int len)
 634 {
 635         uchar *src;
 636         uchar *dst;
 637
 638         dst = buffer;
 639         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 640         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 641         memcpy (dst, src + offset, len);
 642         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 643 }
 644
 645 /*
 646  * flash_read_factory_serial - read the device Id from the protection area
 647  */
 648 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 649                                 int len)
 650 {
 651         uchar *src;
 652
 653         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 654         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 655         memcpy (buffer, src + offset, len);
 656         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 657 }
 658
 659 #endif /* CFG_FLASH_PROTECTION */
 660
 661 /*
 662  * flash_is_busy - check to see if the flash is busy
 663  * This routine checks the status of the chip and returns true if the chip is busy
 664  */
 665 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 666 {
 667         int retval;
 668
 669         switch (info->vendor) {
 670         case CFI_CMDSET_INTEL_STANDARD:
 671         case CFI_CMDSET_INTEL_EXTENDED:
 672                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 673                 break;
 674         case CFI_CMDSET_AMD_STANDARD:
 675         case CFI_CMDSET_AMD_EXTENDED:
 676                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 677                 break;
 678         default:
 679                 retval = 0;
 680         }
 681         debug ("flash_is_busy: %d\n", retval);
 682         return retval;
 683 }
 684
 685 /*-----------------------------------------------------------------------
 686  *  wait for XSR.7 to be set. Time out with an error if it does not.
 687  *  This routine does not set the flash to read-array mode.
 688  */
 689 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 690                                ulong tout, char *prompt)
 691 {
 692         ulong start;
 693
 694         /* Wait for command completion */
 695         start = get_timer (0);
 696         while (flash_is_busy (info, sector)) {
 697                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
 698                         printf ("Flash %s timeout at address %lx data %lx\n",
 699                                 prompt, info->start[sector],
 700                                 flash_read_long (info, sector, 0));
 701                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 702                         return ERR_TIMOUT;
 703                 }
 704         }
 705         return ERR_OK;
 706 }
 707
 708 /*-----------------------------------------------------------------------
 709  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 710  * This routine sets the flash to read-array mode.
 711  */
 712 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 713                                     ulong tout, char *prompt)
 714 {
 715         int retcode;
 716
 717         retcode = flash_status_check (info, sector, tout, prompt);
 718         switch (info->vendor) {
 719         case CFI_CMDSET_INTEL_EXTENDED:
 720         case CFI_CMDSET_INTEL_STANDARD:
 721                 if ((retcode != ERR_OK)
 722                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 723                         retcode = ERR_INVAL;
 724                         printf ("Flash %s error at address %lx\n", prompt,
 725                                 info->start[sector]);
 726                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 727                                 puts ("Command Sequence Error.\n");
 728                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 729                                 puts ("Block Erase Error.\n");
 730                                 retcode = ERR_NOT_ERASED;
 731                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 732                                 puts ("Locking Error\n");
 733                         }
 734                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 735                                 puts ("Block locked.\n");
 736                                 retcode = ERR_PROTECTED;
 737                         }
 738                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 739                                 puts ("Vpp Low Error.\n");
 740                 }
 741                 flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
 742                 break;
 743         default:
 744                 break;
 745         }
 746         return retcode;
 747 }
 748
 749 /*-----------------------------------------------------------------------
 750  */
 751 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 752 {
 753 #if defined(__LITTLE_ENDIAN)
 754         unsigned short  w;
 755         unsigned int    l;
 756         unsigned long long ll;
 757 #endif
 758
 759         switch (info->portwidth) {
 760         case FLASH_CFI_8BIT:
 761                 cword->c = c;
 762                 break;
 763         case FLASH_CFI_16BIT:
 764 #if defined(__LITTLE_ENDIAN)
 765                 w = c;
 766                 w <<= 8;
 767                 cword->w = (cword->w >> 8) | w;
 768 #else
 769                 cword->w = (cword->w << 8) | c;
 770 #endif
 771                 break;
 772         case FLASH_CFI_32BIT:
 773 #if defined(__LITTLE_ENDIAN)
 774                 l = c;
 775                 l <<= 24;
 776                 cword->l = (cword->l >> 8) | l;
 777 #else
 778                 cword->l = (cword->l << 8) | c;
 779 #endif
 780                 break;
 781         case FLASH_CFI_64BIT:
 782 #if defined(__LITTLE_ENDIAN)
 783                 ll = c;
 784                 ll <<= 56;
 785                 cword->ll = (cword->ll >> 8) | ll;
 786 #else
 787                 cword->ll = (cword->ll << 8) | c;
 788 #endif
 789                 break;
 790         }
 791 }
 792
 793
 794 /*-----------------------------------------------------------------------
 795  * make a proper sized command based on the port and chip widths
 796  */
 797 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 798 {
 799         int i;
 800
 801 #if defined(__LITTLE_ENDIAN)
 802         ushort stmpw;
 803         uint   stmpi;
 804 #endif
 805         uchar *cp = (uchar *) cmdbuf;
 806
 807         for (i = 0; i < info->portwidth; i++)
 808                 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
 809 #if defined(__LITTLE_ENDIAN)
 810         switch (info->portwidth) {
 811         case FLASH_CFI_8BIT:
 812                 break;
 813         case FLASH_CFI_16BIT:
 814                 stmpw = *(ushort *) cmdbuf;
 815                 *(ushort *) cmdbuf = __swab16 (stmpw);
 816                 break;
 817         case FLASH_CFI_32BIT:
 818                 stmpi = *(uint *) cmdbuf;
 819                 *(uint *) cmdbuf = __swab32 (stmpi);
 820                 break;
 821         default:
 822                 puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
 823                 break;
 824         }
 825 #endif
 826 }
 827
 828 /*
 829  * Write a proper sized command to the correct address
 830  */
 831 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 832 {
 833
 834         volatile cfiptr_t addr;
 835         cfiword_t cword;
 836
 837         addr.cp = flash_make_addr (info, sect, offset);
 838         flash_make_cmd (info, cmd, &cword);
 839         switch (info->portwidth) {
 840         case FLASH_CFI_8BIT:
 841                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 842                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 843                 *addr.cp = cword.c;
 844                 break;
 845         case FLASH_CFI_16BIT:
 846                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 847                        cmd, cword.w,
 848                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 849                 *addr.wp = cword.w;
 850                 break;
 851         case FLASH_CFI_32BIT:
 852                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 853                        cmd, cword.l,
 854                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 855                 *addr.lp = cword.l;
 856                 break;
 857         case FLASH_CFI_64BIT:
 858 #ifdef DEBUG
 859                 {
 860                         char str[20];
 861
 862                         print_longlong (str, cword.ll);
 863
 864                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 865                                addr.llp, cmd, str,
 866                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 867                 }
 868 #endif
 869                 *addr.llp = cword.ll;
 870                 break;
 871         }
 872 }
 873
 874 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 875 {
 876         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 877         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 878 }
 879
 880 /*-----------------------------------------------------------------------
 881  */
 882 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 883 {
 884         cfiptr_t cptr;
 885         cfiword_t cword;
 886         int retval;
 887
 888         cptr.cp = flash_make_addr (info, sect, offset);
 889         flash_make_cmd (info, cmd, &cword);
 890
 891         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 892         switch (info->portwidth) {
 893         case FLASH_CFI_8BIT:
 894                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 895                 retval = (cptr.cp[0] == cword.c);
 896                 break;
 897         case FLASH_CFI_16BIT:
 898                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 899                 retval = (cptr.wp[0] == cword.w);
 900                 break;
 901         case FLASH_CFI_32BIT:
 902                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 903                 retval = (cptr.lp[0] == cword.l);
 904                 break;
 905         case FLASH_CFI_64BIT:
 906 #ifdef DEBUG
 907                 {
 908                         char str1[20];
 909                         char str2[20];
 910
 911                         print_longlong (str1, cptr.llp[0]);
 912                         print_longlong (str2, cword.ll);
 913                         debug ("is= %s %s\n", str1, str2);
 914                 }
 915 #endif
 916                 retval = (cptr.llp[0] == cword.ll);
 917                 break;
 918         default:
 919                 retval = 0;
 920                 break;
 921         }
 922         return retval;
 923 }
 924
 925 /*-----------------------------------------------------------------------
 926  */
 927 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 928 {
 929         cfiptr_t cptr;
 930         cfiword_t cword;
 931         int retval;
 932
 933         cptr.cp = flash_make_addr (info, sect, offset);
 934         flash_make_cmd (info, cmd, &cword);
 935         switch (info->portwidth) {
 936         case FLASH_CFI_8BIT:
 937                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 938                 break;
 939         case FLASH_CFI_16BIT:
 940                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 941                 break;
 942         case FLASH_CFI_32BIT:
 943                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 944                 break;
 945         case FLASH_CFI_64BIT:
 946                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 947                 break;
 948         default:
 949                 retval = 0;
 950                 break;
 951         }
 952         return retval;
 953 }
 954
 955 /*-----------------------------------------------------------------------
 956  */
 957 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 958 {
 959         cfiptr_t cptr;
 960         cfiword_t cword;
 961         int retval;
 962
 963         cptr.cp = flash_make_addr (info, sect, offset);
 964         flash_make_cmd (info, cmd, &cword);
 965         switch (info->portwidth) {
 966         case FLASH_CFI_8BIT:
 967                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
 968                 break;
 969         case FLASH_CFI_16BIT:
 970                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
 971                 break;
 972         case FLASH_CFI_32BIT:
 973                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
 974                 break;
 975         case FLASH_CFI_64BIT:
 976                 retval = ((cptr.llp[0] & cword.ll) !=
 977                           (cptr.llp[0] & cword.ll));
 978                 break;
 979         default:
 980                 retval = 0;
 981                 break;
 982         }
 983         return retval;
 984 }
 985
 986 /*-----------------------------------------------------------------------
 987  * detect if flash is compatible with the Common Flash Interface (CFI)
 988  * http://www.jedec.org/download/search/jesd68.pdf
 989  *
 990 */
 991 static int flash_detect_cfi (flash_info_t * info)
 992 {
 993         debug ("flash detect cfi\n");
 994
 995         for (info->portwidth = FLASH_CFI_8BIT;
 996              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
 997                 for (info->chipwidth = FLASH_CFI_BY8;
 998                      info->chipwidth <= info->portwidth;
 999                      info->chipwidth <<= 1) {
1000                         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1001                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1002                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1003                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1004                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1005                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1006                                 debug ("device interface is %d\n",
1007                                        info->interface);
1008                                 debug ("found port %d chip %d ",
1009                                        info->portwidth, info->chipwidth);
1010                                 debug ("port %d bits chip %d bits\n",
1011                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1012                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1013                                 return 1;
1014                         }
1015                 }
1016         }
1017         debug ("not found\n");
1018         return 0;
1019 }
1020
1021 /*
1022  * The following code cannot be run from FLASH!
1023  *
1024  */
1025 static ulong flash_get_size (ulong base, int banknum)
1026 {
1027         flash_info_t *info = &flash_info[banknum];
1028         int i, j;
1029         flash_sect_t sect_cnt;
1030         unsigned long sector;
1031         unsigned long tmp;
1032         int size_ratio;
1033         uchar num_erase_regions;
1034         int erase_region_size;
1035         int erase_region_count;
1036
1037         info->start[0] = base;
1038
1039         if (flash_detect_cfi (info)) {
1040                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1041 #ifdef DEBUG
1042                 flash_printqry (info, 0);
1043 #endif
1044                 switch (info->vendor) {
1045                 case CFI_CMDSET_INTEL_STANDARD:
1046                 case CFI_CMDSET_INTEL_EXTENDED:
1047                 default:
1048                         info->cmd_reset = FLASH_CMD_RESET;
1049                         break;
1050                 case CFI_CMDSET_AMD_STANDARD:
1051                 case CFI_CMDSET_AMD_EXTENDED:
1052                         info->cmd_reset = AMD_CMD_RESET;
1053                         break;
1054                 }
1055
1056                 debug ("manufacturer is %d\n", info->vendor);
1057                 size_ratio = info->portwidth / info->chipwidth;
1058                 /* if the chip is x8/x16 reduce the ratio by half */
1059                 if ((info->interface == FLASH_CFI_X8X16)
1060                     && (info->chipwidth == FLASH_CFI_BY8)) {
1061                         size_ratio >>= 1;
1062                 }
1063                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1064                 debug ("size_ratio %d port %d bits chip %d bits\n",
1065                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1066                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1067                 debug ("found %d erase regions\n", num_erase_regions);
1068                 sect_cnt = 0;
1069                 sector = base;
1070                 for (i = 0; i < num_erase_regions; i++) {
1071                         if (i > NUM_ERASE_REGIONS) {
1072                                 printf ("%d erase regions found, only %d used\n",
1073                                         num_erase_regions, NUM_ERASE_REGIONS);
1074                                 break;
1075                         }
1076                         tmp = flash_read_long (info, 0,
1077                                                FLASH_OFFSET_ERASE_REGIONS +
1078                                                i * 4);
1079                         erase_region_size =
1080                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1081                         tmp >>= 16;
1082                         erase_region_count = (tmp & 0xffff) + 1;
1083                         debug ("erase_region_count = %d erase_region_size = %d\n",
1084                                 erase_region_count, erase_region_size);
1085                         for (j = 0; j < erase_region_count; j++) {
1086                                 info->start[sect_cnt] = sector;
1087                                 sector += (erase_region_size * size_ratio);
1088
1089                                 /*
1090                                  * Only read protection status from supported devices (intel...)
1091                                  */
1092                                 switch (info->vendor) {
1093                                 case CFI_CMDSET_INTEL_EXTENDED:
1094                                 case CFI_CMDSET_INTEL_STANDARD:
1095                                         info->protect[sect_cnt] =
1096                                                 flash_isset (info, sect_cnt,
1097                                                              FLASH_OFFSET_PROTECT,
1098                                                              FLASH_STATUS_PROTECT);
1099                                         break;
1100                                 default:
1101                                         info->protect[sect_cnt] = 0; /* default: not protected */
1102                                 }
1103
1104                                 sect_cnt++;
1105                         }
1106                 }
1107
1108                 info->sector_count = sect_cnt;
1109                 /* multiply the size by the number of chips */
1110                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1111                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1112                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1113                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1114                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1115                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1116                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1117                 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1118                 info->flash_id = FLASH_MAN_CFI;
1119                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1120                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1121                 }
1122         }
1123
1124         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1125         return (info->size);
1126 }
1127
1128
1129 /*-----------------------------------------------------------------------
1130  */
1131 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1132                                 cfiword_t cword)
1133 {
1134
1135         cfiptr_t ctladdr;
1136         cfiptr_t cptr;
1137         int flag;
1138
1139         ctladdr.cp = flash_make_addr (info, 0, 0);
1140         cptr.cp = (uchar *) dest;
1141
1142
1143         /* Check if Flash is (sufficiently) erased */
1144         switch (info->portwidth) {
1145         case FLASH_CFI_8BIT:
1146                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1147                 break;
1148         case FLASH_CFI_16BIT:
1149                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1150                 break;
1151         case FLASH_CFI_32BIT:
1152                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1153                 break;
1154         case FLASH_CFI_64BIT:
1155                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1156                 break;
1157         default:
1158                 return 2;
1159         }
1160         if (!flag)
1161                 return 2;
1162
1163         /* Disable interrupts which might cause a timeout here */
1164         flag = disable_interrupts ();
1165
1166         switch (info->vendor) {
1167         case CFI_CMDSET_INTEL_EXTENDED:
1168         case CFI_CMDSET_INTEL_STANDARD:
1169                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1170                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1171                 break;
1172         case CFI_CMDSET_AMD_EXTENDED:
1173         case CFI_CMDSET_AMD_STANDARD:
1174                 flash_unlock_seq (info, 0);
1175                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1176                 break;
1177         }
1178
1179         switch (info->portwidth) {
1180         case FLASH_CFI_8BIT:
1181                 cptr.cp[0] = cword.c;
1182                 break;
1183         case FLASH_CFI_16BIT:
1184                 cptr.wp[0] = cword.w;
1185                 break;
1186         case FLASH_CFI_32BIT:
1187                 cptr.lp[0] = cword.l;
1188                 break;
1189         case FLASH_CFI_64BIT:
1190                 cptr.llp[0] = cword.ll;
1191                 break;
1192         }
1193
1194         /* re-enable interrupts if necessary */
1195         if (flag)
1196                 enable_interrupts ();
1197
1198         return flash_full_status_check (info, 0, info->write_tout, "write");
1199 }
1200
1201 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1202
1203 /* loop through the sectors from the highest address
1204  * when the passed address is greater or equal to the sector address
1205  * we have a match
1206  */
1207 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1208 {
1209         flash_sect_t sector;
1210
1211         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1212                 if (addr >= info->start[sector])
1213                         break;
1214         }
1215         return sector;
1216 }
1217
1218 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1219                                   int len)
1220 {
1221         flash_sect_t sector;
1222         int cnt;
1223         int retcode;
1224         volatile cfiptr_t src;
1225         volatile cfiptr_t dst;
1226         /* buffered writes in the AMD chip set is not supported yet */
1227         if((info->vendor ==  CFI_CMDSET_AMD_STANDARD) ||
1228                 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1229                 return ERR_INVAL;
1230
1231         src.cp = cp;
1232         dst.cp = (uchar *) dest;
1233         sector = find_sector (info, dest);
1234         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1235         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1236         if ((retcode =
1237              flash_status_check (info, sector, info->buffer_write_tout,
1238                                  "write to buffer")) == ERR_OK) {
1239                 /* reduce the number of loops by the width of the port  */
1240                 switch (info->portwidth) {
1241                 case FLASH_CFI_8BIT:
1242                         cnt = len;
1243                         break;
1244                 case FLASH_CFI_16BIT:
1245                         cnt = len >> 1;
1246                         break;
1247                 case FLASH_CFI_32BIT:
1248                         cnt = len >> 2;
1249                         break;
1250                 case FLASH_CFI_64BIT:
1251                         cnt = len >> 3;
1252                         break;
1253                 default:
1254                         return ERR_INVAL;
1255                         break;
1256                 }
1257                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1258                 while (cnt-- > 0) {
1259                         switch (info->portwidth) {
1260                         case FLASH_CFI_8BIT:
1261                                 *dst.cp++ = *src.cp++;
1262                                 break;
1263                         case FLASH_CFI_16BIT:
1264                                 *dst.wp++ = *src.wp++;
1265                                 break;
1266                         case FLASH_CFI_32BIT:
1267                                 *dst.lp++ = *src.lp++;
1268                                 break;
1269                         case FLASH_CFI_64BIT:
1270                                 *dst.llp++ = *src.llp++;
1271                                 break;
1272                         default:
1273                                 return ERR_INVAL;
1274                                 break;
1275                         }
1276                 }
1277                 flash_write_cmd (info, sector, 0,
1278                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1279                 retcode =
1280                         flash_full_status_check (info, sector,
1281                                                  info->buffer_write_tout,
1282                                                  "buffer write");
1283         }
1284         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1285         return retcode;
1286 }
1287 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1288 #endif /* CFG_FLASH_CFI */