git.sur5r.net Git - u-boot/blob - drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003, 2006 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38
  39 #ifdef  CFG_FLASH_CFI_DRIVER
  40
  41 #include <watchdog.h>
  42 #include <asm/processor.h>
  43 #include <asm/byteorder.h>
  44 #include <environment.h>
  45
  46 /*
  47  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  48  * The width of the port and the width of the chips are determined at initialization.
  49  * These widths are used to calculate the address for access CFI data structures.
  50  *
  51  * References
  52  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  53  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  54  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  55  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  56  * AMD CFI Specification, Release 2.0 December 1, 2001
  57  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  58  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  59  *
  60  */
  61
  62 #if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
  63 #define CFG_FLASH_CFI_SWAP
  64 #endif
  65
  66 #ifndef CFG_FLASH_BANKS_LIST
  67 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  68 #endif
  69
  70 #define FLASH_CMD_CFI                   0x98
  71 #define FLASH_CMD_READ_ID               0x90
  72 #define FLASH_CMD_RESET                 0xff
  73 #define FLASH_CMD_BLOCK_ERASE           0x20
  74 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  75 #define FLASH_CMD_WRITE                 0x40
  76 #define FLASH_CMD_PROTECT               0x60
  77 #define FLASH_CMD_PROTECT_SET           0x01
  78 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  79 #define FLASH_CMD_CLEAR_STATUS          0x50
  80 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  82
  83 #define FLASH_STATUS_DONE               0x80
  84 #define FLASH_STATUS_ESS                0x40
  85 #define FLASH_STATUS_ECLBS              0x20
  86 #define FLASH_STATUS_PSLBS              0x10
  87 #define FLASH_STATUS_VPENS              0x08
  88 #define FLASH_STATUS_PSS                0x04
  89 #define FLASH_STATUS_DPS                0x02
  90 #define FLASH_STATUS_R                  0x01
  91 #define FLASH_STATUS_PROTECT            0x01
  92
  93 #define AMD_CMD_RESET                   0xF0
  94 #define AMD_CMD_WRITE                   0xA0
  95 #define AMD_CMD_ERASE_START             0x80
  96 #define AMD_CMD_ERASE_SECTOR            0x30
  97 #define AMD_CMD_UNLOCK_START            0xAA
  98 #define AMD_CMD_UNLOCK_ACK              0x55
  99 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 100 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 101
 102 #define AMD_STATUS_TOGGLE               0x40
 103 #define AMD_STATUS_ERROR                0x20
 104
 105 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 106 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 107 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 108
 109 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 110 #define FLASH_OFFSET_DEVICE_ID          0x01
 111 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 112 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 113 #define FLASH_OFFSET_CFI                0x55
 114 #define FLASH_OFFSET_CFI_ALT            0x555
 115 #define FLASH_OFFSET_CFI_RESP           0x10
 116 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 117 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 118 #define FLASH_OFFSET_WTOUT              0x1F
 119 #define FLASH_OFFSET_WBTOUT             0x20
 120 #define FLASH_OFFSET_ETOUT              0x21
 121 #define FLASH_OFFSET_CETOUT             0x22
 122 #define FLASH_OFFSET_WMAX_TOUT          0x23
 123 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 124 #define FLASH_OFFSET_EMAX_TOUT          0x25
 125 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 126 #define FLASH_OFFSET_SIZE               0x27
 127 #define FLASH_OFFSET_INTERFACE          0x28
 128 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 129 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 130 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 131 #define FLASH_OFFSET_PROTECT            0x02
 132 #define FLASH_OFFSET_USER_PROTECTION    0x85
 133 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 134
 135 #define CFI_CMDSET_NONE                 0
 136 #define CFI_CMDSET_INTEL_EXTENDED       1
 137 #define CFI_CMDSET_AMD_STANDARD         2
 138 #define CFI_CMDSET_INTEL_STANDARD       3
 139 #define CFI_CMDSET_AMD_EXTENDED         4
 140 #define CFI_CMDSET_MITSU_STANDARD       256
 141 #define CFI_CMDSET_MITSU_EXTENDED       257
 142 #define CFI_CMDSET_SST                  258
 143
 144 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 145 # undef  FLASH_CMD_RESET
 146 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 147 #endif
 148
 149 typedef union {
 150         unsigned char c;
 151         unsigned short w;
 152         unsigned long l;
 153         unsigned long long ll;
 154 } cfiword_t;
 155
 156 typedef union {
 157         volatile unsigned char *cp;
 158         volatile unsigned short *wp;
 159         volatile unsigned long *lp;
 160         volatile unsigned long long *llp;
 161 } cfiptr_t;
 162
 163 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 164
 165 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
 166
 167 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 168 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 169 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 170 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 171 #else
 172 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 173 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 174 #endif
 175
 176 /*
 177  * Check if chip width is defined. If not, start detecting with 8bit.
 178  */
 179 #ifndef CFG_FLASH_CFI_WIDTH
 180 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 181 #endif
 182
 183
 184 /*-----------------------------------------------------------------------
 185  * Functions
 186  */
 187
 188 typedef unsigned long flash_sect_t;
 189
 190 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 191 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 192 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 193 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 194 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 195 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 196 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 197 static void flash_read_jedec_ids (flash_info_t * info);
 198 static int flash_detect_cfi (flash_info_t * info);
 199 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 200 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 201                                     ulong tout, char *prompt);
 202 ulong flash_get_size (ulong base, int banknum);
 203 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 204 static flash_info_t *flash_get_info(ulong base);
 205 #endif
 206 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 207 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 208 #endif
 209
 210 /*-----------------------------------------------------------------------
 211  * create an address based on the offset and the port width
 212  */
 213 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 214 {
 215         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 216 }
 217
 218 #ifdef DEBUG
 219 /*-----------------------------------------------------------------------
 220  * Debug support
 221  */
 222 void print_longlong (char *str, unsigned long long data)
 223 {
 224         int i;
 225         char *cp;
 226
 227         cp = (unsigned char *) &data;
 228         for (i = 0; i < 8; i++)
 229                 sprintf (&str[i * 2], "%2.2x", *cp++);
 230 }
 231 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 232 {
 233         cfiptr_t cptr;
 234         int x, y;
 235
 236         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 237                 cptr.cp =
 238                         flash_make_addr (info, sect,
 239                                          x + FLASH_OFFSET_CFI_RESP);
 240                 debug ("%p : ", cptr.cp);
 241                 for (y = 0; y < 16; y++) {
 242                         debug ("%2.2x ", cptr.cp[y]);
 243                 }
 244                 debug (" ");
 245                 for (y = 0; y < 16; y++) {
 246                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 247                                 debug ("%c", cptr.cp[y]);
 248                         } else {
 249                                 debug (".");
 250                         }
 251                 }
 252                 debug ("\n");
 253         }
 254 }
 255 #endif
 256
 257
 258 /*-----------------------------------------------------------------------
 259  * read a character at a port width address
 260  */
 261 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 262 {
 263         uchar *cp;
 264
 265         cp = flash_make_addr (info, 0, offset);
 266 #if defined(CFG_FLASH_CFI_SWAP)
 267         return (cp[0]);
 268 #else
 269         return (cp[info->portwidth - 1]);
 270 #endif
 271 }
 272
 273 /*-----------------------------------------------------------------------
 274  * read a short word by swapping for ppc format.
 275  */
 276 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 277 {
 278         uchar *addr;
 279         ushort retval;
 280
 281 #ifdef DEBUG
 282         int x;
 283 #endif
 284         addr = flash_make_addr (info, sect, offset);
 285
 286 #ifdef DEBUG
 287         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 288                info->portwidth);
 289         for (x = 0; x < 2 * info->portwidth; x++) {
 290                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 291         }
 292 #endif
 293 #if defined(CFG_FLASH_CFI_SWAP)
 294         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 295 #else
 296         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 297                   addr[info->portwidth - 1]);
 298 #endif
 299
 300         debug ("retval = 0x%x\n", retval);
 301         return retval;
 302 }
 303
 304 /*-----------------------------------------------------------------------
 305  * read a long word by picking the least significant byte of each maximum
 306  * port size word. Swap for ppc format.
 307  */
 308 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 309 {
 310         uchar *addr;
 311         ulong retval;
 312
 313 #ifdef DEBUG
 314         int x;
 315 #endif
 316         addr = flash_make_addr (info, sect, offset);
 317
 318 #ifdef DEBUG
 319         debug ("long addr is at %p info->portwidth = %d\n", addr,
 320                info->portwidth);
 321         for (x = 0; x < 4 * info->portwidth; x++) {
 322                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 323         }
 324 #endif
 325 #if defined(CFG_FLASH_CFI_SWAP)
 326         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 327                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 328 #else
 329         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 330                 (addr[(info->portwidth) - 1] << 16) |
 331                 (addr[(4 * info->portwidth) - 1] << 8) |
 332                 addr[(3 * info->portwidth) - 1];
 333 #endif
 334         return retval;
 335 }
 336
 337
 338 /*-----------------------------------------------------------------------
 339  */
 340 unsigned long flash_init (void)
 341 {
 342         unsigned long size = 0;
 343         int i;
 344
 345 #ifdef CFG_FLASH_PROTECTION
 346         char *s = getenv("unlock");
 347 #endif
 348
 349         /* Init: no FLASHes known */
 350         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 351                 flash_info[i].flash_id = FLASH_UNKNOWN;
 352                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 353                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 354 #ifndef CFG_FLASH_QUIET_TEST
 355                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 356                                 i+1, flash_info[i].size, flash_info[i].size << 20);
 357 #endif /* CFG_FLASH_QUIET_TEST */
 358                 }
 359 #ifdef CFG_FLASH_PROTECTION
 360                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 361                         /*
 362                          * Only the U-Boot image and it's environment is protected,
 363                          * all other sectors are unprotected (unlocked) if flash
 364                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 365                          * the environment variable "unlock" is set to "yes".
 366                          */
 367                         if (flash_info[i].legacy_unlock) {
 368                                 int k;
 369
 370                                 /*
 371                                  * Disable legacy_unlock temporarily, since
 372                                  * flash_real_protect would relock all other sectors
 373                                  * again otherwise.
 374                                  */
 375                                 flash_info[i].legacy_unlock = 0;
 376
 377                                 /*
 378                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 379                                  * sector. This will unlock all sectors.
 380                                  */
 381                                 flash_real_protect (&flash_info[i], 0, 0);
 382
 383                                 flash_info[i].legacy_unlock = 1;
 384
 385                                 /*
 386                                  * Manually mark other sectors as unlocked (unprotected)
 387                                  */
 388                                 for (k = 1; k < flash_info[i].sector_count; k++)
 389                                         flash_info[i].protect[k] = 0;
 390                         } else {
 391                                 /*
 392                                  * No legancy unlocking -> unlock all sectors
 393                                  */
 394                                 flash_protect (FLAG_PROTECT_CLEAR,
 395                                                flash_info[i].start[0],
 396                                                flash_info[i].start[0] + flash_info[i].size - 1,
 397                                                &flash_info[i]);
 398                         }
 399                 }
 400 #endif /* CFG_FLASH_PROTECTION */
 401         }
 402
 403         /* Monitor protection ON by default */
 404 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 405         flash_protect (FLAG_PROTECT_SET,
 406                        CFG_MONITOR_BASE,
 407                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 408                        flash_get_info(CFG_MONITOR_BASE));
 409 #endif
 410
 411         /* Environment protection ON by default */
 412 #ifdef CFG_ENV_IS_IN_FLASH
 413         flash_protect (FLAG_PROTECT_SET,
 414                        CFG_ENV_ADDR,
 415                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 416                        flash_get_info(CFG_ENV_ADDR));
 417 #endif
 418
 419         /* Redundant environment protection ON by default */
 420 #ifdef CFG_ENV_ADDR_REDUND
 421         flash_protect (FLAG_PROTECT_SET,
 422                        CFG_ENV_ADDR_REDUND,
 423                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 424                        flash_get_info(CFG_ENV_ADDR_REDUND));
 425 #endif
 426         return (size);
 427 }
 428
 429 /*-----------------------------------------------------------------------
 430  */
 431 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 432 static flash_info_t *flash_get_info(ulong base)
 433 {
 434         int i;
 435         flash_info_t * info = 0;
 436
 437         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 438                 info = & flash_info[i];
 439                 if (info->size && info->start[0] <= base &&
 440                     base <= info->start[0] + info->size - 1)
 441                         break;
 442         }
 443
 444         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 445 }
 446 #endif
 447
 448 /*-----------------------------------------------------------------------
 449  */
 450 int flash_erase (flash_info_t * info, int s_first, int s_last)
 451 {
 452         int rcode = 0;
 453         int prot;
 454         flash_sect_t sect;
 455
 456         if (info->flash_id != FLASH_MAN_CFI) {
 457                 puts ("Can't erase unknown flash type - aborted\n");
 458                 return 1;
 459         }
 460         if ((s_first < 0) || (s_first > s_last)) {
 461                 puts ("- no sectors to erase\n");
 462                 return 1;
 463         }
 464
 465         prot = 0;
 466         for (sect = s_first; sect <= s_last; ++sect) {
 467                 if (info->protect[sect]) {
 468                         prot++;
 469                 }
 470         }
 471         if (prot) {
 472                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 473         } else {
 474                 putc ('\n');
 475         }
 476
 477
 478         for (sect = s_first; sect <= s_last; sect++) {
 479                 if (info->protect[sect] == 0) { /* not protected */
 480                         switch (info->vendor) {
 481                         case CFI_CMDSET_INTEL_STANDARD:
 482                         case CFI_CMDSET_INTEL_EXTENDED:
 483                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 484                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 485                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 486                                 break;
 487                         case CFI_CMDSET_AMD_STANDARD:
 488                         case CFI_CMDSET_AMD_EXTENDED:
 489                                 flash_unlock_seq (info, sect);
 490                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 491                                                         AMD_CMD_ERASE_START);
 492                                 flash_unlock_seq (info, sect);
 493                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 494                                 break;
 495                         default:
 496                                 debug ("Unkown flash vendor %d\n",
 497                                        info->vendor);
 498                                 break;
 499                         }
 500
 501                         if (flash_full_status_check
 502                             (info, sect, info->erase_blk_tout, "erase")) {
 503                                 rcode = 1;
 504                         } else
 505                                 putc ('.');
 506                 }
 507         }
 508         puts (" done\n");
 509         return rcode;
 510 }
 511
 512 /*-----------------------------------------------------------------------
 513  */
 514 void flash_print_info (flash_info_t * info)
 515 {
 516         int i;
 517
 518         if (info->flash_id != FLASH_MAN_CFI) {
 519                 puts ("missing or unknown FLASH type\n");
 520                 return;
 521         }
 522
 523         printf ("CFI conformant FLASH (%d x %d)",
 524                 (info->portwidth << 3), (info->chipwidth << 3));
 525         printf ("  Size: %ld MB in %d Sectors\n",
 526                 info->size >> 20, info->sector_count);
 527         printf ("  ");
 528         switch (info->vendor) {
 529                 case CFI_CMDSET_INTEL_STANDARD:
 530                         printf ("Intel Standard");
 531                         break;
 532                 case CFI_CMDSET_INTEL_EXTENDED:
 533                         printf ("Intel Extended");
 534                         break;
 535                 case CFI_CMDSET_AMD_STANDARD:
 536                         printf ("AMD Standard");
 537                         break;
 538                 case CFI_CMDSET_AMD_EXTENDED:
 539                         printf ("AMD Extended");
 540                         break;
 541                 default:
 542                         printf ("Unknown (%d)", info->vendor);
 543                         break;
 544         }
 545         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
 546                 info->manufacturer_id, info->device_id);
 547         if (info->device_id == 0x7E) {
 548                 printf("%04X", info->device_id2);
 549         }
 550         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 551                 info->erase_blk_tout,
 552                 info->write_tout);
 553         if (info->buffer_size > 1) {
 554                 printf ("  Buffer write timeout: %ld ms, buffer size: %d bytes\n",
 555                 info->buffer_write_tout,
 556                 info->buffer_size);
 557         }
 558
 559         puts ("\n  Sector Start Addresses:");
 560         for (i = 0; i < info->sector_count; ++i) {
 561                 if ((i % 5) == 0)
 562                         printf ("\n");
 563 #ifdef CFG_FLASH_EMPTY_INFO
 564                 int k;
 565                 int size;
 566                 int erased;
 567                 volatile unsigned long *flash;
 568
 569                 /*
 570                  * Check if whole sector is erased
 571                  */
 572                 if (i != (info->sector_count - 1))
 573                         size = info->start[i + 1] - info->start[i];
 574                 else
 575                         size = info->start[0] + info->size - info->start[i];
 576                 erased = 1;
 577                 flash = (volatile unsigned long *) info->start[i];
 578                 size = size >> 2;       /* divide by 4 for longword access */
 579                 for (k = 0; k < size; k++) {
 580                         if (*flash++ != 0xffffffff) {
 581                                 erased = 0;
 582                                 break;
 583                         }
 584                 }
 585
 586                 /* print empty and read-only info */
 587                 printf ("  %08lX %c %s ",
 588                         info->start[i],
 589                         erased ? 'E' : ' ',
 590                         info->protect[i] ? "RO" : "  ");
 591 #else   /* ! CFG_FLASH_EMPTY_INFO */
 592                 printf ("  %08lX   %s ",
 593                         info->start[i],
 594                         info->protect[i] ? "RO" : "  ");
 595 #endif
 596         }
 597         putc ('\n');
 598         return;
 599 }
 600
 601 /*-----------------------------------------------------------------------
 602  * Copy memory to flash, returns:
 603  * 0 - OK
 604  * 1 - write timeout
 605  * 2 - Flash not erased
 606  */
 607 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 608 {
 609         ulong wp;
 610         ulong cp;
 611         int aln;
 612         cfiword_t cword;
 613         int i, rc;
 614
 615 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 616         int buffered_size;
 617 #endif
 618         /* get lower aligned address */
 619         /* get lower aligned address */
 620         wp = (addr & ~(info->portwidth - 1));
 621
 622         /* handle unaligned start */
 623         if ((aln = addr - wp) != 0) {
 624                 cword.l = 0;
 625                 cp = wp;
 626                 for (i = 0; i < aln; ++i, ++cp)
 627                         flash_add_byte (info, &cword, (*(uchar *) cp));
 628
 629                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 630                         flash_add_byte (info, &cword, *src++);
 631                         cnt--;
 632                         cp++;
 633                 }
 634                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 635                         flash_add_byte (info, &cword, (*(uchar *) cp));
 636                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 637                         return rc;
 638                 wp = cp;
 639         }
 640
 641         /* handle the aligned part */
 642 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 643         buffered_size = (info->portwidth / info->chipwidth);
 644         buffered_size *= info->buffer_size;
 645         while (cnt >= info->portwidth) {
 646                 /* prohibit buffer write when buffer_size is 1 */
 647                 if (info->buffer_size == 1) {
 648                         cword.l = 0;
 649                         for (i = 0; i < info->portwidth; i++)
 650                                 flash_add_byte (info, &cword, *src++);
 651                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 652                                 return rc;
 653                         wp += info->portwidth;
 654                         cnt -= info->portwidth;
 655                         continue;
 656                 }
 657
 658                 /* write buffer until next buffered_size aligned boundary */
 659                 i = buffered_size - (wp % buffered_size);
 660                 if (i > cnt)
 661                         i = cnt;
 662                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 663                         return rc;
 664                 i -= i & (info->portwidth - 1);
 665                 wp += i;
 666                 src += i;
 667                 cnt -= i;
 668         }
 669 #else
 670         while (cnt >= info->portwidth) {
 671                 cword.l = 0;
 672                 for (i = 0; i < info->portwidth; i++) {
 673                         flash_add_byte (info, &cword, *src++);
 674                 }
 675                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 676                         return rc;
 677                 wp += info->portwidth;
 678                 cnt -= info->portwidth;
 679         }
 680 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 681         if (cnt == 0) {
 682                 return (0);
 683         }
 684
 685         /*
 686          * handle unaligned tail bytes
 687          */
 688         cword.l = 0;
 689         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 690                 flash_add_byte (info, &cword, *src++);
 691                 --cnt;
 692         }
 693         for (; i < info->portwidth; ++i, ++cp) {
 694                 flash_add_byte (info, &cword, (*(uchar *) cp));
 695         }
 696
 697         return flash_write_cfiword (info, wp, cword);
 698 }
 699
 700 /*-----------------------------------------------------------------------
 701  */
 702 #ifdef CFG_FLASH_PROTECTION
 703
 704 int flash_real_protect (flash_info_t * info, long sector, int prot)
 705 {
 706         int retcode = 0;
 707
 708         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 709         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 710         if (prot)
 711                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 712         else
 713                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 714
 715         if ((retcode =
 716              flash_full_status_check (info, sector, info->erase_blk_tout,
 717                                       prot ? "protect" : "unprotect")) == 0) {
 718
 719                 info->protect[sector] = prot;
 720
 721                 /*
 722                  * On some of Intel's flash chips (marked via legacy_unlock)
 723                  * unprotect unprotects all locking.
 724                  */
 725                 if ((prot == 0) && (info->legacy_unlock)) {
 726                         flash_sect_t i;
 727
 728                         for (i = 0; i < info->sector_count; i++) {
 729                                 if (info->protect[i])
 730                                         flash_real_protect (info, i, 1);
 731                         }
 732                 }
 733         }
 734         return retcode;
 735 }
 736
 737 /*-----------------------------------------------------------------------
 738  * flash_read_user_serial - read the OneTimeProgramming cells
 739  */
 740 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 741                              int len)
 742 {
 743         uchar *src;
 744         uchar *dst;
 745
 746         dst = buffer;
 747         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 748         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 749         memcpy (dst, src + offset, len);
 750         flash_write_cmd (info, 0, 0, info->cmd_reset);
 751 }
 752
 753 /*
 754  * flash_read_factory_serial - read the device Id from the protection area
 755  */
 756 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 757                                 int len)
 758 {
 759         uchar *src;
 760
 761         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 762         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 763         memcpy (buffer, src + offset, len);
 764         flash_write_cmd (info, 0, 0, info->cmd_reset);
 765 }
 766
 767 #endif /* CFG_FLASH_PROTECTION */
 768
 769 /*
 770  * flash_is_busy - check to see if the flash is busy
 771  * This routine checks the status of the chip and returns true if the chip is busy
 772  */
 773 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 774 {
 775         int retval;
 776
 777         switch (info->vendor) {
 778         case CFI_CMDSET_INTEL_STANDARD:
 779         case CFI_CMDSET_INTEL_EXTENDED:
 780                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 781                 break;
 782         case CFI_CMDSET_AMD_STANDARD:
 783         case CFI_CMDSET_AMD_EXTENDED:
 784                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 785                 break;
 786         default:
 787                 retval = 0;
 788         }
 789         debug ("flash_is_busy: %d\n", retval);
 790         return retval;
 791 }
 792
 793 /*-----------------------------------------------------------------------
 794  *  wait for XSR.7 to be set. Time out with an error if it does not.
 795  *  This routine does not set the flash to read-array mode.
 796  */
 797 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 798                                ulong tout, char *prompt)
 799 {
 800         ulong start;
 801
 802 #if CFG_HZ != 1000
 803         tout *= CFG_HZ/1000;
 804 #endif
 805
 806         /* Wait for command completion */
 807         start = get_timer (0);
 808         while (flash_is_busy (info, sector)) {
 809                 if (get_timer (start) > tout) {
 810                         printf ("Flash %s timeout at address %lx data %lx\n",
 811                                 prompt, info->start[sector],
 812                                 flash_read_long (info, sector, 0));
 813                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 814                         return ERR_TIMOUT;
 815                 }
 816                 udelay (1);             /* also triggers watchdog */
 817         }
 818         return ERR_OK;
 819 }
 820
 821 /*-----------------------------------------------------------------------
 822  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 823  * This routine sets the flash to read-array mode.
 824  */
 825 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 826                                     ulong tout, char *prompt)
 827 {
 828         int retcode;
 829
 830         retcode = flash_status_check (info, sector, tout, prompt);
 831         switch (info->vendor) {
 832         case CFI_CMDSET_INTEL_EXTENDED:
 833         case CFI_CMDSET_INTEL_STANDARD:
 834                 if ((retcode == ERR_OK)
 835                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 836                         retcode = ERR_INVAL;
 837                         printf ("Flash %s error at address %lx\n", prompt,
 838                                 info->start[sector]);
 839                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 840                                 puts ("Command Sequence Error.\n");
 841                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 842                                 puts ("Block Erase Error.\n");
 843                                 retcode = ERR_NOT_ERASED;
 844                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 845                                 puts ("Locking Error\n");
 846                         }
 847                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 848                                 puts ("Block locked.\n");
 849                                 retcode = ERR_PROTECTED;
 850                         }
 851                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 852                                 puts ("Vpp Low Error.\n");
 853                 }
 854                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 855                 break;
 856         default:
 857                 break;
 858         }
 859         return retcode;
 860 }
 861
 862 /*-----------------------------------------------------------------------
 863  */
 864 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 865 {
 866 #if defined(__LITTLE_ENDIAN)
 867         unsigned short  w;
 868         unsigned int    l;
 869         unsigned long long ll;
 870 #endif
 871
 872         switch (info->portwidth) {
 873         case FLASH_CFI_8BIT:
 874                 cword->c = c;
 875                 break;
 876         case FLASH_CFI_16BIT:
 877 #if defined(__LITTLE_ENDIAN)
 878                 w = c;
 879                 w <<= 8;
 880                 cword->w = (cword->w >> 8) | w;
 881 #else
 882                 cword->w = (cword->w << 8) | c;
 883 #endif
 884                 break;
 885         case FLASH_CFI_32BIT:
 886 #if defined(__LITTLE_ENDIAN)
 887                 l = c;
 888                 l <<= 24;
 889                 cword->l = (cword->l >> 8) | l;
 890 #else
 891                 cword->l = (cword->l << 8) | c;
 892 #endif
 893                 break;
 894         case FLASH_CFI_64BIT:
 895 #if defined(__LITTLE_ENDIAN)
 896                 ll = c;
 897                 ll <<= 56;
 898                 cword->ll = (cword->ll >> 8) | ll;
 899 #else
 900                 cword->ll = (cword->ll << 8) | c;
 901 #endif
 902                 break;
 903         }
 904 }
 905
 906
 907 /*-----------------------------------------------------------------------
 908  * make a proper sized command based on the port and chip widths
 909  */
 910 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 911 {
 912         int i;
 913         uchar *cp = (uchar *) cmdbuf;
 914
 915 #if defined(CFG_FLASH_CFI_SWAP)
 916         for (i = info->portwidth; i > 0; i--)
 917 #else
 918         for (i = 1; i <= info->portwidth; i++)
 919 #endif
 920                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 921 #ifdef CFG_FLASH_CFI_2x16
 922         if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
 923         {
 924            uchar tmp;
 925            cp = (uchar *) cmdbuf;
 926            tmp = cp[1];
 927            cp[1] = cp[2];
 928            cp[2] = tmp;
 929         }
 930 #endif /* CFG_FLASH_CFI_2x16 */
 931 }
 932
 933 /*
 934  * Write a proper sized command to the correct address
 935  */
 936 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 937 {
 938
 939         volatile cfiptr_t addr;
 940         cfiword_t cword;
 941
 942         addr.cp = flash_make_addr (info, sect, offset);
 943         flash_make_cmd (info, cmd, &cword);
 944         switch (info->portwidth) {
 945         case FLASH_CFI_8BIT:
 946                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 947                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 948                 *addr.cp = cword.c;
 949 #ifdef CONFIG_BLACKFIN
 950                 asm("ssync;");
 951 #endif
 952                 break;
 953         case FLASH_CFI_16BIT:
 954                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 955                        cmd, cword.w,
 956                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 957                 *addr.wp = cword.w;
 958 #ifdef CONFIG_BLACKFIN
 959                 asm("ssync;");
 960 #endif
 961                 break;
 962         case FLASH_CFI_32BIT:
 963                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 964                        cmd, cword.l,
 965                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 966                 *addr.lp = cword.l;
 967 #ifdef CONFIG_BLACKFIN
 968                 asm("ssync;");
 969 #endif
 970                 break;
 971         case FLASH_CFI_64BIT:
 972 #ifdef DEBUG
 973                 {
 974                         char str[20];
 975
 976                         print_longlong (str, cword.ll);
 977
 978                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 979                                addr.llp, cmd, str,
 980                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 981                 }
 982 #endif
 983                 *addr.llp = cword.ll;
 984 #ifdef CONFIG_BLACKFIN
 985                 asm("ssync;");
 986 #endif
 987                 break;
 988         }
 989 }
 990
 991 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 992 {
 993         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 994         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 995 }
 996
 997 /*-----------------------------------------------------------------------
 998  */
 999 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1000 {
1001         cfiptr_t cptr;
1002         cfiword_t cword;
1003         int retval;
1004
1005         cptr.cp = flash_make_addr (info, sect, offset);
1006         flash_make_cmd (info, cmd, &cword);
1007
1008         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
1009         switch (info->portwidth) {
1010         case FLASH_CFI_8BIT:
1011                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
1012                 retval = (cptr.cp[0] == cword.c);
1013                 break;
1014         case FLASH_CFI_16BIT:
1015                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1016                 retval = (cptr.wp[0] == cword.w);
1017                 break;
1018         case FLASH_CFI_32BIT:
1019                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1020                 retval = (cptr.lp[0] == cword.l);
1021                 break;
1022         case FLASH_CFI_64BIT:
1023 #ifdef DEBUG
1024                 {
1025                         char str1[20];
1026                         char str2[20];
1027
1028                         print_longlong (str1, cptr.llp[0]);
1029                         print_longlong (str2, cword.ll);
1030                         debug ("is= %s %s\n", str1, str2);
1031                 }
1032 #endif
1033                 retval = (cptr.llp[0] == cword.ll);
1034                 break;
1035         default:
1036                 retval = 0;
1037                 break;
1038         }
1039         return retval;
1040 }
1041
1042 /*-----------------------------------------------------------------------
1043  */
1044 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1045 {
1046         cfiptr_t cptr;
1047         cfiword_t cword;
1048         int retval;
1049
1050         cptr.cp = flash_make_addr (info, sect, offset);
1051         flash_make_cmd (info, cmd, &cword);
1052         switch (info->portwidth) {
1053         case FLASH_CFI_8BIT:
1054                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1055                 break;
1056         case FLASH_CFI_16BIT:
1057                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1058                 break;
1059         case FLASH_CFI_32BIT:
1060                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1061                 break;
1062         case FLASH_CFI_64BIT:
1063                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1064                 break;
1065         default:
1066                 retval = 0;
1067                 break;
1068         }
1069         return retval;
1070 }
1071
1072 /*-----------------------------------------------------------------------
1073  */
1074 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1075 {
1076         cfiptr_t cptr;
1077         cfiword_t cword;
1078         int retval;
1079
1080         cptr.cp = flash_make_addr (info, sect, offset);
1081         flash_make_cmd (info, cmd, &cword);
1082         switch (info->portwidth) {
1083         case FLASH_CFI_8BIT:
1084                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1085                 break;
1086         case FLASH_CFI_16BIT:
1087                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1088                 break;
1089         case FLASH_CFI_32BIT:
1090                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1091                 break;
1092         case FLASH_CFI_64BIT:
1093                 retval = ((cptr.llp[0] & cword.ll) !=
1094                           (cptr.llp[0] & cword.ll));
1095                 break;
1096         default:
1097                 retval = 0;
1098                 break;
1099         }
1100         return retval;
1101 }
1102
1103 /*-----------------------------------------------------------------------
1104  * read jedec ids from device and set corresponding fields in info struct
1105  *
1106  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1107  *
1108 */
1109 static void flash_read_jedec_ids (flash_info_t * info)
1110 {
1111         info->manufacturer_id = 0;
1112         info->device_id       = 0;
1113         info->device_id2      = 0;
1114
1115         switch (info->vendor) {
1116         case CFI_CMDSET_INTEL_STANDARD:
1117         case CFI_CMDSET_INTEL_EXTENDED:
1118                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1119                 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1120                 udelay(1000); /* some flash are slow to respond */
1121                 info->manufacturer_id = flash_read_uchar (info,
1122                                                 FLASH_OFFSET_MANUFACTURER_ID);
1123                 info->device_id = flash_read_uchar (info,
1124                                                 FLASH_OFFSET_DEVICE_ID);
1125                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1126                 break;
1127         case CFI_CMDSET_AMD_STANDARD:
1128         case CFI_CMDSET_AMD_EXTENDED:
1129                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1130                 flash_unlock_seq(info, 0);
1131                 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1132                 udelay(1000); /* some flash are slow to respond */
1133                 info->manufacturer_id = flash_read_uchar (info,
1134                                                 FLASH_OFFSET_MANUFACTURER_ID);
1135                 info->device_id = flash_read_uchar (info,
1136                                                 FLASH_OFFSET_DEVICE_ID);
1137                 if (info->device_id == 0x7E) {
1138                         /* AMD 3-byte (expanded) device ids */
1139                         info->device_id2 = flash_read_uchar (info,
1140                                                 FLASH_OFFSET_DEVICE_ID2);
1141                         info->device_id2 <<= 8;
1142                         info->device_id2 |= flash_read_uchar (info,
1143                                                 FLASH_OFFSET_DEVICE_ID3);
1144                 }
1145                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1146                 break;
1147         default:
1148                 break;
1149         }
1150 }
1151
1152 /*-----------------------------------------------------------------------
1153  * detect if flash is compatible with the Common Flash Interface (CFI)
1154  * http://www.jedec.org/download/search/jesd68.pdf
1155  *
1156 */
1157 static int flash_detect_cfi (flash_info_t * info)
1158 {
1159         int cfi_offset;
1160         debug ("flash detect cfi\n");
1161
1162         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1163              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1164                 for (info->chipwidth = FLASH_CFI_BY8;
1165                      info->chipwidth <= info->portwidth;
1166                      info->chipwidth <<= 1) {
1167                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1168                         for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1169                                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1170                                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1171                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1172                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1173                                         info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1174                                         info->cfi_offset=flash_offset_cfi[cfi_offset];
1175                                         debug ("device interface is %d\n",
1176                                                 info->interface);
1177                                         debug ("found port %d chip %d ",
1178                                                 info->portwidth, info->chipwidth);
1179                                         debug ("port %d bits chip %d bits\n",
1180                                                 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1181                                                 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1182                                         return 1;
1183                                 }
1184                         }
1185                 }
1186         }
1187         debug ("not found\n");
1188         return 0;
1189 }
1190
1191 /*
1192  * The following code cannot be run from FLASH!
1193  *
1194  */
1195 ulong flash_get_size (ulong base, int banknum)
1196 {
1197         flash_info_t *info = &flash_info[banknum];
1198         int i, j;
1199         flash_sect_t sect_cnt;
1200         unsigned long sector;
1201         unsigned long tmp;
1202         int size_ratio;
1203         uchar num_erase_regions;
1204         int erase_region_size;
1205         int erase_region_count;
1206         int geometry_reversed = 0;
1207
1208         info->ext_addr = 0;
1209         info->cfi_version = 0;
1210 #ifdef CFG_FLASH_PROTECTION
1211         info->legacy_unlock = 0;
1212 #endif
1213
1214         info->start[0] = base;
1215
1216         if (flash_detect_cfi (info)) {
1217                 info->vendor = flash_read_ushort (info, 0,
1218                                         FLASH_OFFSET_PRIMARY_VENDOR);
1219                 flash_read_jedec_ids (info);
1220                 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1221                 num_erase_regions = flash_read_uchar (info,
1222                                         FLASH_OFFSET_NUM_ERASE_REGIONS);
1223                 info->ext_addr = flash_read_ushort (info, 0,
1224                                         FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1225                 if (info->ext_addr) {
1226                         info->cfi_version = (ushort) flash_read_uchar (info,
1227                                                 info->ext_addr + 3) << 8;
1228                         info->cfi_version |= (ushort) flash_read_uchar (info,
1229                                                 info->ext_addr + 4);
1230                 }
1231 #ifdef DEBUG
1232                 flash_printqry (info, 0);
1233 #endif
1234                 switch (info->vendor) {
1235                 case CFI_CMDSET_INTEL_STANDARD:
1236                 case CFI_CMDSET_INTEL_EXTENDED:
1237                 default:
1238                         info->cmd_reset = FLASH_CMD_RESET;
1239 #ifdef CFG_FLASH_PROTECTION
1240                         /* read legacy lock/unlock bit from intel flash */
1241                         if (info->ext_addr) {
1242                                 info->legacy_unlock = flash_read_uchar (info,
1243                                                 info->ext_addr + 5) & 0x08;
1244                         }
1245 #endif
1246                         break;
1247                 case CFI_CMDSET_AMD_STANDARD:
1248                 case CFI_CMDSET_AMD_EXTENDED:
1249                         info->cmd_reset = AMD_CMD_RESET;
1250                         /* check if flash geometry needs reversal */
1251                         if (num_erase_regions <= 1)
1252                                 break;
1253                         /* reverse geometry if top boot part */
1254                         if (info->cfi_version < 0x3131) {
1255                                 /* CFI < 1.1, try to guess from device id */
1256                                 if ((info->device_id & 0x80) != 0) {
1257                                         geometry_reversed = 1;
1258                                 }
1259                                 break;
1260                         }
1261                         /* CFI >= 1.1, deduct from top/bottom flag */
1262                         /* note: ext_addr is valid since cfi_version > 0 */
1263                         if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1264                                 geometry_reversed = 1;
1265                         }
1266                         break;
1267                 }
1268
1269                 debug ("manufacturer is %d\n", info->vendor);
1270                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1271                 debug ("device id is 0x%x\n", info->device_id);
1272                 debug ("device id2 is 0x%x\n", info->device_id2);
1273                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1274
1275                 size_ratio = info->portwidth / info->chipwidth;
1276                 /* if the chip is x8/x16 reduce the ratio by half */
1277                 if ((info->interface == FLASH_CFI_X8X16)
1278                     && (info->chipwidth == FLASH_CFI_BY8)) {
1279                         size_ratio >>= 1;
1280                 }
1281                 debug ("size_ratio %d port %d bits chip %d bits\n",
1282                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1283                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1284                 debug ("found %d erase regions\n", num_erase_regions);
1285                 sect_cnt = 0;
1286                 sector = base;
1287                 for (i = 0; i < num_erase_regions; i++) {
1288                         if (i > NUM_ERASE_REGIONS) {
1289                                 printf ("%d erase regions found, only %d used\n",
1290                                         num_erase_regions, NUM_ERASE_REGIONS);
1291                                 break;
1292                         }
1293                         if (geometry_reversed)
1294                                 tmp = flash_read_long (info, 0,
1295                                                FLASH_OFFSET_ERASE_REGIONS +
1296                                                (num_erase_regions - 1 - i) * 4);
1297                         else
1298                                 tmp = flash_read_long (info, 0,
1299                                                FLASH_OFFSET_ERASE_REGIONS +
1300                                                i * 4);
1301                         erase_region_size =
1302                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1303                         tmp >>= 16;
1304                         erase_region_count = (tmp & 0xffff) + 1;
1305                         debug ("erase_region_count = %d erase_region_size = %d\n",
1306                                 erase_region_count, erase_region_size);
1307                         for (j = 0; j < erase_region_count; j++) {
1308                                 info->start[sect_cnt] = sector;
1309                                 sector += (erase_region_size * size_ratio);
1310
1311                                 /*
1312                                  * Only read protection status from supported devices (intel...)
1313                                  */
1314                                 switch (info->vendor) {
1315                                 case CFI_CMDSET_INTEL_EXTENDED:
1316                                 case CFI_CMDSET_INTEL_STANDARD:
1317                                         info->protect[sect_cnt] =
1318                                                 flash_isset (info, sect_cnt,
1319                                                              FLASH_OFFSET_PROTECT,
1320                                                              FLASH_STATUS_PROTECT);
1321                                         break;
1322                                 default:
1323                                         info->protect[sect_cnt] = 0; /* default: not protected */
1324                                 }
1325
1326                                 sect_cnt++;
1327                         }
1328                 }
1329
1330                 info->sector_count = sect_cnt;
1331                 /* multiply the size by the number of chips */
1332                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1333                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1334                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1335                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1336                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1337                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1338                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1339                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1340                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1341                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1342                 info->flash_id = FLASH_MAN_CFI;
1343                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1344                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1345                 }
1346         }
1347
1348         flash_write_cmd (info, 0, 0, info->cmd_reset);
1349         return (info->size);
1350 }
1351
1352 /* loop through the sectors from the highest address
1353  * when the passed address is greater or equal to the sector address
1354  * we have a match
1355  */
1356 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1357 {
1358         flash_sect_t sector;
1359
1360         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1361                 if (addr >= info->start[sector])
1362                         break;
1363         }
1364         return sector;
1365 }
1366
1367 /*-----------------------------------------------------------------------
1368  */
1369 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1370                                 cfiword_t cword)
1371 {
1372         cfiptr_t ctladdr;
1373         cfiptr_t cptr;
1374         int flag;
1375
1376         ctladdr.cp = flash_make_addr (info, 0, 0);
1377         cptr.cp = (uchar *) dest;
1378
1379
1380         /* Check if Flash is (sufficiently) erased */
1381         switch (info->portwidth) {
1382         case FLASH_CFI_8BIT:
1383                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1384                 break;
1385         case FLASH_CFI_16BIT:
1386                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1387                 break;
1388         case FLASH_CFI_32BIT:
1389                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1390                 break;
1391         case FLASH_CFI_64BIT:
1392                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1393                 break;
1394         default:
1395                 return 2;
1396         }
1397         if (!flag)
1398                 return 2;
1399
1400         /* Disable interrupts which might cause a timeout here */
1401         flag = disable_interrupts ();
1402
1403         switch (info->vendor) {
1404         case CFI_CMDSET_INTEL_EXTENDED:
1405         case CFI_CMDSET_INTEL_STANDARD:
1406                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1407                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1408                 break;
1409         case CFI_CMDSET_AMD_EXTENDED:
1410         case CFI_CMDSET_AMD_STANDARD:
1411                 flash_unlock_seq (info, 0);
1412                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1413                 break;
1414         }
1415
1416         switch (info->portwidth) {
1417         case FLASH_CFI_8BIT:
1418                 cptr.cp[0] = cword.c;
1419                 break;
1420         case FLASH_CFI_16BIT:
1421                 cptr.wp[0] = cword.w;
1422                 break;
1423         case FLASH_CFI_32BIT:
1424                 cptr.lp[0] = cword.l;
1425                 break;
1426         case FLASH_CFI_64BIT:
1427                 cptr.llp[0] = cword.ll;
1428                 break;
1429         }
1430
1431         /* re-enable interrupts if necessary */
1432         if (flag)
1433                 enable_interrupts ();
1434
1435         return flash_full_status_check (info, find_sector (info, dest),
1436                                         info->write_tout, "write");
1437 }
1438
1439 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1440
1441 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1442                                   int len)
1443 {
1444         flash_sect_t sector;
1445         int cnt;
1446         int retcode;
1447         volatile cfiptr_t src;
1448         volatile cfiptr_t dst;
1449
1450         switch (info->vendor) {
1451         case CFI_CMDSET_INTEL_STANDARD:
1452         case CFI_CMDSET_INTEL_EXTENDED:
1453                 src.cp = cp;
1454                 dst.cp = (uchar *) dest;
1455                 sector = find_sector (info, dest);
1456                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1457                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1458                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1459                                                    "write to buffer")) == ERR_OK) {
1460                         /* reduce the number of loops by the width of the port  */
1461                         switch (info->portwidth) {
1462                         case FLASH_CFI_8BIT:
1463                                 cnt = len;
1464                                 break;
1465                         case FLASH_CFI_16BIT:
1466                                 cnt = len >> 1;
1467                                 break;
1468                         case FLASH_CFI_32BIT:
1469                                 cnt = len >> 2;
1470                                 break;
1471                         case FLASH_CFI_64BIT:
1472                                 cnt = len >> 3;
1473                                 break;
1474                         default:
1475                                 return ERR_INVAL;
1476                                 break;
1477                         }
1478                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1479                         while (cnt-- > 0) {
1480                                 switch (info->portwidth) {
1481                                 case FLASH_CFI_8BIT:
1482                                         *dst.cp++ = *src.cp++;
1483                                         break;
1484                                 case FLASH_CFI_16BIT:
1485                                         *dst.wp++ = *src.wp++;
1486                                         break;
1487                                 case FLASH_CFI_32BIT:
1488                                         *dst.lp++ = *src.lp++;
1489                                         break;
1490                                 case FLASH_CFI_64BIT:
1491                                         *dst.llp++ = *src.llp++;
1492                                         break;
1493                                 default:
1494                                         return ERR_INVAL;
1495                                         break;
1496                                 }
1497                         }
1498                         flash_write_cmd (info, sector, 0,
1499                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1500                         retcode = flash_full_status_check (info, sector,
1501                                                            info->buffer_write_tout,
1502                                                            "buffer write");
1503                 }
1504                 return retcode;
1505
1506         case CFI_CMDSET_AMD_STANDARD:
1507         case CFI_CMDSET_AMD_EXTENDED:
1508                 src.cp = cp;
1509                 dst.cp = (uchar *) dest;
1510                 sector = find_sector (info, dest);
1511
1512                 flash_unlock_seq(info,0);
1513                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1514
1515                 switch (info->portwidth) {
1516                 case FLASH_CFI_8BIT:
1517                         cnt = len;
1518                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1519                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1520                         break;
1521                 case FLASH_CFI_16BIT:
1522                         cnt = len >> 1;
1523                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1524                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1525                         break;
1526                 case FLASH_CFI_32BIT:
1527                         cnt = len >> 2;
1528                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1529                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1530                         break;
1531                 case FLASH_CFI_64BIT:
1532                         cnt = len >> 3;
1533                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1534                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1535                         break;
1536                 default:
1537                         return ERR_INVAL;
1538                 }
1539
1540                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1541                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1542                                                    "buffer write");
1543                 return retcode;
1544
1545         default:
1546                 debug ("Unknown Command Set\n");
1547                 return ERR_INVAL;
1548         }
1549 }
1550 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1551 #endif /* CFG_FLASH_CFI */