git.sur5r.net Git - u-boot/blob - drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <watchdog.h>
  49 #include <asm/processor.h>
  50 #include <asm/byteorder.h>
  51 #include <environment.h>
  52 #ifdef  CFG_FLASH_CFI_DRIVER
  53
  54 /*
  55  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  56  * The width of the port and the width of the chips are determined at initialization.
  57  * These widths are used to calculate the address for access CFI data structures.
  58  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  59  *
  60  * References
  61  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  62  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  63  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  64  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  65  *
  66  * TODO
  67  *
  68  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  69  * Table (ALT) to determine if protection is available
  70  *
  71  * Add support for other command sets Use the PRI and ALT to determine command set
  72  * Verify erase and program timeouts.
  73  */
  74
  75 #ifndef CFG_FLASH_BANKS_LIST
  76 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  77 #endif
  78
  79 #define FLASH_CMD_CFI                   0x98
  80 #define FLASH_CMD_READ_ID               0x90
  81 #define FLASH_CMD_RESET                 0xff
  82 #define FLASH_CMD_BLOCK_ERASE           0x20
  83 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  84 #define FLASH_CMD_WRITE                 0x40
  85 #define FLASH_CMD_PROTECT               0x60
  86 #define FLASH_CMD_PROTECT_SET           0x01
  87 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  88 #define FLASH_CMD_CLEAR_STATUS          0x50
  89 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  90 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  91
  92 #define FLASH_STATUS_DONE               0x80
  93 #define FLASH_STATUS_ESS                0x40
  94 #define FLASH_STATUS_ECLBS              0x20
  95 #define FLASH_STATUS_PSLBS              0x10
  96 #define FLASH_STATUS_VPENS              0x08
  97 #define FLASH_STATUS_PSS                0x04
  98 #define FLASH_STATUS_DPS                0x02
  99 #define FLASH_STATUS_R                  0x01
 100 #define FLASH_STATUS_PROTECT            0x01
 101
 102 #define AMD_CMD_RESET                   0xF0
 103 #define AMD_CMD_WRITE                   0xA0
 104 #define AMD_CMD_ERASE_START             0x80
 105 #define AMD_CMD_ERASE_SECTOR            0x30
 106 #define AMD_CMD_UNLOCK_START            0xAA
 107 #define AMD_CMD_UNLOCK_ACK              0x55
 108 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 109 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 110
 111 #define AMD_STATUS_TOGGLE               0x40
 112 #define AMD_STATUS_ERROR                0x20
 113
 114 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 115 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 116 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 117
 118 #define FLASH_OFFSET_CFI                0x55
 119 #define FLASH_OFFSET_CFI_RESP           0x10
 120 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 121 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 122 #define FLASH_OFFSET_WTOUT              0x1F
 123 #define FLASH_OFFSET_WBTOUT             0x20
 124 #define FLASH_OFFSET_ETOUT              0x21
 125 #define FLASH_OFFSET_CETOUT             0x22
 126 #define FLASH_OFFSET_WMAX_TOUT          0x23
 127 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 128 #define FLASH_OFFSET_EMAX_TOUT          0x25
 129 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 130 #define FLASH_OFFSET_SIZE               0x27
 131 #define FLASH_OFFSET_INTERFACE          0x28
 132 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 133 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 134 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 135 #define FLASH_OFFSET_PROTECT            0x02
 136 #define FLASH_OFFSET_USER_PROTECTION    0x85
 137 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 138
 139
 140 #define FLASH_MAN_CFI                   0x01000000
 141
 142 #define CFI_CMDSET_NONE             0
 143 #define CFI_CMDSET_INTEL_EXTENDED   1
 144 #define CFI_CMDSET_AMD_STANDARD     2
 145 #define CFI_CMDSET_INTEL_STANDARD   3
 146 #define CFI_CMDSET_AMD_EXTENDED     4
 147 #define CFI_CMDSET_MITSU_STANDARD   256
 148 #define CFI_CMDSET_MITSU_EXTENDED   257
 149 #define CFI_CMDSET_SST              258
 150
 151
 152 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 153 # undef  FLASH_CMD_RESET
 154 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 155 #endif
 156
 157
 158 typedef union {
 159         unsigned char c;
 160         unsigned short w;
 161         unsigned long l;
 162         unsigned long long ll;
 163 } cfiword_t;
 164
 165 typedef union {
 166         volatile unsigned char *cp;
 167         volatile unsigned short *wp;
 168         volatile unsigned long *lp;
 169         volatile unsigned long long *llp;
 170 } cfiptr_t;
 171
 172 #define NUM_ERASE_REGIONS 4
 173
 174 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 175 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 176 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 177 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 178 #else
 179 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 180 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 181 #endif
 182
 183 /*
 184  * Check if chip width is defined. If not, start detecting with 8bit.
 185  */
 186 #ifndef CFG_FLASH_CFI_WIDTH
 187 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 188 #endif
 189
 190
 191 /*-----------------------------------------------------------------------
 192  * Functions
 193  */
 194
 195 typedef unsigned long flash_sect_t;
 196
 197 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 198 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 199 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 200 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 201 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 202 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 203 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 204 static int flash_detect_cfi (flash_info_t * info);
 205 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 206 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 207                                     ulong tout, char *prompt);
 208 ulong flash_get_size (ulong base, int banknum);
 209 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 210 static flash_info_t *flash_get_info(ulong base);
 211 #endif
 212 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 213 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 214 #endif
 215
 216 /*-----------------------------------------------------------------------
 217  * create an address based on the offset and the port width
 218  */
 219 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 220 {
 221         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 222 }
 223
 224 #ifdef DEBUG
 225 /*-----------------------------------------------------------------------
 226  * Debug support
 227  */
 228 void print_longlong (char *str, unsigned long long data)
 229 {
 230         int i;
 231         char *cp;
 232
 233         cp = (unsigned char *) &data;
 234         for (i = 0; i < 8; i++)
 235                 sprintf (&str[i * 2], "%2.2x", *cp++);
 236 }
 237 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 238 {
 239         cfiptr_t cptr;
 240         int x, y;
 241
 242         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 243                 cptr.cp =
 244                         flash_make_addr (info, sect,
 245                                          x + FLASH_OFFSET_CFI_RESP);
 246                 debug ("%p : ", cptr.cp);
 247                 for (y = 0; y < 16; y++) {
 248                         debug ("%2.2x ", cptr.cp[y]);
 249                 }
 250                 debug (" ");
 251                 for (y = 0; y < 16; y++) {
 252                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 253                                 debug ("%c", cptr.cp[y]);
 254                         } else {
 255                                 debug (".");
 256                         }
 257                 }
 258                 debug ("\n");
 259         }
 260 }
 261 #endif
 262
 263
 264 /*-----------------------------------------------------------------------
 265  * read a character at a port width address
 266  */
 267 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 268 {
 269         uchar *cp;
 270
 271         cp = flash_make_addr (info, 0, offset);
 272 #if defined(__LITTLE_ENDIAN)
 273         return (cp[0]);
 274 #else
 275         return (cp[info->portwidth - 1]);
 276 #endif
 277 }
 278
 279 /*-----------------------------------------------------------------------
 280  * read a short word by swapping for ppc format.
 281  */
 282 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 283 {
 284         uchar *addr;
 285         ushort retval;
 286
 287 #ifdef DEBUG
 288         int x;
 289 #endif
 290         addr = flash_make_addr (info, sect, offset);
 291
 292 #ifdef DEBUG
 293         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 294                info->portwidth);
 295         for (x = 0; x < 2 * info->portwidth; x++) {
 296                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 297         }
 298 #endif
 299 #if defined(__LITTLE_ENDIAN)
 300         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 301 #else
 302         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 303                   addr[info->portwidth - 1]);
 304 #endif
 305
 306         debug ("retval = 0x%x\n", retval);
 307         return retval;
 308 }
 309
 310 /*-----------------------------------------------------------------------
 311  * read a long word by picking the least significant byte of each maiximum
 312  * port size word. Swap for ppc format.
 313  */
 314 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 315 {
 316         uchar *addr;
 317         ulong retval;
 318
 319 #ifdef DEBUG
 320         int x;
 321 #endif
 322         addr = flash_make_addr (info, sect, offset);
 323
 324 #ifdef DEBUG
 325         debug ("long addr is at %p info->portwidth = %d\n", addr,
 326                info->portwidth);
 327         for (x = 0; x < 4 * info->portwidth; x++) {
 328                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 329         }
 330 #endif
 331 #if defined(__LITTLE_ENDIAN)
 332         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 333                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 334 #else
 335         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 336                 (addr[(info->portwidth) - 1] << 16) |
 337                 (addr[(4 * info->portwidth) - 1] << 8) |
 338                 addr[(3 * info->portwidth) - 1];
 339 #endif
 340         return retval;
 341 }
 342
 343
 344 /*-----------------------------------------------------------------------
 345  */
 346 unsigned long flash_init (void)
 347 {
 348         unsigned long size = 0;
 349         int i;
 350
 351 #ifdef CFG_FLASH_PROTECTION
 352         char *s = getenv("unlock");
 353 #endif
 354
 355         /* Init: no FLASHes known */
 356         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 357                 flash_info[i].flash_id = FLASH_UNKNOWN;
 358                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 359                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 360 #ifndef CFG_FLASH_QUIET_TEST
 361                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 362                                 i, flash_info[i].size, flash_info[i].size << 20);
 363 #endif /* CFG_FLASH_QUIET_TEST */
 364                 }
 365 #ifdef CFG_FLASH_PROTECTION
 366                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 367                         /*
 368                          * Only the U-Boot image and it's environment is protected,
 369                          * all other sectors are unprotected (unlocked) if flash
 370                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 371                          * the environment variable "unlock" is set to "yes".
 372                          */
 373                         if (flash_info[i].legacy_unlock) {
 374                                 int k;
 375
 376                                 /*
 377                                  * Disable legacy_unlock temporarily, since
 378                                  * flash_real_protect would relock all other sectors
 379                                  * again otherwise.
 380                                  */
 381                                 flash_info[i].legacy_unlock = 0;
 382
 383                                 /*
 384                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 385                                  * sector. This will unlock all sectors.
 386                                  */
 387                                 flash_real_protect (&flash_info[i], 0, 0);
 388
 389                                 flash_info[i].legacy_unlock = 1;
 390
 391                                 /*
 392                                  * Manually mark other sectors as unlocked (unprotected)
 393                                  */
 394                                 for (k = 1; k < flash_info[i].sector_count; k++)
 395                                         flash_info[i].protect[k] = 0;
 396                         } else {
 397                                 /*
 398                                  * No legancy unlocking -> unlock all sectors
 399                                  */
 400                                 flash_protect (FLAG_PROTECT_CLEAR,
 401                                                flash_info[i].start[0],
 402                                                flash_info[i].start[0] + flash_info[i].size - 1,
 403                                                &flash_info[i]);
 404                         }
 405                 }
 406 #endif /* CFG_FLASH_PROTECTION */
 407         }
 408
 409         /* Monitor protection ON by default */
 410 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 411         flash_protect (FLAG_PROTECT_SET,
 412                        CFG_MONITOR_BASE,
 413                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 414                        flash_get_info(CFG_MONITOR_BASE));
 415 #endif
 416
 417         /* Environment protection ON by default */
 418 #ifdef CFG_ENV_IS_IN_FLASH
 419         flash_protect (FLAG_PROTECT_SET,
 420                        CFG_ENV_ADDR,
 421                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 422                        flash_get_info(CFG_ENV_ADDR));
 423 #endif
 424
 425         /* Redundant environment protection ON by default */
 426 #ifdef CFG_ENV_ADDR_REDUND
 427         flash_protect (FLAG_PROTECT_SET,
 428                        CFG_ENV_ADDR_REDUND,
 429                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 430                        flash_get_info(CFG_ENV_ADDR_REDUND));
 431 #endif
 432         return (size);
 433 }
 434
 435 /*-----------------------------------------------------------------------
 436  */
 437 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 438 static flash_info_t *flash_get_info(ulong base)
 439 {
 440         int i;
 441         flash_info_t * info = 0;
 442
 443         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 444                 info = & flash_info[i];
 445                 if (info->size && info->start[0] <= base &&
 446                     base <= info->start[0] + info->size - 1)
 447                         break;
 448         }
 449
 450         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 451 }
 452 #endif
 453
 454 /*-----------------------------------------------------------------------
 455  */
 456 int flash_erase (flash_info_t * info, int s_first, int s_last)
 457 {
 458         int rcode = 0;
 459         int prot;
 460         flash_sect_t sect;
 461
 462         if (info->flash_id != FLASH_MAN_CFI) {
 463                 puts ("Can't erase unknown flash type - aborted\n");
 464                 return 1;
 465         }
 466         if ((s_first < 0) || (s_first > s_last)) {
 467                 puts ("- no sectors to erase\n");
 468                 return 1;
 469         }
 470
 471         prot = 0;
 472         for (sect = s_first; sect <= s_last; ++sect) {
 473                 if (info->protect[sect]) {
 474                         prot++;
 475                 }
 476         }
 477         if (prot) {
 478                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 479         } else {
 480                 putc ('\n');
 481         }
 482
 483
 484         for (sect = s_first; sect <= s_last; sect++) {
 485                 if (info->protect[sect] == 0) { /* not protected */
 486                         switch (info->vendor) {
 487                         case CFI_CMDSET_INTEL_STANDARD:
 488                         case CFI_CMDSET_INTEL_EXTENDED:
 489                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 490                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 491                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 492                                 break;
 493                         case CFI_CMDSET_AMD_STANDARD:
 494                         case CFI_CMDSET_AMD_EXTENDED:
 495                                 flash_unlock_seq (info, sect);
 496                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 497                                                         AMD_CMD_ERASE_START);
 498                                 flash_unlock_seq (info, sect);
 499                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 500                                 break;
 501                         default:
 502                                 debug ("Unkown flash vendor %d\n",
 503                                        info->vendor);
 504                                 break;
 505                         }
 506
 507                         if (flash_full_status_check
 508                             (info, sect, info->erase_blk_tout, "erase")) {
 509                                 rcode = 1;
 510                         } else
 511                                 putc ('.');
 512                 }
 513         }
 514         puts (" done\n");
 515         return rcode;
 516 }
 517
 518 /*-----------------------------------------------------------------------
 519  */
 520 void flash_print_info (flash_info_t * info)
 521 {
 522         int i;
 523
 524         if (info->flash_id != FLASH_MAN_CFI) {
 525                 puts ("missing or unknown FLASH type\n");
 526                 return;
 527         }
 528
 529         printf ("CFI conformant FLASH (%d x %d)",
 530                 (info->portwidth << 3), (info->chipwidth << 3));
 531         printf ("  Size: %ld MB in %d Sectors\n",
 532                 info->size >> 20, info->sector_count);
 533         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 534                 info->erase_blk_tout,
 535                 info->write_tout,
 536                 info->buffer_write_tout,
 537                 info->buffer_size);
 538
 539         puts ("  Sector Start Addresses:");
 540         for (i = 0; i < info->sector_count; ++i) {
 541 #ifdef CFG_FLASH_EMPTY_INFO
 542                 int k;
 543                 int size;
 544                 int erased;
 545                 volatile unsigned long *flash;
 546
 547                 /*
 548                  * Check if whole sector is erased
 549                  */
 550                 if (i != (info->sector_count - 1))
 551                         size = info->start[i + 1] - info->start[i];
 552                 else
 553                         size = info->start[0] + info->size - info->start[i];
 554                 erased = 1;
 555                 flash = (volatile unsigned long *) info->start[i];
 556                 size = size >> 2;       /* divide by 4 for longword access */
 557                 for (k = 0; k < size; k++) {
 558                         if (*flash++ != 0xffffffff) {
 559                                 erased = 0;
 560                                 break;
 561                         }
 562                 }
 563
 564                 if ((i % 5) == 0)
 565                         printf ("\n");
 566                 /* print empty and read-only info */
 567                 printf (" %08lX%s%s",
 568                         info->start[i],
 569                         erased ? " E" : "  ",
 570                         info->protect[i] ? "RO " : "   ");
 571 #else   /* ! CFG_FLASH_EMPTY_INFO */
 572                 if ((i % 5) == 0)
 573                         printf ("\n   ");
 574                 printf (" %08lX%s",
 575                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 576 #endif
 577         }
 578         putc ('\n');
 579         return;
 580 }
 581
 582 /*-----------------------------------------------------------------------
 583  * Copy memory to flash, returns:
 584  * 0 - OK
 585  * 1 - write timeout
 586  * 2 - Flash not erased
 587  */
 588 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 589 {
 590         ulong wp;
 591         ulong cp;
 592         int aln;
 593         cfiword_t cword;
 594         int i, rc;
 595
 596 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 597         int buffered_size;
 598 #endif
 599         /* get lower aligned address */
 600         /* get lower aligned address */
 601         wp = (addr & ~(info->portwidth - 1));
 602
 603         /* handle unaligned start */
 604         if ((aln = addr - wp) != 0) {
 605                 cword.l = 0;
 606                 cp = wp;
 607                 for (i = 0; i < aln; ++i, ++cp)
 608                         flash_add_byte (info, &cword, (*(uchar *) cp));
 609
 610                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 611                         flash_add_byte (info, &cword, *src++);
 612                         cnt--;
 613                         cp++;
 614                 }
 615                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 616                         flash_add_byte (info, &cword, (*(uchar *) cp));
 617                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 618                         return rc;
 619                 wp = cp;
 620         }
 621
 622         /* handle the aligned part */
 623 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 624         buffered_size = (info->portwidth / info->chipwidth);
 625         buffered_size *= info->buffer_size;
 626         while (cnt >= info->portwidth) {
 627                 /* prohibit buffer write when buffer_size is 1 */
 628                 if (info->buffer_size == 1) {
 629                         cword.l = 0;
 630                         for (i = 0; i < info->portwidth; i++)
 631                                 flash_add_byte (info, &cword, *src++);
 632                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 633                                 return rc;
 634                         wp += info->portwidth;
 635                         cnt -= info->portwidth;
 636                         continue;
 637                 }
 638
 639                 /* write buffer until next buffered_size aligned boundary */
 640                 i = buffered_size - (wp % buffered_size);
 641                 if (i > cnt)
 642                         i = cnt;
 643                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 644                         return rc;
 645                 i -= i & (info->portwidth - 1);
 646                 wp += i;
 647                 src += i;
 648                 cnt -= i;
 649         }
 650 #else
 651         while (cnt >= info->portwidth) {
 652                 cword.l = 0;
 653                 for (i = 0; i < info->portwidth; i++) {
 654                         flash_add_byte (info, &cword, *src++);
 655                 }
 656                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 657                         return rc;
 658                 wp += info->portwidth;
 659                 cnt -= info->portwidth;
 660         }
 661 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 662         if (cnt == 0) {
 663                 return (0);
 664         }
 665
 666         /*
 667          * handle unaligned tail bytes
 668          */
 669         cword.l = 0;
 670         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 671                 flash_add_byte (info, &cword, *src++);
 672                 --cnt;
 673         }
 674         for (; i < info->portwidth; ++i, ++cp) {
 675                 flash_add_byte (info, &cword, (*(uchar *) cp));
 676         }
 677
 678         return flash_write_cfiword (info, wp, cword);
 679 }
 680
 681 /*-----------------------------------------------------------------------
 682  */
 683 #ifdef CFG_FLASH_PROTECTION
 684
 685 int flash_real_protect (flash_info_t * info, long sector, int prot)
 686 {
 687         int retcode = 0;
 688
 689         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 690         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 691         if (prot)
 692                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 693         else
 694                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 695
 696         if ((retcode =
 697              flash_full_status_check (info, sector, info->erase_blk_tout,
 698                                       prot ? "protect" : "unprotect")) == 0) {
 699
 700                 info->protect[sector] = prot;
 701
 702                 /*
 703                  * On some of Intel's flash chips (marked via legacy_unlock)
 704                  * unprotect unprotects all locking.
 705                  */
 706                 if ((prot == 0) && (info->legacy_unlock)) {
 707                         flash_sect_t i;
 708
 709                         for (i = 0; i < info->sector_count; i++) {
 710                                 if (info->protect[i])
 711                                         flash_real_protect (info, i, 1);
 712                         }
 713                 }
 714         }
 715         return retcode;
 716 }
 717
 718 /*-----------------------------------------------------------------------
 719  * flash_read_user_serial - read the OneTimeProgramming cells
 720  */
 721 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 722                              int len)
 723 {
 724         uchar *src;
 725         uchar *dst;
 726
 727         dst = buffer;
 728         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 729         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 730         memcpy (dst, src + offset, len);
 731         flash_write_cmd (info, 0, 0, info->cmd_reset);
 732 }
 733
 734 /*
 735  * flash_read_factory_serial - read the device Id from the protection area
 736  */
 737 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 738                                 int len)
 739 {
 740         uchar *src;
 741
 742         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 743         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 744         memcpy (buffer, src + offset, len);
 745         flash_write_cmd (info, 0, 0, info->cmd_reset);
 746 }
 747
 748 #endif /* CFG_FLASH_PROTECTION */
 749
 750 /*
 751  * flash_is_busy - check to see if the flash is busy
 752  * This routine checks the status of the chip and returns true if the chip is busy
 753  */
 754 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 755 {
 756         int retval;
 757
 758         switch (info->vendor) {
 759         case CFI_CMDSET_INTEL_STANDARD:
 760         case CFI_CMDSET_INTEL_EXTENDED:
 761                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 762                 break;
 763         case CFI_CMDSET_AMD_STANDARD:
 764         case CFI_CMDSET_AMD_EXTENDED:
 765                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 766                 break;
 767         default:
 768                 retval = 0;
 769         }
 770         debug ("flash_is_busy: %d\n", retval);
 771         return retval;
 772 }
 773
 774 /*-----------------------------------------------------------------------
 775  *  wait for XSR.7 to be set. Time out with an error if it does not.
 776  *  This routine does not set the flash to read-array mode.
 777  */
 778 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 779                                ulong tout, char *prompt)
 780 {
 781         ulong start;
 782
 783 #if CFG_HZ != 1000
 784         tout *= CFG_HZ/1000;
 785 #endif
 786
 787         /* Wait for command completion */
 788         start = get_timer (0);
 789         while (flash_is_busy (info, sector)) {
 790                 if (get_timer (start) > tout) {
 791                         printf ("Flash %s timeout at address %lx data %lx\n",
 792                                 prompt, info->start[sector],
 793                                 flash_read_long (info, sector, 0));
 794                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 795                         return ERR_TIMOUT;
 796                 }
 797         }
 798         return ERR_OK;
 799 }
 800
 801 /*-----------------------------------------------------------------------
 802  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 803  * This routine sets the flash to read-array mode.
 804  */
 805 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 806                                     ulong tout, char *prompt)
 807 {
 808         int retcode;
 809
 810         retcode = flash_status_check (info, sector, tout, prompt);
 811         switch (info->vendor) {
 812         case CFI_CMDSET_INTEL_EXTENDED:
 813         case CFI_CMDSET_INTEL_STANDARD:
 814                 if ((retcode == ERR_OK)
 815                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 816                         retcode = ERR_INVAL;
 817                         printf ("Flash %s error at address %lx\n", prompt,
 818                                 info->start[sector]);
 819                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 820                                 puts ("Command Sequence Error.\n");
 821                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 822                                 puts ("Block Erase Error.\n");
 823                                 retcode = ERR_NOT_ERASED;
 824                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 825                                 puts ("Locking Error\n");
 826                         }
 827                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 828                                 puts ("Block locked.\n");
 829                                 retcode = ERR_PROTECTED;
 830                         }
 831                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 832                                 puts ("Vpp Low Error.\n");
 833                 }
 834                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 835                 break;
 836         default:
 837                 break;
 838         }
 839         return retcode;
 840 }
 841
 842 /*-----------------------------------------------------------------------
 843  */
 844 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 845 {
 846 #if defined(__LITTLE_ENDIAN)
 847         unsigned short  w;
 848         unsigned int    l;
 849         unsigned long long ll;
 850 #endif
 851
 852         switch (info->portwidth) {
 853         case FLASH_CFI_8BIT:
 854                 cword->c = c;
 855                 break;
 856         case FLASH_CFI_16BIT:
 857 #if defined(__LITTLE_ENDIAN)
 858                 w = c;
 859                 w <<= 8;
 860                 cword->w = (cword->w >> 8) | w;
 861 #else
 862                 cword->w = (cword->w << 8) | c;
 863 #endif
 864                 break;
 865         case FLASH_CFI_32BIT:
 866 #if defined(__LITTLE_ENDIAN)
 867                 l = c;
 868                 l <<= 24;
 869                 cword->l = (cword->l >> 8) | l;
 870 #else
 871                 cword->l = (cword->l << 8) | c;
 872 #endif
 873                 break;
 874         case FLASH_CFI_64BIT:
 875 #if defined(__LITTLE_ENDIAN)
 876                 ll = c;
 877                 ll <<= 56;
 878                 cword->ll = (cword->ll >> 8) | ll;
 879 #else
 880                 cword->ll = (cword->ll << 8) | c;
 881 #endif
 882                 break;
 883         }
 884 }
 885
 886
 887 /*-----------------------------------------------------------------------
 888  * make a proper sized command based on the port and chip widths
 889  */
 890 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 891 {
 892         int i;
 893         uchar *cp = (uchar *) cmdbuf;
 894
 895 #if defined(__LITTLE_ENDIAN)
 896         for (i = info->portwidth; i > 0; i--)
 897 #else
 898         for (i = 1; i <= info->portwidth; i++)
 899 #endif
 900                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 901 }
 902
 903 /*
 904  * Write a proper sized command to the correct address
 905  */
 906 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 907 {
 908
 909         volatile cfiptr_t addr;
 910         cfiword_t cword;
 911
 912         addr.cp = flash_make_addr (info, sect, offset);
 913         flash_make_cmd (info, cmd, &cword);
 914         switch (info->portwidth) {
 915         case FLASH_CFI_8BIT:
 916                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 917                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 918                 *addr.cp = cword.c;
 919 #ifdef CONFIG_BLACKFIN
 920                 asm("ssync;");
 921 #endif
 922                 break;
 923         case FLASH_CFI_16BIT:
 924                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 925                        cmd, cword.w,
 926                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 927                 *addr.wp = cword.w;
 928 #ifdef CONFIG_BLACKFIN
 929                 asm("ssync;");
 930 #endif
 931                 break;
 932         case FLASH_CFI_32BIT:
 933                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 934                        cmd, cword.l,
 935                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 936                 *addr.lp = cword.l;
 937 #ifdef CONFIG_BLACKFIN
 938                 asm("ssync;");
 939 #endif
 940                 break;
 941         case FLASH_CFI_64BIT:
 942 #ifdef DEBUG
 943                 {
 944                         char str[20];
 945
 946                         print_longlong (str, cword.ll);
 947
 948                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 949                                addr.llp, cmd, str,
 950                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 951                 }
 952 #endif
 953                 *addr.llp = cword.ll;
 954 #ifdef CONFIG_BLACKFIN
 955                 asm("ssync;");
 956 #endif
 957                 break;
 958         }
 959 }
 960
 961 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 962 {
 963         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 964         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 965 }
 966
 967 /*-----------------------------------------------------------------------
 968  */
 969 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 970 {
 971         cfiptr_t cptr;
 972         cfiword_t cword;
 973         int retval;
 974
 975         cptr.cp = flash_make_addr (info, sect, offset);
 976         flash_make_cmd (info, cmd, &cword);
 977
 978         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 979         switch (info->portwidth) {
 980         case FLASH_CFI_8BIT:
 981                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 982                 retval = (cptr.cp[0] == cword.c);
 983                 break;
 984         case FLASH_CFI_16BIT:
 985                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 986                 retval = (cptr.wp[0] == cword.w);
 987                 break;
 988         case FLASH_CFI_32BIT:
 989                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 990                 retval = (cptr.lp[0] == cword.l);
 991                 break;
 992         case FLASH_CFI_64BIT:
 993 #ifdef DEBUG
 994                 {
 995                         char str1[20];
 996                         char str2[20];
 997
 998                         print_longlong (str1, cptr.llp[0]);
 999                         print_longlong (str2, cword.ll);
1000                         debug ("is= %s %s\n", str1, str2);
1001                 }
1002 #endif
1003                 retval = (cptr.llp[0] == cword.ll);
1004                 break;
1005         default:
1006                 retval = 0;
1007                 break;
1008         }
1009         return retval;
1010 }
1011
1012 /*-----------------------------------------------------------------------
1013  */
1014 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1015 {
1016         cfiptr_t cptr;
1017         cfiword_t cword;
1018         int retval;
1019
1020         cptr.cp = flash_make_addr (info, sect, offset);
1021         flash_make_cmd (info, cmd, &cword);
1022         switch (info->portwidth) {
1023         case FLASH_CFI_8BIT:
1024                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1025                 break;
1026         case FLASH_CFI_16BIT:
1027                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1028                 break;
1029         case FLASH_CFI_32BIT:
1030                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1031                 break;
1032         case FLASH_CFI_64BIT:
1033                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1034                 break;
1035         default:
1036                 retval = 0;
1037                 break;
1038         }
1039         return retval;
1040 }
1041
1042 /*-----------------------------------------------------------------------
1043  */
1044 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1045 {
1046         cfiptr_t cptr;
1047         cfiword_t cword;
1048         int retval;
1049
1050         cptr.cp = flash_make_addr (info, sect, offset);
1051         flash_make_cmd (info, cmd, &cword);
1052         switch (info->portwidth) {
1053         case FLASH_CFI_8BIT:
1054                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1055                 break;
1056         case FLASH_CFI_16BIT:
1057                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1058                 break;
1059         case FLASH_CFI_32BIT:
1060                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1061                 break;
1062         case FLASH_CFI_64BIT:
1063                 retval = ((cptr.llp[0] & cword.ll) !=
1064                           (cptr.llp[0] & cword.ll));
1065                 break;
1066         default:
1067                 retval = 0;
1068                 break;
1069         }
1070         return retval;
1071 }
1072
1073 /*-----------------------------------------------------------------------
1074  * detect if flash is compatible with the Common Flash Interface (CFI)
1075  * http://www.jedec.org/download/search/jesd68.pdf
1076  *
1077 */
1078 static int flash_detect_cfi (flash_info_t * info)
1079 {
1080         debug ("flash detect cfi\n");
1081
1082         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1083              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1084                 for (info->chipwidth = FLASH_CFI_BY8;
1085                      info->chipwidth <= info->portwidth;
1086                      info->chipwidth <<= 1) {
1087                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1088                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1089                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1090                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1091                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1092                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1093                                 debug ("device interface is %d\n",
1094                                        info->interface);
1095                                 debug ("found port %d chip %d ",
1096                                        info->portwidth, info->chipwidth);
1097                                 debug ("port %d bits chip %d bits\n",
1098                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1099                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1100                                 return 1;
1101                         }
1102                 }
1103         }
1104         debug ("not found\n");
1105         return 0;
1106 }
1107
1108 /*
1109  * The following code cannot be run from FLASH!
1110  *
1111  */
1112 ulong flash_get_size (ulong base, int banknum)
1113 {
1114         flash_info_t *info = &flash_info[banknum];
1115         int i, j;
1116         flash_sect_t sect_cnt;
1117         unsigned long sector;
1118         unsigned long tmp;
1119         int size_ratio;
1120         uchar num_erase_regions;
1121         int erase_region_size;
1122         int erase_region_count;
1123 #ifdef CFG_FLASH_PROTECTION
1124         int ext_addr;
1125         info->legacy_unlock = 0;
1126 #endif
1127
1128         info->start[0] = base;
1129
1130         if (flash_detect_cfi (info)) {
1131                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1132 #ifdef DEBUG
1133                 flash_printqry (info, 0);
1134 #endif
1135                 switch (info->vendor) {
1136                 case CFI_CMDSET_INTEL_STANDARD:
1137                 case CFI_CMDSET_INTEL_EXTENDED:
1138                 default:
1139                         info->cmd_reset = FLASH_CMD_RESET;
1140 #ifdef CFG_FLASH_PROTECTION
1141                         /* read legacy lock/unlock bit from intel flash */
1142                         ext_addr = flash_read_ushort (info, 0,
1143                                                       FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1144                         info->legacy_unlock =
1145                                 flash_read_uchar (info, ext_addr + 5) & 0x08;
1146 #endif
1147                         break;
1148                 case CFI_CMDSET_AMD_STANDARD:
1149                 case CFI_CMDSET_AMD_EXTENDED:
1150                         info->cmd_reset = AMD_CMD_RESET;
1151                         break;
1152                 }
1153
1154                 debug ("manufacturer is %d\n", info->vendor);
1155                 size_ratio = info->portwidth / info->chipwidth;
1156                 /* if the chip is x8/x16 reduce the ratio by half */
1157                 if ((info->interface == FLASH_CFI_X8X16)
1158                     && (info->chipwidth == FLASH_CFI_BY8)) {
1159                         size_ratio >>= 1;
1160                 }
1161                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1162                 debug ("size_ratio %d port %d bits chip %d bits\n",
1163                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1164                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1165                 debug ("found %d erase regions\n", num_erase_regions);
1166                 sect_cnt = 0;
1167                 sector = base;
1168                 for (i = 0; i < num_erase_regions; i++) {
1169                         if (i > NUM_ERASE_REGIONS) {
1170                                 printf ("%d erase regions found, only %d used\n",
1171                                         num_erase_regions, NUM_ERASE_REGIONS);
1172                                 break;
1173                         }
1174                         tmp = flash_read_long (info, 0,
1175                                                FLASH_OFFSET_ERASE_REGIONS +
1176                                                i * 4);
1177                         erase_region_size =
1178                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1179                         tmp >>= 16;
1180                         erase_region_count = (tmp & 0xffff) + 1;
1181                         debug ("erase_region_count = %d erase_region_size = %d\n",
1182                                 erase_region_count, erase_region_size);
1183                         for (j = 0; j < erase_region_count; j++) {
1184                                 info->start[sect_cnt] = sector;
1185                                 sector += (erase_region_size * size_ratio);
1186
1187                                 /*
1188                                  * Only read protection status from supported devices (intel...)
1189                                  */
1190                                 switch (info->vendor) {
1191                                 case CFI_CMDSET_INTEL_EXTENDED:
1192                                 case CFI_CMDSET_INTEL_STANDARD:
1193                                         info->protect[sect_cnt] =
1194                                                 flash_isset (info, sect_cnt,
1195                                                              FLASH_OFFSET_PROTECT,
1196                                                              FLASH_STATUS_PROTECT);
1197                                         break;
1198                                 default:
1199                                         info->protect[sect_cnt] = 0; /* default: not protected */
1200                                 }
1201
1202                                 sect_cnt++;
1203                         }
1204                 }
1205
1206                 info->sector_count = sect_cnt;
1207                 /* multiply the size by the number of chips */
1208                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1209                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1210                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1211                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1212                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1213                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1214                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1215                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1216                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1217                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1218                 info->flash_id = FLASH_MAN_CFI;
1219                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1220                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1221                 }
1222         }
1223
1224         flash_write_cmd (info, 0, 0, info->cmd_reset);
1225         return (info->size);
1226 }
1227
1228 /* loop through the sectors from the highest address
1229  * when the passed address is greater or equal to the sector address
1230  * we have a match
1231  */
1232 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1233 {
1234         flash_sect_t sector;
1235
1236         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1237                 if (addr >= info->start[sector])
1238                         break;
1239         }
1240         return sector;
1241 }
1242
1243 /*-----------------------------------------------------------------------
1244  */
1245 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1246                                 cfiword_t cword)
1247 {
1248         cfiptr_t ctladdr;
1249         cfiptr_t cptr;
1250         int flag;
1251
1252         ctladdr.cp = flash_make_addr (info, 0, 0);
1253         cptr.cp = (uchar *) dest;
1254
1255
1256         /* Check if Flash is (sufficiently) erased */
1257         switch (info->portwidth) {
1258         case FLASH_CFI_8BIT:
1259                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1260                 break;
1261         case FLASH_CFI_16BIT:
1262                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1263                 break;
1264         case FLASH_CFI_32BIT:
1265                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1266                 break;
1267         case FLASH_CFI_64BIT:
1268                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1269                 break;
1270         default:
1271                 return 2;
1272         }
1273         if (!flag)
1274                 return 2;
1275
1276         /* Disable interrupts which might cause a timeout here */
1277         flag = disable_interrupts ();
1278
1279         switch (info->vendor) {
1280         case CFI_CMDSET_INTEL_EXTENDED:
1281         case CFI_CMDSET_INTEL_STANDARD:
1282                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1283                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1284                 break;
1285         case CFI_CMDSET_AMD_EXTENDED:
1286         case CFI_CMDSET_AMD_STANDARD:
1287                 flash_unlock_seq (info, 0);
1288                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1289                 break;
1290         }
1291
1292         switch (info->portwidth) {
1293         case FLASH_CFI_8BIT:
1294                 cptr.cp[0] = cword.c;
1295                 break;
1296         case FLASH_CFI_16BIT:
1297                 cptr.wp[0] = cword.w;
1298                 break;
1299         case FLASH_CFI_32BIT:
1300                 cptr.lp[0] = cword.l;
1301                 break;
1302         case FLASH_CFI_64BIT:
1303                 cptr.llp[0] = cword.ll;
1304                 break;
1305         }
1306
1307         /* re-enable interrupts if necessary */
1308         if (flag)
1309                 enable_interrupts ();
1310
1311 #if defined(CONFIG_MCF52x2)
1312         WATCHDOG_RESET();
1313 #endif
1314
1315         return flash_full_status_check (info, find_sector (info, dest),
1316                                         info->write_tout, "write");
1317 }
1318
1319 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1320
1321 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1322                                   int len)
1323 {
1324         flash_sect_t sector;
1325         int cnt;
1326         int retcode;
1327         volatile cfiptr_t src;
1328         volatile cfiptr_t dst;
1329
1330         switch (info->vendor) {
1331         case CFI_CMDSET_INTEL_STANDARD:
1332         case CFI_CMDSET_INTEL_EXTENDED:
1333                 src.cp = cp;
1334                 dst.cp = (uchar *) dest;
1335                 sector = find_sector (info, dest);
1336                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1337                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1338                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1339                                                    "write to buffer")) == ERR_OK) {
1340                         /* reduce the number of loops by the width of the port  */
1341                         switch (info->portwidth) {
1342                         case FLASH_CFI_8BIT:
1343                                 cnt = len;
1344                                 break;
1345                         case FLASH_CFI_16BIT:
1346                                 cnt = len >> 1;
1347                                 break;
1348                         case FLASH_CFI_32BIT:
1349                                 cnt = len >> 2;
1350                                 break;
1351                         case FLASH_CFI_64BIT:
1352                                 cnt = len >> 3;
1353                                 break;
1354                         default:
1355                                 return ERR_INVAL;
1356                                 break;
1357                         }
1358                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1359                         while (cnt-- > 0) {
1360                                 switch (info->portwidth) {
1361                                 case FLASH_CFI_8BIT:
1362                                         *dst.cp++ = *src.cp++;
1363                                         break;
1364                                 case FLASH_CFI_16BIT:
1365                                         *dst.wp++ = *src.wp++;
1366                                         break;
1367                                 case FLASH_CFI_32BIT:
1368                                         *dst.lp++ = *src.lp++;
1369                                         break;
1370                                 case FLASH_CFI_64BIT:
1371                                         *dst.llp++ = *src.llp++;
1372                                         break;
1373                                 default:
1374                                         return ERR_INVAL;
1375                                         break;
1376                                 }
1377                         }
1378                         flash_write_cmd (info, sector, 0,
1379                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1380                         retcode = flash_full_status_check (info, sector,
1381                                                            info->buffer_write_tout,
1382                                                            "buffer write");
1383                 }
1384                 return retcode;
1385
1386         case CFI_CMDSET_AMD_STANDARD:
1387         case CFI_CMDSET_AMD_EXTENDED:
1388                 src.cp = cp;
1389                 dst.cp = (uchar *) dest;
1390                 sector = find_sector (info, dest);
1391
1392                 flash_unlock_seq(info,0);
1393                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1394
1395                 switch (info->portwidth) {
1396                 case FLASH_CFI_8BIT:
1397                         cnt = len;
1398                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1399                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1400                         break;
1401                 case FLASH_CFI_16BIT:
1402                         cnt = len >> 1;
1403                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1404                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1405                         break;
1406                 case FLASH_CFI_32BIT:
1407                         cnt = len >> 2;
1408                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1409                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1410                         break;
1411                 case FLASH_CFI_64BIT:
1412                         cnt = len >> 3;
1413                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1414                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1415                         break;
1416                 default:
1417                         return ERR_INVAL;
1418                 }
1419
1420                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1421                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1422                                                    "buffer write");
1423                 return retcode;
1424
1425         default:
1426                 debug ("Unknown Command Set\n");
1427                 return ERR_INVAL;
1428         }
1429 }
1430 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1431 #endif /* CFG_FLASH_CFI */