2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <clk-uclass.h>
13 #include <mach/at91_pmc.h>
14 #include <mach/sama5_sfr.h>
17 DECLARE_GLOBAL_DATA_PTR;
20 * The purpose of this clock is to generate a 480 MHz signal. A different
21 * rate can't be configured.
23 #define UTMI_RATE 480000000
25 static int utmi_clk_enable(struct clk *clk)
27 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
28 struct at91_pmc *pmc = plat->reg_base;
31 u32 utmi_ref_clk_freq;
35 if (readl(&pmc->sr) & AT91_PMC_LOCKU)
39 * If mainck rate is different from 12 MHz, we have to configure the
40 * FREQ field of the SFR_UTMICKTRIM register to generate properly
43 err = clk_get_by_index(clk->dev, 0, &clk_dev);
47 clk_rate = clk_get_rate(&clk_dev);
50 utmi_ref_clk_freq = 0;
53 utmi_ref_clk_freq = 1;
56 utmi_ref_clk_freq = 2;
59 * Not supported on SAMA5D2 but it's not an issue since MAINCK
60 * maximum value is 24 MHz.
63 utmi_ref_clk_freq = 3;
66 printf("UTMICK: unsupported mainck rate\n");
70 if (plat->regmap_sfr) {
71 err = regmap_read(plat->regmap_sfr, AT91_SFR_UTMICKTRIM, &tmp);
75 tmp &= ~AT91_UTMICKTRIM_FREQ;
76 tmp |= utmi_ref_clk_freq;
77 err = regmap_write(plat->regmap_sfr, AT91_SFR_UTMICKTRIM, tmp);
80 } else if (utmi_ref_clk_freq) {
81 printf("UTMICK: sfr node required\n");
85 tmp = readl(&pmc->uckr);
86 tmp |= AT91_PMC_UPLLEN |
89 writel(tmp, &pmc->uckr);
91 while (!(readl(&pmc->sr) & AT91_PMC_LOCKU))
97 static ulong utmi_clk_get_rate(struct clk *clk)
99 /* UTMI clk rate is fixed. */
103 static struct clk_ops utmi_clk_ops = {
104 .enable = utmi_clk_enable,
105 .get_rate = utmi_clk_get_rate,
108 static int utmi_clk_ofdata_to_platdata(struct udevice *dev)
110 struct pmc_platdata *plat = dev_get_platdata(dev);
111 struct udevice *syscon;
113 uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
114 "regmap-sfr", &syscon);
117 plat->regmap_sfr = syscon_get_regmap(syscon);
122 static int utmi_clk_probe(struct udevice *dev)
124 return at91_pmc_core_probe(dev);
127 static const struct udevice_id utmi_clk_match[] = {
128 { .compatible = "atmel,at91sam9x5-clk-utmi" },
132 U_BOOT_DRIVER(at91sam9x5_utmi_clk) = {
133 .name = "at91sam9x5-utmi-clk",
135 .of_match = utmi_clk_match,
136 .probe = utmi_clk_probe,
137 .ofdata_to_platdata = utmi_clk_ofdata_to_platdata,
138 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
139 .ops = &utmi_clk_ops,