]> git.sur5r.net Git - u-boot/blob - drivers/clk/clk-uclass.c
Merge git://git.denx.de/u-boot-fdt
[u-boot] / drivers / clk / clk-uclass.c
1 /*
2  * Copyright (C) 2015 Google, Inc
3  * Written by Simon Glass <sjg@chromium.org>
4  * Copyright (c) 2016, NVIDIA CORPORATION.
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 #include <common.h>
10 #include <clk.h>
11 #include <clk-uclass.h>
12 #include <dm.h>
13 #include <dt-structs.h>
14 #include <errno.h>
15
16 DECLARE_GLOBAL_DATA_PTR;
17
18 static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
19 {
20         return (struct clk_ops *)dev->driver->ops;
21 }
22
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
25 int clk_get_by_index_platdata(struct udevice *dev, int index,
26                               struct phandle_2_cell *cells, struct clk *clk)
27 {
28         int ret;
29
30         if (index != 0)
31                 return -ENOSYS;
32         ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
33         if (ret)
34                 return ret;
35         clk->id = cells[0].id;
36
37         return 0;
38 }
39 # else
40 static int clk_of_xlate_default(struct clk *clk,
41                                 struct fdtdec_phandle_args *args)
42 {
43         debug("%s(clk=%p)\n", __func__, clk);
44
45         if (args->args_count > 1) {
46                 debug("Invaild args_count: %d\n", args->args_count);
47                 return -EINVAL;
48         }
49
50         if (args->args_count)
51                 clk->id = args->args[0];
52         else
53                 clk->id = 0;
54
55         return 0;
56 }
57
58 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
59 {
60         int ret;
61         struct fdtdec_phandle_args args;
62         struct udevice *dev_clk;
63         struct clk_ops *ops;
64
65         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
66
67         assert(clk);
68         ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
69                                              "clocks", "#clock-cells", 0, index,
70                                              &args);
71         if (ret) {
72                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
73                       __func__, ret);
74                 return ret;
75         }
76
77         ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &dev_clk);
78         if (ret) {
79                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
80                       __func__, ret);
81                 return ret;
82         }
83         ops = clk_dev_ops(dev_clk);
84
85         if (ops->of_xlate)
86                 ret = ops->of_xlate(clk, &args);
87         else
88                 ret = clk_of_xlate_default(clk, &args);
89         if (ret) {
90                 debug("of_xlate() failed: %d\n", ret);
91                 return ret;
92         }
93
94         return clk_request(dev_clk, clk);
95 }
96 # endif /* OF_PLATDATA */
97
98 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
99 {
100         int index;
101
102         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
103
104         index = fdt_stringlist_search(gd->fdt_blob, dev->of_offset,
105                                       "clock-names", name);
106         if (index < 0) {
107                 debug("fdt_stringlist_search() failed: %d\n", index);
108                 return index;
109         }
110
111         return clk_get_by_index(dev, index, clk);
112 }
113 #endif /* OF_CONTROL */
114
115 int clk_request(struct udevice *dev, struct clk *clk)
116 {
117         struct clk_ops *ops = clk_dev_ops(dev);
118
119         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
120
121         clk->dev = dev;
122
123         if (!ops->request)
124                 return 0;
125
126         return ops->request(clk);
127 }
128
129 int clk_free(struct clk *clk)
130 {
131         struct clk_ops *ops = clk_dev_ops(clk->dev);
132
133         debug("%s(clk=%p)\n", __func__, clk);
134
135         if (!ops->free)
136                 return 0;
137
138         return ops->free(clk);
139 }
140
141 ulong clk_get_rate(struct clk *clk)
142 {
143         struct clk_ops *ops = clk_dev_ops(clk->dev);
144
145         debug("%s(clk=%p)\n", __func__, clk);
146
147         if (!ops->get_rate)
148                 return -ENOSYS;
149
150         return ops->get_rate(clk);
151 }
152
153 ulong clk_set_rate(struct clk *clk, ulong rate)
154 {
155         struct clk_ops *ops = clk_dev_ops(clk->dev);
156
157         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
158
159         if (!ops->set_rate)
160                 return -ENOSYS;
161
162         return ops->set_rate(clk, rate);
163 }
164
165 int clk_enable(struct clk *clk)
166 {
167         struct clk_ops *ops = clk_dev_ops(clk->dev);
168
169         debug("%s(clk=%p)\n", __func__, clk);
170
171         if (!ops->enable)
172                 return -ENOSYS;
173
174         return ops->enable(clk);
175 }
176
177 int clk_disable(struct clk *clk)
178 {
179         struct clk_ops *ops = clk_dev_ops(clk->dev);
180
181         debug("%s(clk=%p)\n", __func__, clk);
182
183         if (!ops->disable)
184                 return -ENOSYS;
185
186         return ops->disable(clk);
187 }
188
189 UCLASS_DRIVER(clk) = {
190         .id             = UCLASS_CLK,
191         .name           = "clk",
192 };