git.sur5r.net Git - u-boot/blob - drivers/clk/clk-uclass.c

   1 /*
   2  * Copyright (C) 2015 Google, Inc
   3  * Written by Simon Glass <sjg@chromium.org>
   4  * Copyright (c) 2016, NVIDIA CORPORATION.
   5  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <clk.h>
  12 #include <clk-uclass.h>
  13 #include <dm.h>
  14 #include <dm/read.h>
  15 #include <dt-structs.h>
  16 #include <errno.h>
  17
  18 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  19 {
  20         return (const struct clk_ops *)dev->driver->ops;
  21 }
  22
  23 #if CONFIG_IS_ENABLED(OF_CONTROL)
  24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
  25 int clk_get_by_index_platdata(struct udevice *dev, int index,
  26                               struct phandle_1_arg *cells, struct clk *clk)
  27 {
  28         int ret;
  29
  30         if (index != 0)
  31                 return -ENOSYS;
  32         ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
  33         if (ret)
  34                 return ret;
  35         clk->id = cells[0].arg[0];
  36
  37         return 0;
  38 }
  39 # else
  40 static int clk_of_xlate_default(struct clk *clk,
  41                                 struct ofnode_phandle_args *args)
  42 {
  43         debug("%s(clk=%p)\n", __func__, clk);
  44
  45         if (args->args_count > 1) {
  46                 debug("Invaild args_count: %d\n", args->args_count);
  47                 return -EINVAL;
  48         }
  49
  50         if (args->args_count)
  51                 clk->id = args->args[0];
  52         else
  53                 clk->id = 0;
  54
  55         return 0;
  56 }
  57
  58 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
  59                                    int index, struct clk *clk)
  60 {
  61         int ret;
  62         struct ofnode_phandle_args args;
  63         struct udevice *dev_clk;
  64         const struct clk_ops *ops;
  65
  66         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
  67
  68         assert(clk);
  69         clk->dev = NULL;
  70
  71         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
  72                                          index, &args);
  73         if (ret) {
  74                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
  75                       __func__, ret);
  76                 return ret;
  77         }
  78
  79         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
  80         if (ret) {
  81                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  82                       __func__, ret);
  83                 return ret;
  84         }
  85
  86         clk->dev = dev_clk;
  87
  88         ops = clk_dev_ops(dev_clk);
  89
  90         if (ops->of_xlate)
  91                 ret = ops->of_xlate(clk, &args);
  92         else
  93                 ret = clk_of_xlate_default(clk, &args);
  94         if (ret) {
  95                 debug("of_xlate() failed: %d\n", ret);
  96                 return ret;
  97         }
  98
  99         return clk_request(dev_clk, clk);
 100 }
 101
 102 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 103 {
 104         return clk_get_by_indexed_prop(dev, "clocks", index, clk);
 105 }
 106
 107 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 108 {
 109         int i, ret, err, count;
 110
 111         bulk->count = 0;
 112
 113         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
 114         if (count < 1)
 115                 return count;
 116
 117         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
 118         if (!bulk->clks)
 119                 return -ENOMEM;
 120
 121         for (i = 0; i < count; i++) {
 122                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
 123                 if (ret < 0)
 124                         goto bulk_get_err;
 125
 126                 ++bulk->count;
 127         }
 128
 129         return 0;
 130
 131 bulk_get_err:
 132         err = clk_release_all(bulk->clks, bulk->count);
 133         if (err)
 134                 debug("%s: could release all clocks for %p\n",
 135                       __func__, dev);
 136
 137         return ret;
 138 }
 139
 140 static int clk_set_default_parents(struct udevice *dev)
 141 {
 142         struct clk clk, parent_clk;
 143         int index;
 144         int num_parents;
 145         int ret;
 146
 147         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 148                                                   "#clock-cells");
 149         if (num_parents < 0) {
 150                 debug("%s: could not read assigned-clock-parents for %p\n",
 151                       __func__, dev);
 152                 return 0;
 153         }
 154
 155         for (index = 0; index < num_parents; index++) {
 156                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
 157                                               index, &parent_clk);
 158                 if (ret) {
 159                         debug("%s: could not get parent clock %d for %s\n",
 160                               __func__, index, dev_read_name(dev));
 161                         return ret;
 162                 }
 163
 164                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 165                                               index, &clk);
 166                 if (ret) {
 167                         debug("%s: could not get assigned clock %d for %s\n",
 168                               __func__, index, dev_read_name(dev));
 169                         return ret;
 170                 }
 171
 172                 ret = clk_set_parent(&clk, &parent_clk);
 173
 174                 /*
 175                  * Not all drivers may support clock-reparenting (as of now).
 176                  * Ignore errors due to this.
 177                  */
 178                 if (ret == -ENOSYS)
 179                         continue;
 180
 181                 if (ret) {
 182                         debug("%s: failed to reparent clock %d for %s\n",
 183                               __func__, index, dev_read_name(dev));
 184                         return ret;
 185                 }
 186         }
 187
 188         return 0;
 189 }
 190
 191 static int clk_set_default_rates(struct udevice *dev)
 192 {
 193         struct clk clk;
 194         int index;
 195         int num_rates;
 196         int size;
 197         int ret = 0;
 198         u32 *rates = NULL;
 199
 200         size = dev_read_size(dev, "assigned-clock-rates");
 201         if (size < 0)
 202                 return 0;
 203
 204         num_rates = size / sizeof(u32);
 205         rates = calloc(num_rates, sizeof(u32));
 206         if (!rates)
 207                 return -ENOMEM;
 208
 209         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
 210         if (ret)
 211                 goto fail;
 212
 213         for (index = 0; index < num_rates; index++) {
 214                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 215                                               index, &clk);
 216                 if (ret) {
 217                         debug("%s: could not get assigned clock %d for %s\n",
 218                               __func__, index, dev_read_name(dev));
 219                         continue;
 220                 }
 221
 222                 ret = clk_set_rate(&clk, rates[index]);
 223                 if (ret < 0) {
 224                         debug("%s: failed to set rate on clock %d for %s\n",
 225                               __func__, index, dev_read_name(dev));
 226                         break;
 227                 }
 228         }
 229
 230 fail:
 231         free(rates);
 232         return ret;
 233 }
 234
 235 int clk_set_defaults(struct udevice *dev)
 236 {
 237         int ret;
 238
 239         /* If this is running pre-reloc state, don't take any action. */
 240         if (!(gd->flags & GD_FLG_RELOC))
 241                 return 0;
 242
 243         debug("%s(%s)\n", __func__, dev_read_name(dev));
 244
 245         ret = clk_set_default_parents(dev);
 246         if (ret)
 247                 return ret;
 248
 249         ret = clk_set_default_rates(dev);
 250         if (ret < 0)
 251                 return ret;
 252
 253         return 0;
 254 }
 255 # endif /* OF_PLATDATA */
 256
 257 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 258 {
 259         int index;
 260
 261         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
 262         clk->dev = NULL;
 263
 264         index = dev_read_stringlist_search(dev, "clock-names", name);
 265         if (index < 0) {
 266                 debug("fdt_stringlist_search() failed: %d\n", index);
 267                 return index;
 268         }
 269
 270         return clk_get_by_index(dev, index, clk);
 271 }
 272
 273 int clk_release_all(struct clk *clk, int count)
 274 {
 275         int i, ret;
 276
 277         for (i = 0; i < count; i++) {
 278                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 279
 280                 /* check if clock has been previously requested */
 281                 if (!clk[i].dev)
 282                         continue;
 283
 284                 ret = clk_disable(&clk[i]);
 285                 if (ret && ret != -ENOSYS)
 286                         return ret;
 287
 288                 ret = clk_free(&clk[i]);
 289                 if (ret && ret != -ENOSYS)
 290                         return ret;
 291         }
 292
 293         return 0;
 294 }
 295
 296 #endif /* OF_CONTROL */
 297
 298 int clk_request(struct udevice *dev, struct clk *clk)
 299 {
 300         const struct clk_ops *ops = clk_dev_ops(dev);
 301
 302         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 303
 304         clk->dev = dev;
 305
 306         if (!ops->request)
 307                 return 0;
 308
 309         return ops->request(clk);
 310 }
 311
 312 int clk_free(struct clk *clk)
 313 {
 314         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 315
 316         debug("%s(clk=%p)\n", __func__, clk);
 317
 318         if (!ops->free)
 319                 return 0;
 320
 321         return ops->free(clk);
 322 }
 323
 324 ulong clk_get_rate(struct clk *clk)
 325 {
 326         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 327
 328         debug("%s(clk=%p)\n", __func__, clk);
 329
 330         if (!ops->get_rate)
 331                 return -ENOSYS;
 332
 333         return ops->get_rate(clk);
 334 }
 335
 336 ulong clk_set_rate(struct clk *clk, ulong rate)
 337 {
 338         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 339
 340         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 341
 342         if (!ops->set_rate)
 343                 return -ENOSYS;
 344
 345         return ops->set_rate(clk, rate);
 346 }
 347
 348 int clk_set_parent(struct clk *clk, struct clk *parent)
 349 {
 350         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 351
 352         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 353
 354         if (!ops->set_parent)
 355                 return -ENOSYS;
 356
 357         return ops->set_parent(clk, parent);
 358 }
 359
 360 int clk_enable(struct clk *clk)
 361 {
 362         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 363
 364         debug("%s(clk=%p)\n", __func__, clk);
 365
 366         if (!ops->enable)
 367                 return -ENOSYS;
 368
 369         return ops->enable(clk);
 370 }
 371
 372 int clk_enable_bulk(struct clk_bulk *bulk)
 373 {
 374         int i, ret;
 375
 376         for (i = 0; i < bulk->count; i++) {
 377                 ret = clk_enable(&bulk->clks[i]);
 378                 if (ret < 0 && ret != -ENOSYS)
 379                         return ret;
 380         }
 381
 382         return 0;
 383 }
 384
 385 int clk_disable(struct clk *clk)
 386 {
 387         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 388
 389         debug("%s(clk=%p)\n", __func__, clk);
 390
 391         if (!ops->disable)
 392                 return -ENOSYS;
 393
 394         return ops->disable(clk);
 395 }
 396
 397 int clk_disable_bulk(struct clk_bulk *bulk)
 398 {
 399         int i, ret;
 400
 401         for (i = 0; i < bulk->count; i++) {
 402                 ret = clk_disable(&bulk->clks[i]);
 403                 if (ret < 0 && ret != -ENOSYS)
 404                         return ret;
 405         }
 406
 407         return 0;
 408 }
 409
 410 UCLASS_DRIVER(clk) = {
 411         .id             = UCLASS_CLK,
 412         .name           = "clk",
 413 };