2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 * Copyright (c) 2016, NVIDIA CORPORATION.
5 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
7 * SPDX-License-Identifier: GPL-2.0+
12 #include <clk-uclass.h>
15 #include <dt-structs.h>
18 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
20 return (const struct clk_ops *)dev->driver->ops;
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
25 int clk_get_by_index_platdata(struct udevice *dev, int index,
26 struct phandle_1_arg *cells, struct clk *clk)
32 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
35 clk->id = cells[0].arg[0];
40 static int clk_of_xlate_default(struct clk *clk,
41 struct ofnode_phandle_args *args)
43 debug("%s(clk=%p)\n", __func__, clk);
45 if (args->args_count > 1) {
46 debug("Invaild args_count: %d\n", args->args_count);
51 clk->id = args->args[0];
58 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
59 int index, struct clk *clk)
62 struct ofnode_phandle_args args;
63 struct udevice *dev_clk;
64 const struct clk_ops *ops;
66 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
71 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
74 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
79 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
81 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
88 ops = clk_dev_ops(dev_clk);
91 ret = ops->of_xlate(clk, &args);
93 ret = clk_of_xlate_default(clk, &args);
95 debug("of_xlate() failed: %d\n", ret);
99 return clk_request(dev_clk, clk);
102 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
104 return clk_get_by_indexed_prop(dev, "clocks", index, clk);
107 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
109 int i, ret, err, count;
113 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
117 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
121 for (i = 0; i < count; i++) {
122 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
132 err = clk_release_all(bulk->clks, bulk->count);
134 debug("%s: could release all clocks for %p\n",
140 static int clk_set_default_parents(struct udevice *dev)
142 struct clk clk, parent_clk;
147 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
149 if (num_parents < 0) {
150 debug("%s: could not read assigned-clock-parents for %p\n",
155 for (index = 0; index < num_parents; index++) {
156 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
159 debug("%s: could not get parent clock %d for %s\n",
160 __func__, index, dev_read_name(dev));
164 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
167 debug("%s: could not get assigned clock %d for %s\n",
168 __func__, index, dev_read_name(dev));
172 ret = clk_set_parent(&clk, &parent_clk);
175 * Not all drivers may support clock-reparenting (as of now).
176 * Ignore errors due to this.
182 debug("%s: failed to reparent clock %d for %s\n",
183 __func__, index, dev_read_name(dev));
191 static int clk_set_default_rates(struct udevice *dev)
200 size = dev_read_size(dev, "assigned-clock-rates");
204 num_rates = size / sizeof(u32);
205 rates = calloc(num_rates, sizeof(u32));
209 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
213 for (index = 0; index < num_rates; index++) {
214 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
217 debug("%s: could not get assigned clock %d for %s\n",
218 __func__, index, dev_read_name(dev));
222 ret = clk_set_rate(&clk, rates[index]);
224 debug("%s: failed to set rate on clock %d for %s\n",
225 __func__, index, dev_read_name(dev));
235 int clk_set_defaults(struct udevice *dev)
239 /* If this is running pre-reloc state, don't take any action. */
240 if (!(gd->flags & GD_FLG_RELOC))
243 debug("%s(%s)\n", __func__, dev_read_name(dev));
245 ret = clk_set_default_parents(dev);
249 ret = clk_set_default_rates(dev);
255 # endif /* OF_PLATDATA */
257 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
261 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
264 index = dev_read_stringlist_search(dev, "clock-names", name);
266 debug("fdt_stringlist_search() failed: %d\n", index);
270 return clk_get_by_index(dev, index, clk);
273 int clk_release_all(struct clk *clk, int count)
277 for (i = 0; i < count; i++) {
278 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
280 /* check if clock has been previously requested */
284 ret = clk_disable(&clk[i]);
285 if (ret && ret != -ENOSYS)
288 ret = clk_free(&clk[i]);
289 if (ret && ret != -ENOSYS)
296 #endif /* OF_CONTROL */
298 int clk_request(struct udevice *dev, struct clk *clk)
300 const struct clk_ops *ops = clk_dev_ops(dev);
302 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
309 return ops->request(clk);
312 int clk_free(struct clk *clk)
314 const struct clk_ops *ops = clk_dev_ops(clk->dev);
316 debug("%s(clk=%p)\n", __func__, clk);
321 return ops->free(clk);
324 ulong clk_get_rate(struct clk *clk)
326 const struct clk_ops *ops = clk_dev_ops(clk->dev);
328 debug("%s(clk=%p)\n", __func__, clk);
333 return ops->get_rate(clk);
336 ulong clk_set_rate(struct clk *clk, ulong rate)
338 const struct clk_ops *ops = clk_dev_ops(clk->dev);
340 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
345 return ops->set_rate(clk, rate);
348 int clk_set_parent(struct clk *clk, struct clk *parent)
350 const struct clk_ops *ops = clk_dev_ops(clk->dev);
352 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
354 if (!ops->set_parent)
357 return ops->set_parent(clk, parent);
360 int clk_enable(struct clk *clk)
362 const struct clk_ops *ops = clk_dev_ops(clk->dev);
364 debug("%s(clk=%p)\n", __func__, clk);
369 return ops->enable(clk);
372 int clk_enable_bulk(struct clk_bulk *bulk)
376 for (i = 0; i < bulk->count; i++) {
377 ret = clk_enable(&bulk->clks[i]);
378 if (ret < 0 && ret != -ENOSYS)
385 int clk_disable(struct clk *clk)
387 const struct clk_ops *ops = clk_dev_ops(clk->dev);
389 debug("%s(clk=%p)\n", __func__, clk);
394 return ops->disable(clk);
397 int clk_disable_bulk(struct clk_bulk *bulk)
401 for (i = 0; i < bulk->count; i++) {
402 ret = clk_disable(&bulk->clks[i]);
403 if (ret < 0 && ret != -ENOSYS)
410 UCLASS_DRIVER(clk) = {