2 * Copyright (C) 2015 Google, Inc
3 * Written by Simon Glass <sjg@chromium.org>
4 * Copyright (c) 2016, NVIDIA CORPORATION.
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <clk-uclass.h>
13 #include <dt-structs.h>
16 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
18 return (const struct clk_ops *)dev->driver->ops;
21 #if CONFIG_IS_ENABLED(OF_CONTROL)
22 # if CONFIG_IS_ENABLED(OF_PLATDATA)
23 int clk_get_by_index_platdata(struct udevice *dev, int index,
24 struct phandle_1_arg *cells, struct clk *clk)
30 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
33 clk->id = cells[0].arg[0];
38 static int clk_of_xlate_default(struct clk *clk,
39 struct ofnode_phandle_args *args)
41 debug("%s(clk=%p)\n", __func__, clk);
43 if (args->args_count > 1) {
44 debug("Invaild args_count: %d\n", args->args_count);
49 clk->id = args->args[0];
56 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
57 int index, struct clk *clk)
60 struct ofnode_phandle_args args;
61 struct udevice *dev_clk;
62 const struct clk_ops *ops;
64 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
69 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
72 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
77 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
79 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
86 ops = clk_dev_ops(dev_clk);
89 ret = ops->of_xlate(clk, &args);
91 ret = clk_of_xlate_default(clk, &args);
93 debug("of_xlate() failed: %d\n", ret);
97 return clk_request(dev_clk, clk);
100 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
102 return clk_get_by_indexed_prop(dev, "clocks", index, clk);
104 # endif /* OF_PLATDATA */
106 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
110 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
113 index = dev_read_stringlist_search(dev, "clock-names", name);
115 debug("fdt_stringlist_search() failed: %d\n", index);
119 return clk_get_by_index(dev, index, clk);
122 int clk_release_all(struct clk *clk, int count)
126 for (i = 0; i < count; i++) {
127 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
129 /* check if clock has been previously requested */
133 ret = clk_disable(&clk[i]);
134 if (ret && ret != -ENOSYS)
137 ret = clk_free(&clk[i]);
138 if (ret && ret != -ENOSYS)
145 #endif /* OF_CONTROL */
147 int clk_request(struct udevice *dev, struct clk *clk)
149 const struct clk_ops *ops = clk_dev_ops(dev);
151 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
158 return ops->request(clk);
161 int clk_free(struct clk *clk)
163 const struct clk_ops *ops = clk_dev_ops(clk->dev);
165 debug("%s(clk=%p)\n", __func__, clk);
170 return ops->free(clk);
173 ulong clk_get_rate(struct clk *clk)
175 const struct clk_ops *ops = clk_dev_ops(clk->dev);
177 debug("%s(clk=%p)\n", __func__, clk);
182 return ops->get_rate(clk);
185 ulong clk_set_rate(struct clk *clk, ulong rate)
187 const struct clk_ops *ops = clk_dev_ops(clk->dev);
189 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
194 return ops->set_rate(clk, rate);
197 int clk_set_parent(struct clk *clk, struct clk *parent)
199 const struct clk_ops *ops = clk_dev_ops(clk->dev);
201 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
203 if (!ops->set_parent)
206 return ops->set_parent(clk, parent);
209 int clk_enable(struct clk *clk)
211 const struct clk_ops *ops = clk_dev_ops(clk->dev);
213 debug("%s(clk=%p)\n", __func__, clk);
218 return ops->enable(clk);
221 int clk_disable(struct clk *clk)
223 const struct clk_ops *ops = clk_dev_ops(clk->dev);
225 debug("%s(clk=%p)\n", __func__, clk);
230 return ops->disable(clk);
233 UCLASS_DRIVER(clk) = {