2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
11 DECLARE_GLOBAL_DATA_PTR;
13 struct clk_fixed_rate {
14 unsigned long fixed_rate;
17 #define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
19 static ulong clk_fixed_rate_get_rate(struct udevice *dev)
21 return to_clk_fixed_rate(dev)->fixed_rate;
24 static ulong clk_fixed_rate_get_periph_rate(struct udevice *dev, int periph)
26 return clk_fixed_rate_get_rate(dev);
29 const struct clk_ops clk_fixed_rate_ops = {
30 .get_rate = clk_fixed_rate_get_rate,
31 .get_periph_rate = clk_fixed_rate_get_periph_rate,
34 static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
36 to_clk_fixed_rate(dev)->fixed_rate =
37 fdtdec_get_int(gd->fdt_blob, dev->of_offset,
38 "clock-frequency", 0);
43 static const struct udevice_id clk_fixed_rate_match[] = {
45 .compatible = "fixed-clock",
50 U_BOOT_DRIVER(clk_fixed_rate) = {
51 .name = "fixed_rate_clock",
53 .of_match = clk_fixed_rate_match,
54 .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
55 .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
56 .ops = &clk_fixed_rate_ops,